[U-Boot] [PATCH V2 2/3] dt: bcm6838: add pinctrl
Add pinctrl node and related syscon node for broadcom bcm6838 SoC.
Signed-off-by: Philippe Reynes
---
Changelog:
v2:
- rename property pins-count to brcm,pins-count (feedback Daniel Schwierzeck)
- rename property functions-count to brcm,functions-count (feedback Daniel
Schwierzeck)
arch/mips/dts/brcm,bcm6838.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6838.dtsi b/arch/mips/dts/brcm,bcm6838.dtsi
index d365d0f..1018f9e 100644
--- a/arch/mips/dts/brcm,bcm6838.dtsi
+++ b/arch/mips/dts/brcm,bcm6838.dtsi
@@ -55,6 +55,18 @@
u-boot,dm-pre-reloc;
};
+ gpio_test_port: syscon@14e00294 {
+ compatible = "syscon";
+ reg = <0x14e00294 0x1c>;
+ };
+
+ pinctrl: pinctrl {
+ compatible = "brcm,bcm6838-pinctrl";
+ regmap = <_test_port>;
+ brcm,pins-count = <74>;
+ brcm,functions-count = <8>;
+ };
+
uart0: serial@14e00500 {
compatible = "brcm,bcm6345-uart";
reg = <0x14e00500 0x18>;
--
2.7.4
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[U-Boot] [PATCH 1/3] pinctrl: bcm6838: add pinctrl support
Add pinctrl support for broadcom bcm6838 SoC.
Signed-off-by: Philippe Reynes
---
.../pinctrl/bcm6838-pinctrl.txt| 35 +
drivers/pinctrl/broadcom/Kconfig | 8 ++
drivers/pinctrl/broadcom/Makefile | 1 +
drivers/pinctrl/broadcom/pinctrl-bcm6838.c | 159 +
4 files changed, 203 insertions(+)
create mode 100644 doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt
create mode 100644 drivers/pinctrl/broadcom/pinctrl-bcm6838.c
diff --git a/doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt
b/doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt
new file mode 100644
index 000..e13d4e7
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt
@@ -0,0 +1,35 @@
+* broadcom bcm6838 pinctrl
+
+Required properties for the pinctrl driver:
+- compatible: "brcm,bcm6838-pinctrl"
+- regmap: specify the gpio test port syscon
+- pins-count: the number of pin
+- functions-count: the number of function
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Example:
+
+ gpio_test_port: syscon@14e00294 {
+ compatible = "syscon";
+ reg = <0x14e00294 0x1c>;
+ };
+
+ pinctrl: pinctrl {
+ compatible = "brcm,bcm6838-pinctrl";
+ regmap = <_test_port>;
+ pins-count = <74>;
+ functions-count = <8>;
+
+ usb0: usb0 {
+ usb0_pwrflt {
+ pins = "69";
+ function = "1";
+ };
+ usb0_pwron {
+ pins = "70";
+ function = "1";
+ };
+ };
+ };
diff --git a/drivers/pinctrl/broadcom/Kconfig b/drivers/pinctrl/broadcom/Kconfig
index 4056782..b01b725 100644
--- a/drivers/pinctrl/broadcom/Kconfig
+++ b/drivers/pinctrl/broadcom/Kconfig
@@ -5,3 +5,11 @@ config PINCTRL_BCM283X
help
Support pin multiplexing and pin configuration control on
Broadcom's 283x family of SoCs.
+
+config PINCTRL_BCM6838
+ depends on ARCH_BMIPS && PINCTRL_FULL && OF_CONTROL
+ default y
+ bool "Broadcom 6838 family pin control driver"
+ help
+ Support pin multiplexing and pin configuration control on
+ Broadcom's 6838 family of SoCs.
diff --git a/drivers/pinctrl/broadcom/Makefile
b/drivers/pinctrl/broadcom/Makefile
index 99c7c23..f94f3ce 100644
--- a/drivers/pinctrl/broadcom/Makefile
+++ b/drivers/pinctrl/broadcom/Makefile
@@ -5,3 +5,4 @@
# https://spdx.org/licenses
obj-$(CONFIG_PINCTRL_BCM283X) += pinctrl-bcm283x.o
+obj-$(CONFIG_PINCTRL_BCM6838) += pinctrl-bcm6838.o
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm6838.c
b/drivers/pinctrl/broadcom/pinctrl-bcm6838.c
new file mode 100644
index 000..2b8d849
--- /dev/null
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm6838.c
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+#include
+#include
+#include
+#include
+
+#define BCM6838_CMD_LOAD_MUX0x21
+
+#define BCM6838_FUNC_OFFS 12
+#define BCM6838_FUNC_MASK (0x37 << BCM6838_FUNC_OFFS)
+#define BCM6838_PIN_OFFS 0
+#define BCM6838_PIN_MASK(0xfff << BCM6838_PIN_OFFS)
+
+#define BCM6838_MAX_PIN_NAME_LEN 8
+static char bcm6838_pin_name[BCM6838_MAX_PIN_NAME_LEN];
+
+#define BCM6838_MAX_FUNC_NAME_LEN8
+static char bcm6838_func_name[BCM6838_MAX_FUNC_NAME_LEN];
+
+struct bcm6838_test_port_hw {
+ unsigned long port_blk_data1;
+ unsigned long port_blk_data2;
+ unsigned long port_command;
+};
+
+static const struct bcm6838_test_port_hw bcm6838_hw = {
+ .port_blk_data1 = 0x10,
+ .port_blk_data2 = 0x14,
+ .port_command = 0x18
+};
+
+struct bcm6838_pinctrl_priv {
+ const struct bcm6838_test_port_hw *hw;
+ struct regmap *regmap;
+ u32 pins_count;
+ u32 functions_count;
+};
+
+int bcm6838_pinctrl_get_pins_count(struct udevice *dev)
+{
+ struct bcm6838_pinctrl_priv *priv = dev_get_priv(dev);
+
+ return priv->pins_count;
+}
+
+const char *bcm6838_pinctrl_get_pin_name(struct udevice *dev,
+unsigned int selector)
+{
+ snprintf(bcm6838_pin_name, BCM6838_MAX_PIN_NAME_LEN, "%u", selector);
+ return bcm6838_pin_name;
+}
+
+int bcm6838_pinctrl_get_functions_count(struct udevice *dev)
+{
+ struct bcm6838_pinctr
[U-Boot] [PATCH 3/3] bcm968380gerg: enable pinctrl
Signed-off-by: Philippe Reynes --- configs/bcm968380gerg_ram_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index 3354a5e..7c83d43 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -38,6 +38,7 @@ CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y +CONFIG_PINCTRL=y CONFIG_POWER_DOMAIN=y CONFIG_BCM6328_POWER_DOMAIN=y CONFIG_DM_RESET=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/3] dt: bcm6838: add pinctrl
Add pinctrl node and related syscon node for broadcom bcm6838 SoC.
Signed-off-by: Philippe Reynes
---
arch/mips/dts/brcm,bcm6838.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6838.dtsi b/arch/mips/dts/brcm,bcm6838.dtsi
index d365d0f..f276a6a 100644
--- a/arch/mips/dts/brcm,bcm6838.dtsi
+++ b/arch/mips/dts/brcm,bcm6838.dtsi
@@ -55,6 +55,18 @@
u-boot,dm-pre-reloc;
};
+ gpio_test_port: syscon@14e00294 {
+ compatible = "syscon";
+ reg = <0x14e00294 0x1c>;
+ };
+
+ pinctrl: pinctrl {
+ compatible = "brcm,bcm6838-pinctrl";
+ regmap = <_test_port>;
+ pins-count = <74>;
+ functions-count = <8>;
+ };
+
uart0: serial@14e00500 {
compatible = "brcm,bcm6345-uart";
reg = <0x14e00500 0x18>;
--
2.7.4
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[U-Boot] [PATCH 3/3] bcm968380gerg: add initial support
This add the initial support of the broadcom reference
board bcm968380gerg with a bcm68380 SoC.
This board has 512 MB of RAM, 128 MB of flash (nand),
2 USB port, 1 UART, 4 ethernet ports and BCM43217 (wifi).
Signed-off-by: Philippe Reynes
---
arch/mips/dts/brcm,bcm968380gerg.dts | 40 +++
arch/mips/mach-bmips/Kconfig | 12 +++
board/broadcom/bcm968380gerg/Kconfig | 12 +++
board/broadcom/bcm968380gerg/Makefile| 3 ++
board/broadcom/bcm968380gerg/bcm968380gerg.c | 6
board/broadcom/bcm968380gerg/board.c | 6
configs/bcm968380gerg_ram_defconfig | 48
include/configs/broadcom_bcm968380gerg.h | 9 ++
8 files changed, 136 insertions(+)
create mode 100644 arch/mips/dts/brcm,bcm968380gerg.dts
create mode 100644 board/broadcom/bcm968380gerg/Kconfig
create mode 100644 board/broadcom/bcm968380gerg/Makefile
create mode 100644 board/broadcom/bcm968380gerg/bcm968380gerg.c
create mode 100644 board/broadcom/bcm968380gerg/board.c
create mode 100644 configs/bcm968380gerg_ram_defconfig
create mode 100644 include/configs/broadcom_bcm968380gerg.h
diff --git a/arch/mips/dts/brcm,bcm968380gerg.dts
b/arch/mips/dts/brcm,bcm968380gerg.dts
new file mode 100644
index 000..513045e
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm968380gerg.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6838.dtsi"
+
+/ {
+ model = "Broadcom bcm68380gerg";
+ compatible = "broadcom,bcm68380gerg", "brcm,bcm6838";
+
+ aliases {
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+ {
+ force-size = <0x1000>;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+
+ led@0 {
+ reg = <0>;
+ active-low;
+ label = "bcm968380gerg:green:usb";
+ };
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index de5..96970f9 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -136,6 +136,17 @@ endchoice
choice
prompt "Board select"
+config BOARD_BROADCOM_BCM968380GERG
+ bool "Broadcom bcm968380gerg"
+ depends on SOC_BMIPS_BCM6838
+ select BMIPS_SUPPORTS_BOOT_RAM
+ help
+ Broadcom BCM968380GERG reference board with BCM68380 SoC with 512 MB
+ of RAM and 128 MB of flash (nand).
+ Between its different peripherals there's an integrated switch with 4
+ ethernet ports, 2 USB ports, 1 UART, GPIO buttons and LEDs, and
+ a BCM43217 (PCIe).
+
config BOARD_COMTREND_AR5315U
bool "Comtrend AR-5315u"
depends on SOC_BMIPS_BCM6318
@@ -264,6 +275,7 @@ endchoice
config BMIPS_SUPPORTS_BOOT_RAM
bool
+source "board/broadcom/bcm968380gerg/Kconfig"
source "board/comtrend/ar5315u/Kconfig"
source "board/comtrend/ar5387un/Kconfig"
source "board/comtrend/ct5361/Kconfig"
diff --git a/board/broadcom/bcm968380gerg/Kconfig
b/board/broadcom/bcm968380gerg/Kconfig
new file mode 100644
index 000..c33e25d
--- /dev/null
+++ b/board/broadcom/bcm968380gerg/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_BROADCOM_BCM968380GERG
+
+config SYS_BOARD
+ default "bcm968380gerg"
+
+config SYS_VENDOR
+ default "broadcom"
+
+config SYS_CONFIG_NAME
+ default "broadcom_bcm968380gerg"
+
+endif
diff --git a/board/broadcom/bcm968380gerg/Makefile
b/board/broadcom/bcm968380gerg/Makefile
new file mode 100644
index 000..a525b7b
--- /dev/null
+++ b/board/broadcom/bcm968380gerg/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += bcm968380gerg.o
diff --git a/board/broadcom/bcm968380gerg/bcm968380gerg.c
b/board/broadcom/bcm968380gerg/bcm968380gerg.c
new file mode 100644
index 000..044b355
--- /dev/null
+++ b/board/broadcom/bcm968380gerg/bcm968380gerg.c
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes
+ */
+
+#include
diff --git a/board/broadcom/bcm968380gerg/board.c
b/board/broadcom/bcm968380gerg/board.c
new file mode 100644
index 000..044b355
--- /dev/null
+++ b/board/broadcom/bcm968380gerg/board.c
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes
+ */
+
+#include
diff --git a/configs/bcm968380gerg_ram_defconfig
b/configs/bcm968380gerg_ram_defconfig
new file mode 100644
index 000..3354a5e
--- /dev/null
+++ b/configs/bcm968380gerg_ram_defconfig
@@ -0,0 +1,48 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x8001
+CONFIG_ARCH_BMIPS=y
+CONFIG_SOC_BMIPS_BCM6838=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not se
[U-Boot] [PATCH 1/3] bmips: ram: add an option to force the size of the ram
This adds an option to force the size of the ram, and
avoid the detection of ram size.
Signed-off-by: Philippe Reynes
---
drivers/ram/bmips_ram.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c
index cc37dfa..b5f19c9 100644
--- a/drivers/ram/bmips_ram.c
+++ b/drivers/ram/bmips_ram.c
@@ -43,6 +43,7 @@ struct bmips_ram_hw {
struct bmips_ram_priv {
void __iomem *regs;
+ u32 force_size;
const struct bmips_ram_hw *hw;
};
@@ -104,7 +105,10 @@ static int bmips_ram_get_info(struct udevice *dev, struct
ram_info *info)
const struct bmips_ram_hw *hw = priv->hw;
info->base = 0x8000;
- info->size = hw->get_ram_size(priv);
+ if (priv->force_size)
+ info->size = priv->force_size;
+ else
+ info->size = hw->get_ram_size(priv);
return 0;
}
@@ -155,6 +159,8 @@ static int bmips_ram_probe(struct udevice *dev)
if (!priv->regs)
return -EINVAL;
+ dev_read_u32(dev, "force-size", >force_size);
+
priv->hw = hw;
return 0;
--
2.7.4
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[U-Boot] [PATCH 2/3] bcm6838: add initial support
This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.
Signed-off-by: Philippe Reynes
---
arch/mips/dts/brcm,bcm6838.dtsi | 75 +
arch/mips/mach-bmips/Kconfig| 13 +++
drivers/cpu/bmips_cpu.c | 33 ++
include/configs/bmips_bcm6838.h | 24 +
4 files changed, 145 insertions(+)
create mode 100644 arch/mips/dts/brcm,bcm6838.dtsi
create mode 100644 include/configs/bmips_bcm6838.h
diff --git a/arch/mips/dts/brcm,bcm6838.dtsi b/arch/mips/dts/brcm,bcm6838.dtsi
new file mode 100644
index 000..d365d0f
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6838.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6838";
+
+ cpus {
+ reg = <0x14e0 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu@0 {
+ compatible = "brcm,bcm6838-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bcm6838-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ memory: memory-controller@1200 {
+ compatible = "brcm,bcm6328-mc";
+ reg = <0x1200 0x1000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ uart0: serial@14e00500 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x14e00500 0x18>;
+ clocks = <_osc>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller@14e00f00 {
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x14e00f00 0x28>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index 10900bf..de5 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -14,6 +14,7 @@ config SYS_SOC
default "bcm6368" if SOC_BMIPS_BCM6368
default "bcm6362" if SOC_BMIPS_BCM6362
default "bcm63268" if SOC_BMIPS_BCM63268
+ default "bcm6838" if SOC_BMIPS_BCM6838
choice
prompt "Broadcom MIPS SoC select"
@@ -118,6 +119,18 @@ config SOC_BMIPS_BCM63268
This supports BMIPS BCM63268 family including BCM63168, BCM63169,
BCM63268 and BCM63269.
+config SOC_BMIPS_BCM6838
+ bool "BMIPS BCM6838 family"
+ select SUPPORTS_BIG_ENDIAN
+ select SUPPORTS_CPU_MIPS32_R1
+ select MIPS_TUNE_4KC
+ select MIPS_L1_CACHE_SHIFT_4
+ select SWAP_IO_SPACE
+ select SYSRESET_SYSCON
+ help
+ This supports BMIPS BCM6838 family including BCM68380, BCM68381,
+ and BCM68385.
+
endchoice
choice
diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index 78560b0..fc04747 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -66,6 +66,10 @@
#define STRAPBUS_63268_FCVO_SHIFT 21
#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
+#define REG_BCM6838_OTP_BRCMBITS0 0x440
+#define VIPER_6838_FREQ_SHIFT 18
+#define VIPER_6838_FREQ_MASK (0x7 << VIPER_6838_FREQ_SHIFT)
+
struct bmips_cpu_priv;
struct bmips_cpu_hw {
@@ -272,6 +276,26 @@ static ulong bcm63268_get_cpu_freq(struct bmips_cpu_priv
*priv)
}
}
+static ulong bcm6838_get_cpu_freq(struct bmips_cpu_priv *priv)
+{
+ unsigned int mips_vipe
[U-Boot] [PATCH] mtd: nand: add new enum for storing ECC algorithm
From: Rafał Miłecki
Our nand_ecc_modes_t is already a bit abused by value NAND_ECC_SOFT_BCH.
This enum should store ECC mode only and putting algorithm details there
is a bad idea. It would result in too many values impossible to support
in a sane way.
To solve this problem let's add a new enum. We'll have to modify all
drivers to set it properly but once it's done it'll be possible to drop
NAND_ECC_SOFT_BCH. That will result in a cleaner design and more
possibilities like setting ECC algorithm for hardware ECC mode.
Signed-off-by: Rafał Miłecki
Signed-off-by: Boris Brezillon
[Linux commit: b0fcd8ab7b3c89b5da7fff5224d06ed73e7a33cc]
[Philippe Reynes: adapt code to u-boot]
Signed-off-by: Philippe Reynes
---
include/linux/mtd/rawnand.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index cdad7b8..9f5dc81 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -143,6 +143,12 @@ typedef enum {
NAND_ECC_SOFT_BCH,
} nand_ecc_modes_t;
+enum nand_ecc_algo {
+ NAND_ECC_UNKNOWN,
+ NAND_ECC_HAMMING,
+ NAND_ECC_BCH,
+};
+
/*
* Constants for Hardware ECC
*/
@@ -533,6 +539,7 @@ static const struct nand_ecc_caps __name = {
\
/**
* struct nand_ecc_ctrl - Control structure for ECC
* @mode: ECC mode
+ * @algo: ECC algorithm
* @steps: number of ECC steps per page
* @size: data bytes per ECC step
* @bytes: ECC bytes per step
@@ -583,6 +590,7 @@ static const struct nand_ecc_caps __name = {
\
*/
struct nand_ecc_ctrl {
nand_ecc_modes_t mode;
+ enum nand_ecc_algo algo;
int steps;
int size;
int bytes;
--
2.7.4
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[U-Boot] [PATCH] led: bcm6328: read base address in the parent node
In the device tree, the address for the led is located in the parent node (for exemple leds), not in the led node (for exemple led@0). The commit "led: bcm6328: convert to use live dt" (sha1: 899455176058d673887a762aa38853188a030af4) change this behaviour and read the address in the led node. We fix this by reading the base address for led in the parent node. Signed-off-by: Philippe Reynes --- drivers/led/led_bcm6328.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/led/led_bcm6328.c b/drivers/led/led_bcm6328.c index a29e5a0..7be4bad 100644 --- a/drivers/led/led_bcm6328.c +++ b/drivers/led/led_bcm6328.c @@ -173,7 +173,7 @@ static int bcm6328_led_probe(struct udevice *dev) struct bcm6328_led_priv *priv = dev_get_priv(dev); unsigned int pin; - priv->regs = dev_remap_addr(dev); + priv->regs = dev_remap_addr(dev_get_parent(dev)); if (!priv->regs) return -EINVAL; -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] cpu: bmips: fix probe to get the address
In the device tree, the address for cpu is located in the node "cpus", not in the cpu node (for exemple cpu@0). So when probing cpu, the cpu address must be read in the cpu parent. The commit "cpu: bmips: convert to use live dt" (sha1: c444afbbefa103d567f197393d39ec0fcca21a0c) change this behaviour and read the address in the cpu node when probing cpu. We fix this by reading the address in the cpu parent. Signed-off-by: Philippe Reynes --- drivers/cpu/bmips_cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c index f5bacd2..78560b0 100644 --- a/drivers/cpu/bmips_cpu.c +++ b/drivers/cpu/bmips_cpu.c @@ -407,7 +407,7 @@ int bmips_cpu_probe(struct udevice *dev) const struct bmips_cpu_hw *hw = (const struct bmips_cpu_hw *)dev_get_driver_data(dev); - priv->regs = dev_remap_addr(dev); + priv->regs = dev_remap_addr(dev_get_parent(dev)); if (!priv->regs) return -EINVAL; -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] imx: fix exception vectors relocation in imx27
On 13/11/14 17:59, Albert ARIBAUD wrote:
Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x) or
high (0x) vectors address, or setting VBAR to
U-Boot's base if applicable.
i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0x
and has only ROM at 0x; it is therefore not
possible to move or change its exception vectors.
Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.
Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.
Series-Cc: Heiko Schocherh...@denx.de
Tested-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Albert ARIBAUDalbert.u.b...@aribaud.net
---
Changes in v3:
- Fixed AGAIN wrong i.MX27 vector relocation code
Changes in v2:
- Fixed wrong i.MX27 vector relocation code
arch/arm/cpu/arm926ejs/mx27/Makefile | 4 ++
arch/arm/cpu/arm926ejs/mx27/relocate.S | 51 +
arch/arm/lib/crt0.S| 5 +++
arch/arm/lib/relocate.S| 69 --
4 files changed, 101 insertions(+), 28 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx27/relocate.S
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile
b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 4976bbb..0edf144 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -5,3 +5,7 @@
# SPDX-License-Identifier:GPL-2.0+
obj-y = generic.o reset.o timer.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
diff --git a/arch/arm/cpu/arm926ejs/mx27/relocate.S
b/arch/arm/cpu/arm926ejs/mx27/relocate.S
new file mode 100644
index 000..0c4b272
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx27/relocate.S
@@ -0,0 +1,51 @@
+/*
+ * relocate - i.MX27-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUDalbert.u.b...@aribaud.net
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#includeasm-offsets.h
+#includeconfig.h
+#includelinux/linkage.h
+
+/*
+ * The i.MX27 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0x),
+ * thus only the low address (0x) is useable; but that is
+ * in ROM. Therefore, vectors cannot be changed at all.
+ *
+ * However, these ROM-based vectors actually just perform indirect
+ * calls through pointers located in RAM at SoC-specific addresses,
+ * as follows:
+ *
+ * Offset Exception Use by ROM code
+ * 0x reset indirect branch to [0x0014]
+ * 0x0004 undefined instruction indirect branch to [0xfef0]
+ * 0x0008 software interrupt indirect branch to [0xfef4]
+ * 0x000c prefetch abort indirect branch to [0xfef8]
+ * 0x0010 data abort indirect branch to [0xfefc]
+ * 0x0014 (reserved in ARMv5)vector to ROM reset: 0xc000
+ * 0x0018 IRQindirect branch to [0xff00]
+ * 0x001c FIQindirect branch to [0xff04]
+ *
+ * In order to initialize exceptions on i.MX27, we must copy U-Boot's
+ * indirect (not exception!) vector table into 0xfef0..0xff04
+ * taking care not to copy vectors number 5 (reserved exception).
+ */
+
+ .section.text.relocate_vectors,ax,%progbits
+
+ENTRY(relocate_vectors)
+
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
+ ldr r1, =32 /* size of vector table */
+ add r0, r0, r1 /* skip to indirect table */
+ ldr r1, =0xFEF0 /* i.MX27 indirect table */
+ ldmia r0!, {r2-r8}/* load indirect vectors 1..7 */
+ stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */
+
+ bx lr
+
+ENDPROC(relocate_vectors)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 29cdad0..a33ad3e 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -104,6 +104,11 @@ clr_gd:
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
b relocate_code
here:
+/*
+ * now relocate vectors
+ */
+
+ bl relocate_vectors
/* Set up final (full) environment */
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 6ede41c..92f5314 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -11,6 +11,47 @@
#includelinux/linkage.h
/*
+ * Default/weak exception vectors relocation routine
+ *
+ * This routine covers the standard ARM cases: normal (0x),
+ * high (0x) and VBAR. SoCs which do not comply with any of
+ * the standard cases must provide their own, strong, version.
+ */
+
+ .section.text.relocate_vectors,ax,%progbits
+ .weak relocate_vectors
Re: [U-Boot] [PATCH v3 2/2] imx: fix exception vectors relocation in imx27
On 13/11/14 17:59, Albert ARIBAUD wrote:
Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x) or
high (0x) vectors address, or setting VBAR to
U-Boot's base if applicable.
i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0x
and has only ROM at 0x; it is therefore not
possible to move or change its exception vectors.
Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.
Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.
Series-Cc: Heiko Schocherh...@denx.de
Tested-by: Philippe Reynes trem...@gmail.com
Signed-off-by: Albert ARIBAUDalbert.u.b...@aribaud.net
---
Changes in v3:
- Fixed AGAIN wrong i.MX27 vector relocation code
Changes in v2:
- Fixed wrong i.MX27 vector relocation code
arch/arm/cpu/arm926ejs/mx27/Makefile | 4 ++
arch/arm/cpu/arm926ejs/mx27/relocate.S | 51 +
arch/arm/lib/crt0.S| 5 +++
arch/arm/lib/relocate.S| 69 --
4 files changed, 101 insertions(+), 28 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx27/relocate.S
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile
b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 4976bbb..0edf144 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -5,3 +5,7 @@
# SPDX-License-Identifier:GPL-2.0+
obj-y = generic.o reset.o timer.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
diff --git a/arch/arm/cpu/arm926ejs/mx27/relocate.S
b/arch/arm/cpu/arm926ejs/mx27/relocate.S
new file mode 100644
index 000..0c4b272
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx27/relocate.S
@@ -0,0 +1,51 @@
+/*
+ * relocate - i.MX27-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUDalbert.u.b...@aribaud.net
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#includeasm-offsets.h
+#includeconfig.h
+#includelinux/linkage.h
+
+/*
+ * The i.MX27 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0x),
+ * thus only the low address (0x) is useable; but that is
+ * in ROM. Therefore, vectors cannot be changed at all.
+ *
+ * However, these ROM-based vectors actually just perform indirect
+ * calls through pointers located in RAM at SoC-specific addresses,
+ * as follows:
+ *
+ * Offset Exception Use by ROM code
+ * 0x reset indirect branch to [0x0014]
+ * 0x0004 undefined instruction indirect branch to [0xfef0]
+ * 0x0008 software interrupt indirect branch to [0xfef4]
+ * 0x000c prefetch abort indirect branch to [0xfef8]
+ * 0x0010 data abort indirect branch to [0xfefc]
+ * 0x0014 (reserved in ARMv5)vector to ROM reset: 0xc000
+ * 0x0018 IRQindirect branch to [0xff00]
+ * 0x001c FIQindirect branch to [0xff04]
+ *
+ * In order to initialize exceptions on i.MX27, we must copy U-Boot's
+ * indirect (not exception!) vector table into 0xfef0..0xff04
+ * taking care not to copy vectors number 5 (reserved exception).
+ */
+
+ .section.text.relocate_vectors,ax,%progbits
+
+ENTRY(relocate_vectors)
+
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
+ ldr r1, =32 /* size of vector table */
+ add r0, r0, r1 /* skip to indirect table */
+ ldr r1, =0xFEF0 /* i.MX27 indirect table */
+ ldmia r0!, {r2-r8}/* load indirect vectors 1..7 */
+ stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */
+
+ bx lr
+
+ENDPROC(relocate_vectors)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 29cdad0..a33ad3e 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -104,6 +104,11 @@ clr_gd:
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
b relocate_code
here:
+/*
+ * now relocate vectors
+ */
+
+ bl relocate_vectors
/* Set up final (full) environment */
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 6ede41c..92f5314 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -11,6 +11,47 @@
#includelinux/linkage.h
/*
+ * Default/weak exception vectors relocation routine
+ *
+ * This routine covers the standard ARM cases: normal (0x),
+ * high (0x) and VBAR. SoCs which do not comply with any of
+ * the standard cases must provide their own, strong, version.
+ */
+
+ .section.text.relocate_vectors,ax,%progbits
+ .weak relocate_vectors
[U-Boot] [PATCH v4 0/3] i2c, mxc: switch to new multibus/multiadapter framework
This serie is composed of three patches: - one to fix the i2c init on the generic board - one to port the i2c mxc driver to new subsystem - one to update all configurations with i2c mxc driver This serie was tested with success on armadeus apf27. Difference between v4 and v3: - add a comment on patch 1 Difference between v3 and v2: - change title of patch 2 (specify mxc) Difference between v2 and v1: - change title of the serie - use define for speed and slave for each i2c bus - sort i2c driver list - define mxc function as static - remove CONFIG_I2C_MULTI_BUS in config using i2c mxc Philippe Reynes (3): i2c: fix init on generic board i2c: mxc: move to new subsystem i2c: update config using mxc driver to new subsystem README| 11 +++ arch/arm/cpu/armv7/mx5/clock.c|2 +- arch/arm/cpu/armv7/mx6/clock.c|2 +- arch/arm/imx-common/Makefile |2 +- common/board_f.c |4 + drivers/i2c/Makefile |2 +- drivers/i2c/mxc_i2c.c | 137 + include/configs/apf27.h | 11 ++-- include/configs/flea3.h |9 +-- include/configs/imx31_phycore.h |7 +- include/configs/m53evk.h |7 +- include/configs/mx25pdk.h |7 +- include/configs/mx35pdk.h |7 +- include/configs/mx53ard.h |7 +- include/configs/mx53evk.h |7 +- include/configs/mx53loco.h|7 +- include/configs/mx53smd.h |7 +- include/configs/mx6qsabreauto.h |4 +- include/configs/nitrogen6x.h |4 +- include/configs/titanium.h|4 +- include/configs/vf610twr.h|7 +- include/configs/woodburn_common.h |7 +- 22 files changed, 143 insertions(+), 119 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 3/3] i2c: update config using mxc driver to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
include/configs/apf27.h | 11 ++-
include/configs/flea3.h |9 -
include/configs/imx31_phycore.h |7 +++
include/configs/m53evk.h |7 +++
include/configs/mx25pdk.h |7 +++
include/configs/mx35pdk.h |7 +++
include/configs/mx53ard.h |7 +++
include/configs/mx53evk.h |7 +++
include/configs/mx53loco.h|7 +++
include/configs/mx53smd.h |7 +++
include/configs/mx6qsabreauto.h |4 ++--
include/configs/nitrogen6x.h |4 ++--
include/configs/titanium.h|4 ++--
include/configs/vf610twr.h|7 +++
include/configs/woodburn_common.h |7 +++
15 files changed, 46 insertions(+), 56 deletions(-)
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index e7e258f..1193013 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -321,11 +321,12 @@
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C1_BASE
-#define CONFIG_SYS_I2C_SPEED 10 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_MXC_I2C1_SPEED 10 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
+#define CONFIG_SYS_MXC_I2C2_SPEED 10 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES{ }
#ifdef CONFIG_CMD_EEPROM
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index cfcaf1b..a330d39 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -50,11 +50,10 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
-#define CONFIG_SYS_I2C_SLAVE 0xfe
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 720e1bf..db43f19 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -35,11 +35,10 @@
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
-#define CONFIG_SYS_I2C_SPEED 10
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index ccb07e3..1fd8b72 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -161,10 +161,9 @@
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#endif
/*
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 543c415..256b3c1 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -111,10 +111,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C_BASE
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
/* RTC */
#define CONFIG_RTC_IMXDI
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 68b225a..8966581 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -41,10 +41,9 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 122ffd0..f0cc483 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -44,10 +44,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index d39ce7b..2beb433 100644
--- a/include
[U-Boot] [PATCH v4 2/3] i2c: mxc: move to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
README | 11 +++
arch/arm/cpu/armv7/mx5/clock.c |2 +-
arch/arm/cpu/armv7/mx6/clock.c |2 +-
arch/arm/imx-common/Makefile |2 +-
drivers/i2c/Makefile |2 +-
drivers/i2c/mxc_i2c.c | 137 +++-
6 files changed, 93 insertions(+), 63 deletions(-)
diff --git a/README b/README
index 63706be..5d9ecc2 100644
--- a/README
+++ b/README
@@ -1995,6 +1995,17 @@ CBFS (Coreboot Filesystem) support
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
+ - drivers/i2c/i2c_mxc.c
+ - activate this driver with CONFIG_SYS_I2C_MXC
+ - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
+ - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
+ - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
+ - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
+ - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
+ - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
+ If thoses defines are not set, default value is 10
+ for speed, and 0 for slave.
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 6bef254..fb3b128 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -94,7 +94,7 @@ void enable_usboh3_clk(bool enable)
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 7efb0d2..8130827 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -48,7 +48,7 @@ void enable_usboh3_clk(unsigned char enable)
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0 - 2 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 727a052..6c78dd9 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,7 +16,7 @@ COBJS-y = iomux-v3.o
endif
ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
COBJS-y+= timer.o cpu.o speed.o
-COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
COBJS-y+= misc.o
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 37ccbd1..2433182 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -14,7 +14,6 @@ COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
COBJS-$(CONFIG_DW_I2C) += designware_i2c.o
COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
-COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
@@ -29,6 +28,7 @@ COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
COBJS-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 06ba4e3..595019b 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -102,6 +102,28 @@ static u16 i2c_clk_div[50][2] = {
};
#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SPEED
+#define CONFIG_SYS_MXC_I2C1_SPEED 10
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SPEED
+#define CONFIG_SYS_MXC_I2C2_SPEED 10
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SPEED
+#define CONFIG_SYS_MXC_I2C3_SPEED 10
+#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SLAVE
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0
+#endif
+
+
/*
* Calculate and set proper clock divider
*/
@@ -153,21 +175,6 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
return 0;
}
-/*
- * Get I2C Speed
- */
-static unsigned int bus_i2c_get_bus_speed(void *base)
-{
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
- u8 clk_idx = readb(i2c_regs-ifdr);
- u8 clk_div;
-
- for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
- ;
-
- return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
-}
-
#define ST_BUS_IDLE (0 | (I2SR_IBB 8))
#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB 8
[U-Boot] [PATCH v4 1/3] i2c: fix init on generic board
On generic board, the i2c init initialize only
one bus. But the new i2c subsystem allow to
manage severals i2c bus. So in the case, instead
of initializing a bus, we just set the current
i2c bus. The initialization will be done in
the i2c command.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
common/board_f.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..f0664bc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -249,7 +249,11 @@ void dram_init_banksize(void)
static int init_func_i2c(void)
{
puts(I2C: );
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
puts(ready\n);
return 0;
}
--
1.7.4.4
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[U-Boot] [PATCH v3 3/3] i2c: update config using mxc driver to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
include/configs/apf27.h | 11 ++-
include/configs/flea3.h |9 -
include/configs/imx31_phycore.h |7 +++
include/configs/m53evk.h |7 +++
include/configs/mx25pdk.h |7 +++
include/configs/mx35pdk.h |7 +++
include/configs/mx53ard.h |7 +++
include/configs/mx53evk.h |7 +++
include/configs/mx53loco.h|7 +++
include/configs/mx53smd.h |7 +++
include/configs/mx6qsabreauto.h |4 ++--
include/configs/nitrogen6x.h |4 ++--
include/configs/titanium.h|4 ++--
include/configs/vf610twr.h|7 +++
include/configs/woodburn_common.h |7 +++
15 files changed, 46 insertions(+), 56 deletions(-)
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index e7e258f..1193013 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -321,11 +321,12 @@
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C1_BASE
-#define CONFIG_SYS_I2C_SPEED 10 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_MXC_I2C1_SPEED 10 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
+#define CONFIG_SYS_MXC_I2C2_SPEED 10 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES{ }
#ifdef CONFIG_CMD_EEPROM
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index cfcaf1b..a330d39 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -50,11 +50,10 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
-#define CONFIG_SYS_I2C_SLAVE 0xfe
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 720e1bf..db43f19 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -35,11 +35,10 @@
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
-#define CONFIG_SYS_I2C_SPEED 10
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index ccb07e3..1fd8b72 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -161,10 +161,9 @@
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#endif
/*
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 543c415..256b3c1 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -111,10 +111,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C_BASE
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
/* RTC */
#define CONFIG_RTC_IMXDI
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 68b225a..8966581 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -41,10 +41,9 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 122ffd0..f0cc483 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -44,10 +44,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index d39ce7b..2beb433 100644
--- a/include
[U-Boot] [PATCH v3 0/3] i2c, mxc: switch to new multibus/multiadapter framework
This serie is composed of three patches: - one to fix the i2c init on the generic board - one to port the i2c mxc driver to new subsystem - one to update all configurations with i2c mxc driver This serie was tested with success on armadeus apf27. Difference between v3 and v2: - change title of patch 2 (specify mxc) Difference between v2 and v1: - change title of the serie - use define for speed and slave for each i2c bus - sort i2c driver list - define mxc function as static - remove CONFIG_I2C_MULTI_BUS in config using i2c mxc Philippe Reynes (3): i2c: fix init on generic board i2c: mxc: move to new subsystem i2c: update config using mxc driver to new subsystem README| 11 +++ arch/arm/cpu/armv7/mx5/clock.c|2 +- arch/arm/cpu/armv7/mx6/clock.c|2 +- arch/arm/imx-common/Makefile |2 +- common/board_f.c |4 + drivers/i2c/Makefile |2 +- drivers/i2c/mxc_i2c.c | 137 + include/configs/apf27.h | 11 ++-- include/configs/flea3.h |9 +-- include/configs/imx31_phycore.h |7 +- include/configs/m53evk.h |7 +- include/configs/mx25pdk.h |7 +- include/configs/mx35pdk.h |7 +- include/configs/mx53ard.h |7 +- include/configs/mx53evk.h |7 +- include/configs/mx53loco.h|7 +- include/configs/mx53smd.h |7 +- include/configs/mx6qsabreauto.h |4 +- include/configs/nitrogen6x.h |4 +- include/configs/titanium.h|4 +- include/configs/vf610twr.h|7 +- include/configs/woodburn_common.h |7 +- 22 files changed, 143 insertions(+), 119 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/3] i2c: mxc: move to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
README | 11 +++
arch/arm/cpu/armv7/mx5/clock.c |2 +-
arch/arm/cpu/armv7/mx6/clock.c |2 +-
arch/arm/imx-common/Makefile |2 +-
drivers/i2c/Makefile |2 +-
drivers/i2c/mxc_i2c.c | 137 +++-
6 files changed, 93 insertions(+), 63 deletions(-)
diff --git a/README b/README
index 63706be..5d9ecc2 100644
--- a/README
+++ b/README
@@ -1995,6 +1995,17 @@ CBFS (Coreboot Filesystem) support
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
+ - drivers/i2c/i2c_mxc.c
+ - activate this driver with CONFIG_SYS_I2C_MXC
+ - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
+ - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
+ - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
+ - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
+ - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
+ - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
+ If thoses defines are not set, default value is 10
+ for speed, and 0 for slave.
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 6bef254..fb3b128 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -94,7 +94,7 @@ void enable_usboh3_clk(bool enable)
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 7efb0d2..8130827 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -48,7 +48,7 @@ void enable_usboh3_clk(unsigned char enable)
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0 - 2 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 727a052..6c78dd9 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,7 +16,7 @@ COBJS-y = iomux-v3.o
endif
ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
COBJS-y+= timer.o cpu.o speed.o
-COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
COBJS-y+= misc.o
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 37ccbd1..2433182 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -14,7 +14,6 @@ COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
COBJS-$(CONFIG_DW_I2C) += designware_i2c.o
COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
-COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
@@ -29,6 +28,7 @@ COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
COBJS-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 06ba4e3..595019b 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -102,6 +102,28 @@ static u16 i2c_clk_div[50][2] = {
};
#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SPEED
+#define CONFIG_SYS_MXC_I2C1_SPEED 10
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SPEED
+#define CONFIG_SYS_MXC_I2C2_SPEED 10
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SPEED
+#define CONFIG_SYS_MXC_I2C3_SPEED 10
+#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SLAVE
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0
+#endif
+
+
/*
* Calculate and set proper clock divider
*/
@@ -153,21 +175,6 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
return 0;
}
-/*
- * Get I2C Speed
- */
-static unsigned int bus_i2c_get_bus_speed(void *base)
-{
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
- u8 clk_idx = readb(i2c_regs-ifdr);
- u8 clk_div;
-
- for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
- ;
-
- return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
-}
-
#define ST_BUS_IDLE (0 | (I2SR_IBB 8))
#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB 8
[U-Boot] [PATCH v3 1/3] i2c: fix init on generic board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
common/board_f.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..f0664bc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -249,7 +249,11 @@ void dram_init_banksize(void)
static int init_func_i2c(void)
{
puts(I2C: );
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
puts(ready\n);
return 0;
}
--
1.7.4.4
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[U-Boot] [PATCH v2 0/3] i2c, mxc: switch to new multibus/multiadapter framework
This serie is composed of three patches: - one to fix the i2c init on the generic board - one to port the i2c mxc driver to new subsystem - one to update all configurations with i2c mxc driver This serie was tested with success on armadeus apf27. Difference between v2 and v1: - change title of the serie - use define for speed and slave for each i2c bus - sort i2c driver list - define mxc function as static - remove CONFIG_I2C_MULTI_BUS in config using i2c mxc Philippe Reynes (3): i2c: fix init on generic board i2c: move to new subsystem i2c: update config using mxc driver to new subsystem README| 11 +++ arch/arm/cpu/armv7/mx5/clock.c|2 +- arch/arm/cpu/armv7/mx6/clock.c|2 +- arch/arm/imx-common/Makefile |2 +- common/board_f.c |4 + drivers/i2c/Makefile |2 +- drivers/i2c/mxc_i2c.c | 137 + include/configs/apf27.h | 11 ++-- include/configs/flea3.h |9 +-- include/configs/imx31_phycore.h |7 +- include/configs/m53evk.h |7 +- include/configs/mx25pdk.h |7 +- include/configs/mx35pdk.h |7 +- include/configs/mx53ard.h |7 +- include/configs/mx53evk.h |7 +- include/configs/mx53loco.h|7 +- include/configs/mx53smd.h |7 +- include/configs/mx6qsabreauto.h |4 +- include/configs/nitrogen6x.h |4 +- include/configs/titanium.h|4 +- include/configs/vf610twr.h|7 +- include/configs/woodburn_common.h |7 +- 22 files changed, 143 insertions(+), 119 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] i2c: update config using mxc driver to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
include/configs/apf27.h | 11 ++-
include/configs/flea3.h |9 -
include/configs/imx31_phycore.h |7 +++
include/configs/m53evk.h |7 +++
include/configs/mx25pdk.h |7 +++
include/configs/mx35pdk.h |7 +++
include/configs/mx53ard.h |7 +++
include/configs/mx53evk.h |7 +++
include/configs/mx53loco.h|7 +++
include/configs/mx53smd.h |7 +++
include/configs/mx6qsabreauto.h |4 ++--
include/configs/nitrogen6x.h |4 ++--
include/configs/titanium.h|4 ++--
include/configs/vf610twr.h|7 +++
include/configs/woodburn_common.h |7 +++
15 files changed, 46 insertions(+), 56 deletions(-)
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index e7e258f..1193013 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -321,11 +321,12 @@
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C1_BASE
-#define CONFIG_SYS_I2C_SPEED 10 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_MXC_I2C1_SPEED 10 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
+#define CONFIG_SYS_MXC_I2C2_SPEED 10 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES{ }
#ifdef CONFIG_CMD_EEPROM
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index cfcaf1b..a330d39 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -50,11 +50,10 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
-#define CONFIG_SYS_I2C_SLAVE 0xfe
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 720e1bf..db43f19 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -35,11 +35,10 @@
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
-#define CONFIG_SYS_I2C_SPEED 10
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index ccb07e3..1fd8b72 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -161,10 +161,9 @@
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#endif
/*
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 543c415..256b3c1 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -111,10 +111,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C_BASE
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
/* RTC */
#define CONFIG_RTC_IMXDI
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 68b225a..8966581 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -41,10 +41,9 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 122ffd0..f0cc483 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -44,10 +44,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED10
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index d39ce7b..2beb433 100644
--- a/include
[U-Boot] [PATCH v2 2/3] i2c: move to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
README | 11 +++
arch/arm/cpu/armv7/mx5/clock.c |2 +-
arch/arm/cpu/armv7/mx6/clock.c |2 +-
arch/arm/imx-common/Makefile |2 +-
drivers/i2c/Makefile |2 +-
drivers/i2c/mxc_i2c.c | 137 +++-
6 files changed, 93 insertions(+), 63 deletions(-)
diff --git a/README b/README
index 63706be..5d9ecc2 100644
--- a/README
+++ b/README
@@ -1995,6 +1995,17 @@ CBFS (Coreboot Filesystem) support
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
+ - drivers/i2c/i2c_mxc.c
+ - activate this driver with CONFIG_SYS_I2C_MXC
+ - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
+ - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
+ - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
+ - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
+ - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
+ - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
+ If thoses defines are not set, default value is 10
+ for speed, and 0 for slave.
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 6bef254..fb3b128 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -94,7 +94,7 @@ void enable_usboh3_clk(bool enable)
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 7efb0d2..8130827 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -48,7 +48,7 @@ void enable_usboh3_clk(unsigned char enable)
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0 - 2 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 727a052..6c78dd9 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,7 +16,7 @@ COBJS-y = iomux-v3.o
endif
ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
COBJS-y+= timer.o cpu.o speed.o
-COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
COBJS-y+= misc.o
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 37ccbd1..2433182 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -14,7 +14,6 @@ COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
COBJS-$(CONFIG_DW_I2C) += designware_i2c.o
COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
-COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
@@ -29,6 +28,7 @@ COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
COBJS-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 06ba4e3..595019b 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -102,6 +102,28 @@ static u16 i2c_clk_div[50][2] = {
};
#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SPEED
+#define CONFIG_SYS_MXC_I2C1_SPEED 10
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SPEED
+#define CONFIG_SYS_MXC_I2C2_SPEED 10
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SPEED
+#define CONFIG_SYS_MXC_I2C3_SPEED 10
+#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SLAVE
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0
+#endif
+
+
/*
* Calculate and set proper clock divider
*/
@@ -153,21 +175,6 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
return 0;
}
-/*
- * Get I2C Speed
- */
-static unsigned int bus_i2c_get_bus_speed(void *base)
-{
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
- u8 clk_idx = readb(i2c_regs-ifdr);
- u8 clk_div;
-
- for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
- ;
-
- return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
-}
-
#define ST_BUS_IDLE (0 | (I2SR_IBB 8))
#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB 8
[U-Boot] [PATCH v2 1/3] i2c: fix init on generic board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
common/board_f.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..f0664bc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -249,7 +249,11 @@ void dram_init_banksize(void)
static int init_func_i2c(void)
{
puts(I2C: );
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
puts(ready\n);
return 0;
}
--
1.7.4.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] i2c: port i2c driver to new subsystem
This serie is composed of two patches: - one to port the i2c mxc driver to new subsystem - one to update all configurations with i2c mxc driver This serie was tested with success on armadeus apf27. Philippe Reynes (2): i2c: move to new subsystem i2c: update config using mxc driver to new subsystem README|3 + arch/arm/cpu/armv7/mx5/clock.c|2 +- arch/arm/cpu/armv7/mx6/clock.c|2 +- arch/arm/imx-common/Makefile |2 +- drivers/i2c/Makefile |2 +- drivers/i2c/mxc_i2c.c | 109 + include/configs/apf27.h |5 +- include/configs/flea3.h |6 +- include/configs/imx31_phycore.h |6 +- include/configs/m53evk.h |6 +- include/configs/mx25pdk.h |6 +- include/configs/mx35pdk.h |6 +- include/configs/mx53ard.h |6 +- include/configs/mx53evk.h |6 +- include/configs/mx53loco.h|6 +- include/configs/mx53smd.h |6 +- include/configs/mx6qsabreauto.h |3 +- include/configs/nitrogen6x.h |3 +- include/configs/titanium.h|3 +- include/configs/vf610twr.h|6 +- include/configs/woodburn_common.h |6 +- 21 files changed, 98 insertions(+), 102 deletions(-) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] i2c: update config using mxc driver to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
include/configs/apf27.h |5 ++---
include/configs/flea3.h |6 +++---
include/configs/imx31_phycore.h |6 +++---
include/configs/m53evk.h |6 +++---
include/configs/mx25pdk.h |6 +++---
include/configs/mx35pdk.h |6 +++---
include/configs/mx53ard.h |6 +++---
include/configs/mx53evk.h |6 +++---
include/configs/mx53loco.h|6 +++---
include/configs/mx53smd.h |6 +++---
include/configs/mx6qsabreauto.h |3 ++-
include/configs/nitrogen6x.h |3 ++-
include/configs/titanium.h|3 ++-
include/configs/vf610twr.h|6 +++---
include/configs/woodburn_common.h |6 +++---
15 files changed, 41 insertions(+), 39 deletions(-)
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index e7e258f..7e0a8a8 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -321,9 +321,8 @@
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C1_BASE
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 10 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES{ }
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index cfcaf1b..d91fdab 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -50,9 +50,9 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C3_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 2
#define CONFIG_SYS_I2C_SPEED 10
#define CONFIG_SYS_I2C_SLAVE 0xfe
#define CONFIG_MXC_SPI
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 720e1bf..bf1a2cb 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -35,9 +35,9 @@
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
#define CONFIG_SYS_I2C_SPEED 10
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index ccb07e3..4e06537 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -161,9 +161,9 @@
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1
#define CONFIG_SYS_I2C_SPEED 10
#endif
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 543c415..22fb31b 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -111,9 +111,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEIMX_I2C_BASE
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_I2C_SPEED 10
/* RTC */
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 68b225a..f9387a3 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -41,9 +41,9 @@
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C1_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_I2C_SPEED 10
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 122ffd0..e74fc5a 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -44,9 +44,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1
#define CONFIG_SYS_I2C_SPEED10
/* MMC Configs */
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index d39ce7b..c7582f9 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -37,9 +37,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASEI2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1
#define CONFIG_SYS_I2C_SPEED10
/* PMIC Configs */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 7237da5..acac6e8 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
[U-Boot] [PATCH 1/2] i2c: move to new subsystem
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
README |3 +
arch/arm/cpu/armv7/mx5/clock.c |2 +-
arch/arm/cpu/armv7/mx6/clock.c |2 +-
arch/arm/imx-common/Makefile |2 +-
drivers/i2c/Makefile |2 +-
drivers/i2c/mxc_i2c.c | 109 ++-
6 files changed, 57 insertions(+), 63 deletions(-)
diff --git a/README b/README
index 63706be..7c734ba 100644
--- a/README
+++ b/README
@@ -1995,6 +1995,9 @@ CBFS (Coreboot Filesystem) support
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
+ - drivers/i2c/i2c_mxc.c
+- activate this driver with CONFIG_SYS_I2C_MXC
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 6bef254..fb3b128 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -94,7 +94,7 @@ void enable_usboh3_clk(bool enable)
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 7efb0d2..8130827 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -48,7 +48,7 @@ void enable_usboh3_clk(unsigned char enable)
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0 - 2 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 727a052..6c78dd9 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,7 +16,7 @@ COBJS-y = iomux-v3.o
endif
ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
COBJS-y+= timer.o cpu.o speed.o
-COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
COBJS-y+= misc.o
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 37ccbd1..f9fcebe 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -14,7 +14,7 @@ COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
COBJS-$(CONFIG_DW_I2C) += designware_i2c.o
COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
-COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
+COBJS-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 06ba4e3..3ac1865 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -153,21 +153,6 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
return 0;
}
-/*
- * Get I2C Speed
- */
-static unsigned int bus_i2c_get_bus_speed(void *base)
-{
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
- u8 clk_idx = readb(i2c_regs-ifdr);
- u8 clk_div;
-
- for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
- ;
-
- return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
-}
-
#define ST_BUS_IDLE (0 | (I2SR_IBB 8))
#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB 8))
#define ST_IIF (I2SR_IIF | (I2SR_IIF 8))
@@ -410,20 +395,30 @@ struct sram_data {
*/
static struct sram_data __attribute__((section(.data))) srdata;
-void *get_base(void)
-{
-#ifdef CONFIG_SYS_I2C_BASE
-#ifdef CONFIG_I2C_MULTI_BUS
- void *ret = srdata.i2c_data[srdata.curr_i2c_bus].base;
- if (ret)
- return ret;
-#endif
- return (void *)CONFIG_SYS_I2C_BASE;
-#elif defined(CONFIG_I2C_MULTI_BUS)
- return srdata.i2c_data[srdata.curr_i2c_bus].base;
+static void * const i2c_bases[] = {
+#if defined(CONFIG_MX25)
+ (void *)IMX_I2C_BASE,
+ (void *)IMX_I2C2_BASE,
+ (void *)IMX_I2C3_BASE
+#elif defined(CONFIG_MX27)
+ (void *)IMX_I2C1_BASE,
+ (void *)IMX_I2C2_BASE
+#elif defined(CONFIG_MX31) || defined(CONFIG_MX35) || \
+ defined(CONFIG_MX51) || defined(CONFIG_MX53) || \
+ defined(CONFIG_MX6)
+ (void *)I2C1_BASE_ADDR,
+ (void *)I2C2_BASE_ADDR,
+ (void *)I2C3_BASE_ADDR
+#elif defined(CONFIG_VF610)
+ (void *)I2C0_BASE_ADDR
#else
- return srdata.i2c_data[0].base;
+#error architecture not supported
#endif
+};
+
+void *i2c_get_base(struct i2c_adapter *adap)
+{
+ return i2c_bases[adap-hwadapnr];
}
static struct i2c_parms *i2c_get_parms(void *base)
@@ -448,39 +443,26 @@ static int i2c_idle_bus(void *base)
return 0;
}
-#ifdef CONFIG_I2C_MULTI_BUS
-unsigned int i2c_get_bus_num(void)
+int mxc_i2c_read(struct i2c_adapter *adap, uint8_t chip,
+ uint
[U-Boot] [PATCH v7 2/2] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Acked-by: Stefano Babic sba...@denx.de
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c |5 +
board/armadeus/apf27/fpga.c | 224 +
board/armadeus/apf27/fpga.h | 25 +
include/configs/apf27.h | 14 +++
5 files changed, 271 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index ec0cb03..5fcda6e 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -13,6 +13,9 @@ LIB = $(obj)lib$(BOARD).o
COBJS := apf27.o
SOBJS := lowlevel_init.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index c0d9c41..30e720d 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -19,6 +19,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -174,6 +175,10 @@ int board_init(void)
apf27_setup_port();
apf27_iomux_init();
apf27_devices_init();
+#if defined(CONFIG_FPGA)
+ APF27_init_fpga();
+#endif
+
return 0;
}
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..0c08c06
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,224 @@
+/*
+ * (C) Copyright 2002-2013
+ * Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com
+ * and
+ * Keith Outwater, keith_outwa...@mvis.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *)fpga_fns,
+0,
+3s200aft256}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_PRG, 1);
+ gpio_set_value(ACFG_FPGA_CLK, 1);
+ gpio_set_value(ACFG_FPGA_RW, 1);
+ gpio_set_value(ACFG_FPGA_CS, 1);
+ gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+ gpio_set_value(ACFG_FPGA_PWR, 0);
+ udelay(3); /*wait until supply started*/
+
+ return cookie;
+}
+
+/*
+ * Set the FPGA's active-low program line to the specified level
+ */
+int fpga_pgm_fn(int assert, int flush, int cookie)
+{
+ debug(%s:%d: FPGA PROGRAM %s, __func__, __LINE__,
+ assert ? high : low);
+ gpio_set_value(ACFG_FPGA_PRG, !assert);
+ return assert;
+}
+
+/*
+ * Set the FPGA's active-high clock line to the specified level
+ */
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+ debug(%s:%d: FPGA CLOCK %s, __func__, __LINE__,
+ assert_clk ? high : low);
+ gpio_set_value(ACFG_FPGA_CLK, !assert_clk);
+ return assert_clk;
+}
+
+/*
+ * Test the state of the active-low FPGA INIT line. Return 1 on INIT
+ * asserted (low).
+ */
+int fpga_init_fn(int cookie)
+{
+ int value;
+ debug(%s:%d: INIT check... , __func__, __LINE__);
+ value = gpio_get_value(ACFG_FPGA_INIT);
+ /* printf(init value read %x,value); */
+#ifdef CONFIG_SYS_FPGA_IS_PROTO
+ return value;
+#else
[U-Boot] [PATCH v7 1/2] apf27: add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
MAINTAINERS |5 +
board/armadeus/apf27/Makefile| 30 ++
board/armadeus/apf27/apf27.c | 251 +
board/armadeus/apf27/apf27.h | 489 ++
board/armadeus/apf27/lowlevel_init.S | 168
boards.cfg |1 +
include/configs/apf27.h | 374 ++
7 files changed, 1318 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 board/armadeus/apf27/lowlevel_init.S
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a900dc..abf8380 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -716,6 +716,11 @@ Ilko Iliev il...@ronetix.at
PM9263 AT91SAM9263
PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (i.MX27 SoC)
+
Michael Jones michael.jo...@matrix-vision.de
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..ec0cb03
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012-2013
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# SPDX-License-Identifier:GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..c0d9c41
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,251 @@
+/*
+ * Copyright (C) 2008-2013 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Sascha Hauer, Pengutronix
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include environment.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/errno.h
+#include apf27.h
+#include crc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * customer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+static u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * customer use. The APF27 board revision 1 uses the bit 0 to permanently store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+static int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_port_init(int port, u32 gpio_dr, u32 ocr1, u32 ocr2,
+ u32 iconfa1, u32 iconfa2, u32 iconfb1, u32 iconfb2,
+ u32 icr1, u32 icr2, u32 imr, u32 gpio_dir, u32 gpr,
+ u32 puen, u32 gius)
+{
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
+
+ writel(gpio_dr, regs-port[port].gpio_dr);
+ writel(ocr1, regs-port[port].ocr1);
+ writel(ocr2, regs-port[port].ocr2);
+ writel(iconfa1, regs-port[port].iconfa1);
+ writel(iconfa2, regs-port[port].iconfa2);
+ writel(iconfb1, regs-port[port].iconfb1);
+ writel(iconfb2, regs-port[port].iconfb2);
+ writel(icr1, regs-port[port].icr1);
+ writel(icr2, regs-port[port].icr2);
+ writel(imr, regs-port[port].imr);
+ writel
[U-Boot] [PATCH v7 0/2] apf27: add support of armadeus apf27
Difference between v7 and v6: - first patch mx27: add missing constant for mx27 already accepted - remove useless variables regs - remove useless i2c initialization (already done in board_f.c) - remove CONFIG_I2C_MULTI_BUS (not used) - update u-boot filename in u-boot env - fix a typo in a comment in apf27.h Difference between v6 and v5: - use generic board framework - add fpga name Difference between v5 and v4: - use spl framework - use script - use SPDX-License-Identifier - use u-boot-with-spl.bin (instead of u-boot-nand.bin) - fix some comments format issue Difference between v4 and v3: - use standard start.S - use part to know u-boot offset - fix some comments format issue Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (2): apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board MAINTAINERS |5 + board/armadeus/apf27/Makefile| 33 +++ board/armadeus/apf27/apf27.c | 256 ++ board/armadeus/apf27/apf27.h | 489 ++ board/armadeus/apf27/fpga.c | 224 board/armadeus/apf27/fpga.h | 25 ++ board/armadeus/apf27/lowlevel_init.S | 168 boards.cfg |1 + include/configs/apf27.h | 388 +++ 9 files changed, 1589 insertions(+), 0 deletions(-) create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/lowlevel_init.S create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mxc_i2c: add new i2c subsystem support
Hi Heiko, The mxc_i2c driver use the legacy framework. I plan to move this driver to new i2c subsystem (CONFIG_SYS_I2C). Is someone already working on this task ? If no, I propose to only add new i2c subsystem (and not remove old i2c framework). We could remove the mxc i2c legacy support when all the board using this driver will be updated. What do you think about it ? Regards, Philippe___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 0/3] apf27: add support of armadeus apf27
Difference between v6 and v5: - use generic board framework - add fpga name Difference between v5 and v4: - use spl framework - use script - use SPDX-License-Identifier - use u-boot-with-spl.bin (instead of u-boot-nand.bin) - fix some comments format issue Difference between v4 and v3: - use standard start.S - use part to know u-boot offset - fix some comments format issue Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (3): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board MAINTAINERS |5 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 + arch/arm/include/asm/arch-mx27/imx-regs.h |6 +- board/armadeus/apf27/Makefile | 33 ++ board/armadeus/apf27/apf27.c | 263 board/armadeus/apf27/apf27.h | 489 + board/armadeus/apf27/fpga.c | 224 + board/armadeus/apf27/fpga.h | 25 ++ board/armadeus/apf27/lowlevel_init.S | 168 ++ boards.cfg|1 + include/configs/apf27.h | 389 +++ 11 files changed, 1607 insertions(+), 1 deletions(-) create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/lowlevel_init.S create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 3/3] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Acked-by: Stefano Babic sba...@denx.de
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c |5 +
board/armadeus/apf27/fpga.c | 224 +
board/armadeus/apf27/fpga.h | 25 +
include/configs/apf27.h | 14 +++
5 files changed, 271 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index ec0cb03..5fcda6e 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -13,6 +13,9 @@ LIB = $(obj)lib$(BOARD).o
COBJS := apf27.o
SOBJS := lowlevel_init.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 1a94137..9d1c92a 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -19,6 +19,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -181,6 +182,10 @@ int board_init(void)
apf27_setup_port();
apf27_iomux_init();
apf27_devices_init();
+#if defined(CONFIG_FPGA)
+ APF27_init_fpga();
+#endif
+
return 0;
}
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..0c08c06
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,224 @@
+/*
+ * (C) Copyright 2002-2013
+ * Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com
+ * and
+ * Keith Outwater, keith_outwa...@mvis.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *)fpga_fns,
+0,
+3s200aft256}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_PRG, 1);
+ gpio_set_value(ACFG_FPGA_CLK, 1);
+ gpio_set_value(ACFG_FPGA_RW, 1);
+ gpio_set_value(ACFG_FPGA_CS, 1);
+ gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+ gpio_set_value(ACFG_FPGA_PWR, 0);
+ udelay(3); /*wait until supply started*/
+
+ return cookie;
+}
+
+/*
+ * Set the FPGA's active-low program line to the specified level
+ */
+int fpga_pgm_fn(int assert, int flush, int cookie)
+{
+ debug(%s:%d: FPGA PROGRAM %s, __func__, __LINE__,
+ assert ? high : low);
+ gpio_set_value(ACFG_FPGA_PRG, !assert);
+ return assert;
+}
+
+/*
+ * Set the FPGA's active-high clock line to the specified level
+ */
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+ debug(%s:%d: FPGA CLOCK %s, __func__, __LINE__,
+ assert_clk ? high : low);
+ gpio_set_value(ACFG_FPGA_CLK, !assert_clk);
+ return assert_clk;
+}
+
+/*
+ * Test the state of the active-low FPGA INIT line. Return 1 on INIT
+ * asserted (low).
+ */
+int fpga_init_fn(int cookie)
+{
+ int value;
+ debug(%s:%d: INIT check... , __func__, __LINE__);
+ value = gpio_get_value(ACFG_FPGA_INIT);
+ /* printf(init value read %x,value); */
+#ifdef CONFIG_SYS_FPGA_IS_PROTO
+ return value;
+#else
[U-Boot] [PATCH v6 2/3] apf27: add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
MAINTAINERS |5 +
board/armadeus/apf27/Makefile| 30 ++
board/armadeus/apf27/apf27.c | 258 ++
board/armadeus/apf27/apf27.h | 489 ++
board/armadeus/apf27/lowlevel_init.S | 168
boards.cfg |1 +
include/configs/apf27.h | 375 ++
7 files changed, 1326 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 board/armadeus/apf27/lowlevel_init.S
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a900dc..abf8380 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -716,6 +716,11 @@ Ilko Iliev il...@ronetix.at
PM9263 AT91SAM9263
PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (i.MX27 SoC)
+
Michael Jones michael.jo...@matrix-vision.de
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..ec0cb03
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012-2013
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# SPDX-License-Identifier:GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..1a94137
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,258 @@
+/*
+ * Copyright (C) 2008-2013 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Sascha Hauer, Pengutronix
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include environment.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/errno.h
+#include apf27.h
+#include crc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * customer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+static u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * customer use. The APF27 board revision 1 uses the bit 0 to permanently store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+static int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_port_init(int port, u32 gpio_dr, u32 ocr1, u32 ocr2,
+ u32 iconfa1, u32 iconfa2, u32 iconfb1, u32 iconfb2,
+ u32 icr1, u32 icr2, u32 imr, u32 gpio_dir, u32 gpr,
+ u32 puen, u32 gius)
+{
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
+
+ writel(gpio_dr, regs-port[port].gpio_dr);
+ writel(ocr1, regs-port[port].ocr1);
+ writel(ocr2, regs-port[port].ocr2);
+ writel(iconfa1, regs-port[port].iconfa1);
+ writel(iconfa2, regs-port[port].iconfa2);
+ writel(iconfb1, regs-port[port].iconfb1);
+ writel(iconfb2, regs-port[port].iconfb2);
+ writel(icr1, regs-port[port].icr1);
+ writel(icr2, regs-port[port].icr2);
+ writel(imr, regs-port[port].imr);
+ writel
[U-Boot] [PATCH v6 1/3] mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Acked-by: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 +
arch/arm/include/asm/arch-mx27/imx-regs.h |6 +-
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index 8db2a67..629b727 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -38,5 +38,10 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index a27145b..92c847e 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -169,7 +169,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -209,9 +209,13 @@ struct fuse_bank0_regs {
#define IIM_BASE_ADDR IMX_IIM_BASE
#define IMX_FEC_BASE (0x2b000 + IMX_IO_BASE)
+#define IMX_NFC_BASE (0xD800)
#define IMX_ESD_BASE (0xD8001000)
#define IMX_WEIM_BASE (0xD8002000)
+#define NFC_BASE_ADDR IMX_NFC_BASE
+
+
/* FMCR System Control bit definition*/
#define UART4_RXD_CTL (1 25)
#define UART4_RTS_CTL (1 24)
--
1.7.4.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 0/3] apf27: add support of armadeus apf27
Difference between v5 and v4: - use spl framework - use script - use SPDX-License-Identifier - use u-boot-with-spl.bin (instead of u-boot-nand.bin) - fix some comments format issue Difference between v4 and v3: - use standard start.S - use part to know u-boot offset - fix some comments format issue Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (3): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board MAINTAINERS |5 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 + arch/arm/include/asm/arch-mx27/imx-regs.h |6 +- board/armadeus/apf27/Makefile | 33 ++ board/armadeus/apf27/apf27.c | 257 +++ board/armadeus/apf27/apf27.h | 489 + board/armadeus/apf27/fpga.c | 223 + board/armadeus/apf27/fpga.h | 25 ++ board/armadeus/apf27/lowlevel_init.S | 168 ++ boards.cfg|1 + include/configs/apf27.h | 388 +++ 11 files changed, 1599 insertions(+), 1 deletions(-) create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/lowlevel_init.S create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 2/3] apf27: add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
MAINTAINERS |5 +
board/armadeus/apf27/Makefile| 30 ++
board/armadeus/apf27/apf27.c | 252 +
board/armadeus/apf27/apf27.h | 489 ++
board/armadeus/apf27/lowlevel_init.S | 168
boards.cfg |1 +
include/configs/apf27.h | 374 ++
7 files changed, 1319 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 board/armadeus/apf27/lowlevel_init.S
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a900dc..abf8380 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -716,6 +716,11 @@ Ilko Iliev il...@ronetix.at
PM9263 AT91SAM9263
PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (i.MX27 SoC)
+
Michael Jones michael.jo...@matrix-vision.de
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..ec0cb03
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012-2013
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# SPDX-License-Identifier:GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..98c51a7
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,252 @@
+/*
+ * Copyright (C) 2008-2013 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Sascha Hauer, Pengutronix
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include environment.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/errno.h
+#include apf27.h
+#include crc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * customer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+static u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * customer use. The APF27 board revision 1 uses the bit 0 to permanently store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+static int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_port_init(int port, u32 gpio_dr, u32 ocr1, u32 ocr2,
+ u32 iconfa1, u32 iconfa2, u32 iconfb1, u32 iconfb2,
+ u32 icr1, u32 icr2, u32 imr, u32 gpio_dir, u32 gpr,
+ u32 puen, u32 gius)
+{
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
+
+ writel(gpio_dr, regs-port[port].gpio_dr);
+ writel(ocr1, regs-port[port].ocr1);
+ writel(ocr2, regs-port[port].ocr2);
+ writel(iconfa1, regs-port[port].iconfa1);
+ writel(iconfa2, regs-port[port].iconfa2);
+ writel(iconfb1, regs-port[port].iconfb1);
+ writel(iconfb2, regs-port[port].iconfb2);
+ writel(icr1, regs-port[port].icr1);
+ writel(icr2, regs-port[port].icr2);
+ writel(imr, regs-port[port].imr);
+ writel
[U-Boot] [PATCH v5 1/3] mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 +
arch/arm/include/asm/arch-mx27/imx-regs.h |6 +-
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index 8db2a67..629b727 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -38,5 +38,10 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index a27145b..92c847e 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -169,7 +169,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -209,9 +209,13 @@ struct fuse_bank0_regs {
#define IIM_BASE_ADDR IMX_IIM_BASE
#define IMX_FEC_BASE (0x2b000 + IMX_IO_BASE)
+#define IMX_NFC_BASE (0xD800)
#define IMX_ESD_BASE (0xD8001000)
#define IMX_WEIM_BASE (0xD8002000)
+#define NFC_BASE_ADDR IMX_NFC_BASE
+
+
/* FMCR System Control bit definition*/
#define UART4_RXD_CTL (1 25)
#define UART4_RTS_CTL (1 24)
--
1.7.4.4
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 3/3] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c |5 +
board/armadeus/apf27/fpga.c | 223 +
board/armadeus/apf27/fpga.h | 25 +
include/configs/apf27.h | 14 +++
5 files changed, 270 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index ec0cb03..5fcda6e 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -13,6 +13,9 @@ LIB = $(obj)lib$(BOARD).o
COBJS := apf27.o
SOBJS := lowlevel_init.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 98c51a7..cd08bf4 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -19,6 +19,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -181,6 +182,10 @@ int board_init(void)
apf27_setup_port();
apf27_iomux_init();
apf27_devices_init();
+#if defined(CONFIG_FPGA)
+ APF27_init_fpga();
+#endif
+
return 0;
}
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..df2ddc2
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,223 @@
+/*
+ * (C) Copyright 2002-2013
+ * Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com
+ * and
+ * Keith Outwater, keith_outwa...@mvis.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *)fpga_fns,
+0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_PRG, 1);
+ gpio_set_value(ACFG_FPGA_CLK, 1);
+ gpio_set_value(ACFG_FPGA_RW, 1);
+ gpio_set_value(ACFG_FPGA_CS, 1);
+ gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+ gpio_set_value(ACFG_FPGA_PWR, 0);
+ udelay(3); /*wait until supply started*/
+
+ return cookie;
+}
+
+/*
+ * Set the FPGA's active-low program line to the specified level
+ */
+int fpga_pgm_fn(int assert, int flush, int cookie)
+{
+ debug(%s:%d: FPGA PROGRAM %s, __func__, __LINE__,
+ assert ? high : low);
+ gpio_set_value(ACFG_FPGA_PRG, !assert);
+ return assert;
+}
+
+/*
+ * Set the FPGA's active-high clock line to the specified level
+ */
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+ debug(%s:%d: FPGA CLOCK %s, __func__, __LINE__,
+ assert_clk ? high : low);
+ gpio_set_value(ACFG_FPGA_CLK, !assert_clk);
+ return assert_clk;
+}
+
+/*
+ * Test the state of the active-low FPGA INIT line. Return 1 on INIT
+ * asserted (low).
+ */
+int fpga_init_fn(int cookie)
+{
+ int value;
+ debug(%s:%d: INIT check... , __func__, __LINE__);
+ value = gpio_get_value(ACFG_FPGA_INIT);
+ /* printf(init value read %x,value); */
+#ifdef CONFIG_SYS_FPGA_IS_PROTO
+ return value;
+#else
+ return !value;
+#endif
+}
+
+/*
+ * Test the state
[U-Boot] [PATCH v4 3/4] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c | 18 +++
board/armadeus/apf27/fpga.c | 250 +
board/armadeus/apf27/fpga.h | 39 +++
4 files changed, 310 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index 08d5d8d..11562a2 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -29,6 +29,9 @@ LIB = $(obj)lib$(BOARD).o
ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
endif
ifdef CONFIG_SPL_BUILD
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index f64c71a..7c10539 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -30,6 +30,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -321,6 +322,23 @@ int misc_init_r(void)
struct mtd_device *dev;
struct part_info *part;
+#if defined(CONFIG_FPGA)
+ /* init and download fpga */
+ if ((autoload) (0 == strcmp(autoload, 1))) {
+ if (mtdparts_init() == 0)
+ if (find_dev_and_part(firmware,
+ dev, pnum, part) == 0) {
+ size = part-size;
+ if (nand_read_skip_bad(nand_info[0],
+ part-offset, size,
+ NULL, part-size,
+ firmware_buffer))
+ size = 0;
+ }
+ }
+ APF27_init_fpga(firmware_buffer, size);
+#endif
+
/* detect compatibility issue of environment version */
s = getenv(env_version);
if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..4c49667
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,250 @@
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *)fpga_fns,
+0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN
[U-Boot] [PATCH v4 1/4] mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 +
arch/arm/include/asm/arch-mx27/imx-regs.h |2 +-
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..215c562 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -41,5 +41,10 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 8867e9f..51257a8 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -185,7 +185,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
--
1.7.4.4
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[U-Boot] [PATCH v4 0/4] apf27: add support of armadeus apf27
Difference between v4 and v3: - use standard start.S - use part to know u-boot offset - fix some comments format issue Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (4): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board Update u-boot-nand.bin to be used with spl MAINTAINERS |5 + Makefile |6 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 + arch/arm/include/asm/arch-mx27/imx-regs.h |2 +- board/armadeus/apf27/Makefile | 54 +++ board/armadeus/apf27/apf27.c | 374 board/armadeus/apf27/apf27.h | 450 board/armadeus/apf27/fpga.c | 250 ++ board/armadeus/apf27/fpga.h | 39 +++ board/armadeus/apf27/splboot.S| 528 + boards.cfg|1 + include/configs/apf27.h | 446 12 files changed, 2159 insertions(+), 1 deletions(-) create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/splboot.S create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 4/4] Update u-boot-nand.bin to be used with spl
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
Makefile |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index 4218226..b971f30 100644
--- a/Makefile
+++ b/Makefile
@@ -617,8 +617,14 @@ $(obj)u-boot.lds: $(LDSCRIPT)
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
+ifeq ($(CONFIG_SPL),y)
+$(obj)u-boot-nand.bin:$(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) -O binary
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin \
+ cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin
$(obj)u-boot-nand.bin
+else
$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin
$(obj)u-boot-nand.bin
+endif
$(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
$(MAKE) -C spl all
--
1.7.4.4
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[U-Boot] [PATCH RESEND] mx27: add i2c clock
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c |2 ++
arch/arm/include/asm/arch-mx27/clock.h |1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index bffbadd..a9a13cb 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -159,6 +159,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_ARM_CLK:
return imx_get_armclk();
+ case MXC_I2C_CLK:
+ return imx_get_ahbclk()/2;
case MXC_UART_CLK:
return imx_get_perclk1();
case MXC_FEC_CLK:
diff --git a/arch/arm/include/asm/arch-mx27/clock.h
b/arch/arm/include/asm/arch-mx27/clock.h
index fd062d3..2b03a41 100644
--- a/arch/arm/include/asm/arch-mx27/clock.h
+++ b/arch/arm/include/asm/arch-mx27/clock.h
@@ -26,6 +26,7 @@
enum mxc_clock {
MXC_ARM_CLK,
+ MXC_I2C_CLK,
MXC_UART_CLK,
MXC_ESDHC_CLK,
MXC_FEC_CLK,
--
1.7.4.4
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[U-Boot] [PATCH v2] mx27: add function enable_caches
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
v2:
- add flag CONFIG_SYS_DCACHE_OFF
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 41bb84b..bffbadd 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -380,3 +380,11 @@ void mx27_sd2_init_pins(void)
}
#endif /* CONFIG_MXC_MMC */
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif /* CONFIG_SYS_DCACHE_OFF */
--
1.7.4.4
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[U-Boot] [PATCH] mx27: add function enable_caches
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 41bb84b..4239fa0 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -380,3 +380,9 @@ void mx27_sd2_init_pins(void)
}
#endif /* CONFIG_MXC_MMC */
+
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
--
1.7.4.4
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[U-Boot] [PATCH] mx27: add i2c clock
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/generic.c |2 ++
arch/arm/include/asm/arch-mx27/clock.h |1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 4239fa0..25e1250 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -159,6 +159,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_ARM_CLK:
return imx_get_armclk();
+ case MXC_I2C_CLK:
+ return imx_get_ahbclk()/2;
case MXC_UART_CLK:
return imx_get_perclk1();
case MXC_FEC_CLK:
diff --git a/arch/arm/include/asm/arch-mx27/clock.h
b/arch/arm/include/asm/arch-mx27/clock.h
index fd062d3..2b03a41 100644
--- a/arch/arm/include/asm/arch-mx27/clock.h
+++ b/arch/arm/include/asm/arch-mx27/clock.h
@@ -26,6 +26,7 @@
enum mxc_clock {
MXC_ARM_CLK,
+ MXC_I2C_CLK,
MXC_UART_CLK,
MXC_ESDHC_CLK,
MXC_FEC_CLK,
--
1.7.4.4
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[U-Boot] [PATCH] mx27: add missing constant for mx27
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 +
arch/arm/include/asm/arch-mx27/imx-regs.h |3 ++-
2 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..215c562 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -41,5 +41,10 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 8867e9f..707ca4b 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -185,7 +185,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -225,6 +225,7 @@ struct fuse_bank0_regs {
#define IIM_BASE_ADDR IMX_IIM_BASE
#define IMX_FEC_BASE (0x2b000 + IMX_IO_BASE)
+#define IMX_NFC_BASE (0xD800)
#define IMX_ESD_BASE (0xD8001000)
#define IMX_WEIM_BASE (0xD8002000)
--
1.7.4.4
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[U-Boot] [PATCH v3 0/3] apf27: add support of armadeus apf27
Difference between v3 and v2: - rebase on imx branch - merge support and spl patch - clean code of apf27_gpio_init - clean code of start.S - enable only 64MB of ram so it could work on all apf27 Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (3): apf27: add missing constant to mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board MAINTAINERS |5 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34 ++ arch/arm/include/asm/arch-mx27/imx-regs.h | 11 +- arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 + board/armadeus/apf27/Makefile | 51 +++ board/armadeus/apf27/apf27.c | 363 +++ board/armadeus/apf27/apf27.h | 477 + board/armadeus/apf27/fpga.c | 262 ++ board/armadeus/apf27/fpga.h | 39 ++ board/armadeus/apf27/start.S | 538 + board/armadeus/apf27/u-boot-spl.lds | 86 + boards.cfg|1 + include/configs/apf27.h | 445 13 files changed, 2394 insertions(+), 1 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/start.S create mode 100644 board/armadeus/apf27/u-boot-spl.lds create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] apf27: add missing constant to mx27
Add some missing constant (chip select, ...), and
a file mxc_nand.h with the NFC constant.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34
arch/arm/include/asm/arch-mx27/imx-regs.h | 11 -
arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 +
3 files changed, 127 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..b95c58c 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -34,6 +34,7 @@ int main(void)
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
+ DEFINE(CCSR, IMX_PLL_BASE + offsetof(struct pll_regs, ccsr));
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
@@ -41,5 +42,38 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+ DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr2));
+ DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr3));
+ DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr7));
+ DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr10));
+
+ DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u));
+ DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l));
+ DEFINE(CS0A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0a));
+ DEFINE(CS1U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1u));
+ DEFINE(CS1L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1l));
+ DEFINE(CS1A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1a));
+ DEFINE(CS2U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2u));
+ DEFINE(CS2L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2l));
+ DEFINE(CS2A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2a));
+ DEFINE(CS3U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3u));
+ DEFINE(CS3L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3l));
+ DEFINE(CS3A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3a));
+ DEFINE(CS4U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4u));
+ DEFINE(CS4L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4l));
+ DEFINE(CS4A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4a));
+ DEFINE(CS5U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5u));
+ DEFINE(CS5L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5l));
+ DEFINE(CS5A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5a));
+ DEFINE(EIM, IMX_WEIM_BASE + offsetof(struct weim_regs, eim));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 2f6c823..d3a14e1 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -185,7 +185,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -511,4 +511,13 @@ struct fuse_bank0_regs {
#define IIM_ERR_SNSE (1 2)
#define IIM_ERR_PARITYE(1 1)
+/*
+ * Memory areas of the NFC
+ */
+#define IMX_NFC_BASE(0xD800)
+#define IMX_NFC_MAIN_AREA0 (0xD800)
+#define IMX_NFC_MAIN_AREA1 (0xD8000200)
+#define IMX_NFC_SPARE_AREA0 (0xD8000800)
+#define IMX_NFC_REGS(0xD8000E00)
+
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h
b/arch/arm/include/asm/arch-mx27/mxc_nand.h
new file mode 100644
index 000..564419e
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h
@@ -0,0 +1,83 @@
+/*
+ * (c) 2012 Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful
[U-Boot] [PATCH v3 3/3] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
board/armadeus/apf27/Makefile |3 +
board/armadeus/apf27/apf27.c | 16 +++
board/armadeus/apf27/fpga.c | 262 +
board/armadeus/apf27/fpga.h | 39 ++
4 files changed, 320 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index f57f405..9d356a3 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -29,6 +29,9 @@ LIB = $(obj)lib$(BOARD).o
ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
endif
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index cbd09a7..e375a76 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -30,6 +30,7 @@
#include asm/errno.h
#include apf27.h
#include crc.h
+#include fpga.h
DECLARE_GLOBAL_DATA_PTR;
@@ -310,6 +311,21 @@ misc_init_r(void)
struct mtd_device *dev;
struct part_info *part;
+#if defined(CONFIG_FPGA)
+ /* init and download fpga */
+ if ((autoload) (0 == strcmp(autoload, 1))) {
+ if (mtdparts_init() == 0)
+ if (find_dev_and_part(firmware,
+ dev, pnum, part) == 0) {
+ size = part-size;
+ if (nand_read_skip_bad(nand_info[0],
+ part-offset, size, firmware_buffer))
+ size = 0;
+ }
+ }
+ APF27_init_fpga(firmware_buffer, size);
+#endif
+
/* detect compatibility issue of environment version */
s = getenv(env_version);
if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..d5c27a7
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *) fpga_fns,
+0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int
+fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value
[U-Boot] [PATCH 0/4] apf27: add support of armadeus apf27 v2
Difference between v1 and v2: - use spl instead of nand_spl - use gpio api - remove use of useless CONFIG_SYS - remove use of config.mk - remove dead code Philippe Reynes (4): apf27: add missing constant to mx27 apf27: add support for the armadeus APF27 board apf27: add spl support for the apf27 apf27: add FPGA support for the apf27 board MAINTAINERS |5 + arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34 ++ arch/arm/include/asm/arch-mx27/imx-regs.h | 11 +- arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 + board/armadeus/apf27/Makefile | 51 +++ board/armadeus/apf27/apf27.c | 424 ++ board/armadeus/apf27/apf27.h | 477 + board/armadeus/apf27/fpga.c | 262 ++ board/armadeus/apf27/fpga.h | 39 ++ board/armadeus/apf27/start.S | 549 + board/armadeus/apf27/u-boot-spl.lds | 87 + boards.cfg|1 + include/configs/apf27.h | 458 13 files changed, 2480 insertions(+), 1 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h create mode 100644 board/armadeus/apf27/Makefile create mode 100644 board/armadeus/apf27/apf27.c create mode 100644 board/armadeus/apf27/apf27.h create mode 100644 board/armadeus/apf27/fpga.c create mode 100644 board/armadeus/apf27/fpga.h create mode 100644 board/armadeus/apf27/start.S create mode 100644 board/armadeus/apf27/u-boot-spl.lds create mode 100644 include/configs/apf27.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] apf27: add missing constant to mx27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..b95c58c 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -34,6 +34,7 @@ int main(void)
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
+ DEFINE(CCSR, IMX_PLL_BASE + offsetof(struct pll_regs, ccsr));
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
@@ -41,5 +42,38 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+ DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr2));
+ DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr3));
+ DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr7));
+ DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr10));
+
+ DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u));
+ DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l));
+ DEFINE(CS0A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0a));
+ DEFINE(CS1U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1u));
+ DEFINE(CS1L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1l));
+ DEFINE(CS1A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1a));
+ DEFINE(CS2U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2u));
+ DEFINE(CS2L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2l));
+ DEFINE(CS2A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2a));
+ DEFINE(CS3U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3u));
+ DEFINE(CS3L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3l));
+ DEFINE(CS3A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3a));
+ DEFINE(CS4U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4u));
+ DEFINE(CS4L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4l));
+ DEFINE(CS4A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4a));
+ DEFINE(CS5U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5u));
+ DEFINE(CS5L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5l));
+ DEFINE(CS5A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5a));
+ DEFINE(EIM, IMX_WEIM_BASE + offsetof(struct weim_regs, eim));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 2f6c823..d3a14e1 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -185,7 +185,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -511,4 +511,13 @@ struct fuse_bank0_regs {
#define IIM_ERR_SNSE (1 2)
#define IIM_ERR_PARITYE(1 1)
+/*
+ * Memory areas of the NFC
+ */
+#define IMX_NFC_BASE(0xD800)
+#define IMX_NFC_MAIN_AREA0 (0xD800)
+#define IMX_NFC_MAIN_AREA1 (0xD8000200)
+#define IMX_NFC_SPARE_AREA0 (0xD8000800)
+#define IMX_NFC_REGS(0xD8000E00)
+
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h
b/arch/arm/include/asm/arch-mx27/mxc_nand.h
new file mode 100644
index 000..3429601
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h
@@ -0,0 +1,83 @@
+/*
+ * (c) 2012 Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple
[U-Boot] [PATCH 2/4] apf27: add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 1b2da94..297467a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1011,6 +1011,11 @@ Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
armadillo-800evaR8A7740 (RMOBILE SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (imx27 SoC)
+
-
Unknown / orphaned boards:
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..1da9548
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..4f2b821
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,408 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ * Copyright (C) 2008-2012 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include crc.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/errno.h
+#include environment.h
+#include apf27.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * custormer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * custormer use. The APF27 board revision 1 uses the bit 0 to permanently
store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_gpio_init(void
[U-Boot] [PATCH 4/4] apf27: add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index f57f405..9d356a3 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -29,6 +29,9 @@ LIB = $(obj)lib$(BOARD).o
ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+ifdef CONFIG_FPGA
+COBJS += fpga.o
+endif
endif
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 4f2b821..502bc8e 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -21,6 +21,7 @@
#include common.h
#include crc.h
+#include fpga.h
#include jffs2/jffs2.h
#include nand.h
#include netdev.h
@@ -371,6 +372,21 @@ misc_init_r(void)
struct mtd_device *dev;
struct part_info *part;
+#if defined(CONFIG_FPGA)
+ /* init and download fpga */
+ if ((autoload) (0 == strcmp(autoload, 1))) {
+ if (mtdparts_init() == 0)
+ if (find_dev_and_part(firmware,
+ dev, pnum, part) == 0) {
+ size = part-size;
+ if (nand_read_skip_bad(nand_info[0],
+ part-offset, size, firmware_buffer))
+ size = 0;
+ }
+ }
+ APF27_init_fpga(firmware_buffer, size);
+#endif
+
/* detect compatibility issue of environment version */
s = getenv(env_version);
if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..d5c27a7
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include common.h
+
+#include asm/arch/imx-regs.h
+#include asm/gpio.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+#include apf27.h
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *) fpga_fns,
+0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int
+fpga_pre_fn(int cookie)
+{
+ /* Initialize GPIO pins */
+ gpio_set_value(ACFG_FPGA_PWR, 1);
+ imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_RESET, 1);
+ imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+ gpio_set_value(ACFG_FPGA_PRG, 1);
+ gpio_set_value(ACFG_FPGA_CLK, 1);
+ gpio_set_value(ACFG_FPGA_RW, 1);
+ gpio_set_value(ACFG_FPGA_CS, 1);
+ gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+ gpio_set_value(ACFG_FPGA_PWR, 0);
+
+ return
[U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
create mode 100644 board/armadeus/apf27/start.S
create mode 100644 board/armadeus/apf27/u-boot-spl.lds
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index 1da9548..f57f405 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -27,11 +27,14 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+endif
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
+START := $(addprefix $(obj),$(START))
$(LIB):$(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
diff --git a/board/armadeus/apf27/start.S b/board/armadeus/apf27/start.S
new file mode 100644
index 000..374b4ea
--- /dev/null
+++ b/board/armadeus/apf27/start.S
@@ -0,0 +1,549 @@
+/*
+ * IMX27 NAND Flash SPL (Secondary Program Loader)
+ *
+ * Copyright (c) 2008 Armadeus Project / eja
+ *
+ * Based on Freescale NAND SPL
+ *
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (c) 2008-2012 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include config.h
+#include version.h
+#include asm/macro.h
+#include asm/arch/mxc_nand.h
+#include asm/arch/imx-regs.h
+#include generated/asm-offsets.h
+#include apf27.h
+
+/*
+ * Standard NAND flash commands
+ */
+#define NAND_CMD_READ0 0
+#define NAND_CMD_READ1 1
+#define NAND_CMD_PAGEPROG 0x10
+#define NAND_CMD_READOOB 0x50
+#define NAND_CMD_ERASE10x60
+#define NAND_CMD_STATUS0x70
+#define NAND_CMD_STATUS_MULTI 0x71
+#define NAND_CMD_SEQIN 0x80
+#define NAND_CMD_READID0x90
+#define NAND_CMD_ERASE20xd0
+#define NAND_CMD_RESET 0xff
+
+/* Extended commands for large page devices */
+#define NAND_CMD_READSTART 0x30
+#define NAND_CMD_CACHEDPROG0x15
+
+/* Status bits */
+#define NAND_STATUS_FAIL 0x01
+#define NAND_STATUS_FAIL_N10x02
+#define NAND_STATUS_TRUE_READY 0x20
+#define NAND_STATUS_READY 0x40
+#define NAND_STATUS_WP 0x80
+
+ .macro nand_boot
+
+#ifdef CONFIG_BOOT_TRACE_REG
+/*
+ * If CONFIG_BOOT_TRACE_REG is a SDRAM address then be sure to use the
following
+ * 2 command after SDRAM init
+ */
+
+/* Backup state of previous boot to CONFIG_BOOT_TRACE_REG+4*/
+#define BACKUP_TRACE() \
+ ldr r4, =CONFIG_BOOT_TRACE_REG; \
+ ldr r3, [r4]; \
+ str r3, [r4, #0x04];
+
+/* Save a state of boot at CONFIG_BOOT_TRACE_REG */
+#define BOOT_TRACE(val)\
+ ldr r4, =CONFIG_BOOT_TRACE_REG; \
+ ldr r3, =val; \
+ str r3, [r4];
+#else
+#define BACKUP_TRACE()
+#define BOOT_TRACE(val)
+#endif
+
+nand_boot_setup:
+
+ /* Copy SPL image from flash to SDRAM first */
+ BOOT_TRACE(1)
+ ldr r0, =IMX_NFC_MAIN_AREA0
+ add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
+ ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
+
+ BOOT_TRACE(2)
+1: ldmia r0!, {r3-r10}
+ stmia r1!, {r3-r10}
+ cmp r0, r2
+ blo 1b
+
+
+
+ /* Jump to SDRAM */
+ BOOT_TRACE(3)
+ ldr r1, =0x7FF
+ and r0, pc, r1 /* offset of pc */
+ ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
+ add r1, r1, #0x10
+ add pc, r0, r1
+ nop
+ nop
+ nop
+ nop
+
+NAND_Copy_Main:
+ BOOT_TRACE(4)
+ /* r0: nfc base. Reloaded after each page copying */
+ ldr r0, =IMX_NFC_MAIN_AREA0
+
+ /* r1: starting flash addr to be copied. Updated constantly */
+ /* bypass the first preloaded pages */
+ ldr r1, =(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0)
+
+ /* r2: end of 1st RAM buf. Doesn't change */
+ ldr r2, =IMX_NFC_MAIN_AREA1
+
+ /* r12: NFC register base. Doesn't change */
+ ldr r12, =IMX_NFC_REGS
[U-Boot] [PATCH] powerpc: remove not used CONFIG_SYS_TFTP_LOADADDR
CONFIG_SYS_TFTP_LOADADDR is defined on severals boards, but it's never used. So we can safely removed it. Signed-off-by: Philippe Reynes trem...@yahoo.fr --- README|3 --- include/configs/CRAYL1.h |1 - include/configs/GEN860T.h |5 - include/configs/TOP860.h |1 - include/configs/ep8260.h |1 - include/configs/utx8245.h |1 - 6 files changed, 0 insertions(+), 12 deletions(-) diff --git a/README b/README index dd250a0..eeb9e44 100644 --- a/README +++ b/README @@ -2819,9 +2819,6 @@ Configuration Settings: non page size aligned address and this could cause major problems. -- CONFIG_SYS_TFTP_LOADADDR: - Default load address for network file downloads - - CONFIG_SYS_LOADS_BAUD_CHANGE: Enable temporary baudrate change while serial download diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 1daec69..6bceccb 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -153,7 +153,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x10/* where to load what we get from TFTP */ -#define CONFIG_SYS_TFTP_LOADADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ #define CONFIG_SYS_DRAM_TEST 1 diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index b98cacc..9a649ca 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -96,11 +96,6 @@ #defineCONFIG_SYS_LOADS_BAUD_CHANGE /* - * Set default load address for tftp network downloads - */ -#defineCONFIG_SYS_TFTP_LOADADDR 0x0100 - -/* * Turn off the watchdog timer */ #undef CONFIG_WATCHDOG diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h index 36921ca..4849f94 100644 --- a/include/configs/TOP860.h +++ b/include/configs/TOP860.h @@ -416,7 +416,6 @@ #define CONFIG_IPADDR 10.0.4.111 #define CONFIG_SYS_LOAD_ADDR 0x0010 /* default load address */ -#defineCONFIG_SYS_TFTP_LOADADDR0x0010 /* * For booting Linux, the board info and command line data diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index ccfe032..5a87cc5 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -371,7 +371,6 @@ #defineCONFIG_CLOCKS_IN_MHZ1 /* clocks passsed to Linux in MHz */ #define CONFIG_SYS_LOAD_ADDR 0x0010 /* default load address */ -#define CONFIG_SYS_TFTP_LOADADDR 0x0010 /* default load address for network file downloads */ #define CONFIG_SYS_HZ1000 /* decrementer freq: 1 ms ticks */ diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index d203bb4..66568c8 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -65,7 +65,6 @@ #define CONFIG_BOOTARGSroot=/dev/ram console=ttyS0,57600 /* RAMdisk */ #define CONFIG_ETHADDR 00:AA:00:14:00:05 /* UTX5 */ #define CONFIG_SERVERIP10.8.17.105 /* Spree */ -#define CONFIG_SYS_TFTP_LOADADDR 1 #define CONFIG_EXTRA_ENV_SETTINGS \ kernel_addr=FFA0\0 \ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] gpio: add gpio api support to mx27 (v3)
Hi Stefano, + u32 gpio_dr; /* DR */ + u32 gius; + u32 ssr; What about my proposal to change this into gpio_psr ? I mean, if Freescale calls some times the register Sample Status Register and on other SOCs Pad Status Register, but anyway the register does the same, it is not a good reason to follow it. I think you're right, sorry, I read your feedback too fast and missed this one. I update my patch and send a v4. +#ifndef CONFIG_MX27 val = (readl(regs-gpio_psr) gpio) 0x01; +#else + val = (readl(regs-ssr) gpio) 0x01; +#endif Not required if ssr becomes gpio_psr I agree too. Regards, Philippe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] Add gio api support to mx27 (v4)
Change in v4: - rename ssr to gpio_psr in struct gpio_regs - remove useless change in mxc_gpio.c Change in v3: - rebase on u-boot-imx (instead of u-boot) - fix conflit with mxc: Make gpio_get_value() use PSR Philippe Reynes (2): gpio: add gpio api support to mx27 (v4) imx27lite: update with gpio api change (v4) arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++--- arch/arm/include/asm/arch-mx27/gpio.h | 55 + arch/arm/include/asm/arch-mx27/imx-regs.h | 30 board/logicpd/imx27lite/imx27lite.c |5 +-- drivers/gpio/mxc_gpio.c |8 +++-- include/configs/imx27lite-common.h|5 +++ 6 files changed, 80 insertions(+), 34 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] gpio: add gpio api support to mx27 (v4)
The gpio api has been tested on an armadeus apf27.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++---
arch/arm/include/asm/arch-mx27/gpio.h | 55 +
arch/arm/include/asm/arch-mx27/imx-regs.h | 30
drivers/gpio/mxc_gpio.c |8 +++--
4 files changed, 73 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 65c4813..41bb84b 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -24,6 +24,7 @@
#include asm/io.h
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
+#include asm/arch/gpio.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
void imx_gpio_mode(int gpio_mode)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
unsigned int pin = gpio_mode GPIO_PIN_MASK;
unsigned int port = (gpio_mode GPIO_PORT_MASK) GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode GPIO_OCR_MASK) GPIO_OCR_SHIFT;
@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
/* Data direction */
if (gpio_mode GPIO_OUT) {
- writel(readl(regs-port[port].ddir) | 1 pin,
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) | 1 pin,
+ regs-port[port].gpio_dir);
} else {
- writel(readl(regs-port[port].ddir) ~(1 pin),
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) ~(1 pin),
+ regs-port[port].gpio_dir);
}
/* Primary / alternate function */
diff --git a/arch/arm/include/asm/arch-mx27/gpio.h
b/arch/arm/include/asm/arch-mx27/gpio.h
new file mode 100644
index 000..4b4eb0d
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/gpio.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012
+ * Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __ASM_ARCH_MX27_GPIO_H
+#define __ASM_ARCH_MX27_GPIO_H
+
+/* GPIO registers */
+struct gpio_regs {
+ u32 gpio_dir; /* DDIR */
+ u32 ocr1;
+ u32 ocr2;
+ u32 iconfa1;
+ u32 iconfa2;
+ u32 iconfb1;
+ u32 iconfb2;
+ u32 gpio_dr; /* DR */
+ u32 gius;
+ u32 gpio_psr; /* SSR */
+ u32 icr1;
+ u32 icr2;
+ u32 imr;
+ u32 isr;
+ u32 gpr;
+ u32 swr;
+ u32 puen;
+ u32 res[0x2f];
+};
+
+/* This structure is used by the function imx_gpio_mode */
+struct gpio_port_regs {
+ struct gpio_regs port[6];
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index f7cf85b..f78d5f2 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -164,29 +164,6 @@ struct gpt_regs {
#define PORTE 4
#define PORTF 5
-struct gpio_regs {
- struct {
- u32 ddir;
- u32 ocr1;
- u32 ocr2;
- u32 iconfa1;
- u32 iconfa2;
- u32 iconfb1;
- u32 iconfb2;
- u32 dr;
- u32 gius;
- u32 ssr;
- u32 icr1;
- u32 icr2;
- u32 imr;
- u32 isr;
- u32 gpr;
- u32 swr;
- u32 puen;
- u32 res[0x2f];
- } port[6];
-};
-
/* IIM Control Registers */
struct iim_regs {
u32 iim_stat;
@@ -474,6 +451,13 @@ struct fuse_bank0_regs {
#define TSTAT_CAPT (1 1)/* Capture event */
#define TSTAT_COMP 1 /* Compare event */
+#define GPIO1_BASE_ADDR 0x10015000
+#define GPIO2_BASE_ADDR 0x10015100
+#define GPIO3_BASE_ADDR 0x10015200
+#define GPIO4_BASE_ADDR 0x10015300
+#define GPIO5_BASE_ADDR 0x10015400
+#define GPIO6_BASE_ADDR 0x10015500
[U-Boot] [PATCH 2/2] imx27lite: update with gpio api change (v4)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
board/logicpd/imx27lite/imx27lite.c |5 ++---
include/configs/imx27lite-common.h |5 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/board/logicpd/imx27lite/imx27lite.c
b/board/logicpd/imx27lite/imx27lite.c
index 8a5015c..b38e5ab 100644
--- a/board/logicpd/imx27lite/imx27lite.c
+++ b/board/logicpd/imx27lite/imx27lite.c
@@ -23,12 +23,12 @@
#include common.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/gpio.h
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE)
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
@@ -43,8 +43,7 @@ int board_init(void)
#ifdef CONFIG_FEC_MXC
mx27_fec_init_pins();
imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
- writel(readl(regs-port[PORTC].dr) | (1 31),
- regs-port[PORTC].dr);
+ gpio_set_value(GPIO_PORTC | 31, 1);
#endif
#ifdef CONFIG_MXC_MMC
#if defined(CONFIG_MAGNESIUM)
diff --git a/include/configs/imx27lite-common.h
b/include/configs/imx27lite-common.h
index 7d2876b..2e79a9e 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -162,6 +162,11 @@
#define CONFIG_DOS_PARTITION
/*
+ * GPIO
+ */
+#define CONFIG_MXC_GPIO
+
+/*
* MTD partitions
*/
#define CONFIG_CMD_MTDPARTS
--
1.7.4.4
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] Add gio api support to mx27
Change in v3: - rebase on u-boot-imx (instead of u-boot) - fix conflit with mxc: Make gpio_get_value() use PSR Philippe Reynes (2): gpio: add gpio api support to mx27 (v3) imx27lite: update with gpio api change (v3) arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++--- arch/arm/include/asm/arch-mx27/gpio.h | 55 + arch/arm/include/asm/arch-mx27/imx-regs.h | 30 board/logicpd/imx27lite/imx27lite.c |5 +-- drivers/gpio/mxc_gpio.c | 12 +-- include/configs/imx27lite-common.h|5 +++ 6 files changed, 84 insertions(+), 34 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] gpio: add gpio api support to mx27 (v3)
There is a little change on gpio_get_value because
on mx27 the register to read is ssr and not dr.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++---
arch/arm/include/asm/arch-mx27/gpio.h | 55 +
arch/arm/include/asm/arch-mx27/imx-regs.h | 30
drivers/gpio/mxc_gpio.c | 12 +--
4 files changed, 77 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 65c4813..41bb84b 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -24,6 +24,7 @@
#include asm/io.h
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
+#include asm/arch/gpio.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
void imx_gpio_mode(int gpio_mode)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
unsigned int pin = gpio_mode GPIO_PIN_MASK;
unsigned int port = (gpio_mode GPIO_PORT_MASK) GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode GPIO_OCR_MASK) GPIO_OCR_SHIFT;
@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
/* Data direction */
if (gpio_mode GPIO_OUT) {
- writel(readl(regs-port[port].ddir) | 1 pin,
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) | 1 pin,
+ regs-port[port].gpio_dir);
} else {
- writel(readl(regs-port[port].ddir) ~(1 pin),
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) ~(1 pin),
+ regs-port[port].gpio_dir);
}
/* Primary / alternate function */
diff --git a/arch/arm/include/asm/arch-mx27/gpio.h
b/arch/arm/include/asm/arch-mx27/gpio.h
new file mode 100644
index 000..965b584
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/gpio.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012
+ * Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __ASM_ARCH_MX27_GPIO_H
+#define __ASM_ARCH_MX27_GPIO_H
+
+/* GPIO registers */
+struct gpio_regs {
+ u32 gpio_dir; /* DDIR */
+ u32 ocr1;
+ u32 ocr2;
+ u32 iconfa1;
+ u32 iconfa2;
+ u32 iconfb1;
+ u32 iconfb2;
+ u32 gpio_dr; /* DR */
+ u32 gius;
+ u32 ssr;
+ u32 icr1;
+ u32 icr2;
+ u32 imr;
+ u32 isr;
+ u32 gpr;
+ u32 swr;
+ u32 puen;
+ u32 res[0x2f];
+};
+
+/* This structure is used by the function imx_gpio_mode */
+struct gpio_port_regs {
+ struct gpio_regs port[6];
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index f7cf85b..f78d5f2 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -164,29 +164,6 @@ struct gpt_regs {
#define PORTE 4
#define PORTF 5
-struct gpio_regs {
- struct {
- u32 ddir;
- u32 ocr1;
- u32 ocr2;
- u32 iconfa1;
- u32 iconfa2;
- u32 iconfb1;
- u32 iconfb2;
- u32 dr;
- u32 gius;
- u32 ssr;
- u32 icr1;
- u32 icr2;
- u32 imr;
- u32 isr;
- u32 gpr;
- u32 swr;
- u32 puen;
- u32 res[0x2f];
- } port[6];
-};
-
/* IIM Control Registers */
struct iim_regs {
u32 iim_stat;
@@ -474,6 +451,13 @@ struct fuse_bank0_regs {
#define TSTAT_CAPT (1 1)/* Capture event */
#define TSTAT_COMP 1 /* Compare event */
+#define GPIO1_BASE_ADDR 0x10015000
+#define GPIO2_BASE_ADDR 0x10015100
+#define GPIO3_BASE_ADDR 0x10015200
+#define GPIO4_BASE_ADDR 0x10015300
+#define GPIO5_BASE_ADDR 0x10015400
+#define
[U-Boot] [PATCH 2/2] imx27lite: update with gpio api change (v3)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
board/logicpd/imx27lite/imx27lite.c |5 ++---
include/configs/imx27lite-common.h |5 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/board/logicpd/imx27lite/imx27lite.c
b/board/logicpd/imx27lite/imx27lite.c
index 8a5015c..b38e5ab 100644
--- a/board/logicpd/imx27lite/imx27lite.c
+++ b/board/logicpd/imx27lite/imx27lite.c
@@ -23,12 +23,12 @@
#include common.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/gpio.h
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE)
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
@@ -43,8 +43,7 @@ int board_init(void)
#ifdef CONFIG_FEC_MXC
mx27_fec_init_pins();
imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
- writel(readl(regs-port[PORTC].dr) | (1 31),
- regs-port[PORTC].dr);
+ gpio_set_value(GPIO_PORTC | 31, 1);
#endif
#ifdef CONFIG_MXC_MMC
#if defined(CONFIG_MAGNESIUM)
diff --git a/include/configs/imx27lite-common.h
b/include/configs/imx27lite-common.h
index 7d2876b..2e79a9e 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -162,6 +162,11 @@
#define CONFIG_DOS_PARTITION
/*
+ * GPIO
+ */
+#define CONFIG_MXC_GPIO
+
+/*
* MTD partitions
*/
#define CONFIG_CMD_MTDPARTS
--
1.7.4.4
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[U-Boot] [PATCH] rtc: add support of mx27 rtc
This driver has been tested on board armadeus apf27.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/include/asm/arch-mx27/imx-regs.h |3 +
arch/arm/include/asm/arch-mx27/regs-rtc.h | 40 ++
drivers/rtc/Makefile |1 +
drivers/rtc/mx27rtc.c | 83 +
4 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/regs-rtc.h
create mode 100644 drivers/rtc/mx27rtc.c
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index ced5b2a..f7cf85b 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -24,6 +24,8 @@
#ifndef _IMX_REGS_H
#define _IMX_REGS_H
+#include asm/arch/regs-rtc.h
+
#ifndef __ASSEMBLY__
extern void imx_gpio_mode (int gpio_mode);
@@ -224,6 +226,7 @@ struct fuse_bank0_regs {
#define IMX_TIM1_BASE (0x03000 + IMX_IO_BASE)
#define IMX_TIM2_BASE (0x04000 + IMX_IO_BASE)
#define IMX_TIM3_BASE (0x05000 + IMX_IO_BASE)
+#define IMX_RTC_BASE (0x07000 + IMX_IO_BASE)
#define UART1_BASE (0x0a000 + IMX_IO_BASE)
#define UART2_BASE (0x0b000 + IMX_IO_BASE)
#define UART3_BASE (0x0c000 + IMX_IO_BASE)
diff --git a/arch/arm/include/asm/arch-mx27/regs-rtc.h
b/arch/arm/include/asm/arch-mx27/regs-rtc.h
new file mode 100644
index 000..4f92d0f
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/regs-rtc.h
@@ -0,0 +1,40 @@
+/*
+ * Freescale i.MX27 RTC Register Definitions
+ *
+ * Copyright (C) 2012 Philippe Reynes trem...@yahoo.fr
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MX27_REGS_RTC_H__
+#define __MX27_REGS_RTC_H__
+
+#ifndef__ASSEMBLY__
+struct rtc_regs {
+ u32 hourmin;
+ u32 seconds;
+ u32 alrm_hm;
+ u32 alrm_sec;
+ u32 rtcctl;
+ u32 rtcisr;
+ u32 rtcienr;
+ u32 stpwch;
+ u32 dayr;
+ u32 dayalarm;
+};
+#endif /* __ASSEMBLY__*/
+
+#endif /* __MX28_REGS_RTC_H__ */
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index faf4fcd..640f148 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -57,6 +57,7 @@ COBJS-$(CONFIG_RTC_MK48T59) += mk48t59.o
COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o
COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o
COBJS-$(CONFIG_RTC_MV) += mvrtc.o
+COBJS-$(CONFIG_RTC_MX27) += mx27rtc.o
COBJS-$(CONFIG_RTC_MXS) += mxsrtc.o
COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o
COBJS-$(CONFIG_RTC_PL031) += pl031.o
diff --git a/drivers/rtc/mx27rtc.c b/drivers/rtc/mx27rtc.c
new file mode 100644
index 000..7628dec
--- /dev/null
+++ b/drivers/rtc/mx27rtc.c
@@ -0,0 +1,83 @@
+/*
+ * Freescale i.MX27 RTC Driver
+ *
+ * Copyright (C) 2012 Philippe Reynes trem...@yahoo.fr
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include rtc.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+
+#define HOUR_SHIFT 8
+#define HOUR_MASK 0x1f
+#define MIN_SHIFT 0
+#define MIN_MASK 0x3f
+
+int rtc_get(struct rtc_time *time)
+{
+ struct rtc_regs *rtc_regs = (struct rtc_regs *)IMX_RTC_BASE;
+ uint32_t day, hour, min, sec;
+
+ day = readl(rtc_regs-dayr);
+ hour = readl(rtc_regs-hourmin);
+ sec = readl(rtc_regs-seconds);
+
+ min = (hour MIN_SHIFT) MIN_MASK;
+ hour = (hour HOUR_SHIFT) HOUR_MASK;
+
+ sec += min * 60 + hour * 3600 + day * 24 * 3600;
+
+ to_tm(sec, time);
+
+ return 0;
+}
+
+int rtc_set(struct rtc_time *time)
+{
+ struct rtc_regs *rtc_regs = (struct
[U-Boot] [PATCH 1/2] gpio: add gpio api support to mx27 (v2)
There is a little change on gpio_get_value because
on mx27 the register to read is ssr and not dr.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++---
arch/arm/include/asm/arch-mx27/gpio.h | 55 +
arch/arm/include/asm/arch-mx27/imx-regs.h | 30
drivers/gpio/mxc_gpio.c | 12 +--
4 files changed, 77 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 65c4813..41bb84b 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -24,6 +24,7 @@
#include asm/io.h
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
+#include asm/arch/gpio.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
void imx_gpio_mode(int gpio_mode)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
unsigned int pin = gpio_mode GPIO_PIN_MASK;
unsigned int port = (gpio_mode GPIO_PORT_MASK) GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode GPIO_OCR_MASK) GPIO_OCR_SHIFT;
@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
/* Data direction */
if (gpio_mode GPIO_OUT) {
- writel(readl(regs-port[port].ddir) | 1 pin,
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) | 1 pin,
+ regs-port[port].gpio_dir);
} else {
- writel(readl(regs-port[port].ddir) ~(1 pin),
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) ~(1 pin),
+ regs-port[port].gpio_dir);
}
/* Primary / alternate function */
diff --git a/arch/arm/include/asm/arch-mx27/gpio.h
b/arch/arm/include/asm/arch-mx27/gpio.h
new file mode 100644
index 000..965b584
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/gpio.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012
+ * Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __ASM_ARCH_MX27_GPIO_H
+#define __ASM_ARCH_MX27_GPIO_H
+
+/* GPIO registers */
+struct gpio_regs {
+ u32 gpio_dir; /* DDIR */
+ u32 ocr1;
+ u32 ocr2;
+ u32 iconfa1;
+ u32 iconfa2;
+ u32 iconfb1;
+ u32 iconfb2;
+ u32 gpio_dr; /* DR */
+ u32 gius;
+ u32 ssr;
+ u32 icr1;
+ u32 icr2;
+ u32 imr;
+ u32 isr;
+ u32 gpr;
+ u32 swr;
+ u32 puen;
+ u32 res[0x2f];
+};
+
+/* This structure is used by the function imx_gpio_mode */
+struct gpio_port_regs {
+ struct gpio_regs port[6];
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index ced5b2a..4035d2b 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -162,29 +162,6 @@ struct gpt_regs {
#define PORTE 4
#define PORTF 5
-struct gpio_regs {
- struct {
- u32 ddir;
- u32 ocr1;
- u32 ocr2;
- u32 iconfa1;
- u32 iconfa2;
- u32 iconfb1;
- u32 iconfb2;
- u32 dr;
- u32 gius;
- u32 ssr;
- u32 icr1;
- u32 icr2;
- u32 imr;
- u32 isr;
- u32 gpr;
- u32 swr;
- u32 puen;
- u32 res[0x2f];
- } port[6];
-};
-
/* IIM Control Registers */
struct iim_regs {
u32 iim_stat;
@@ -471,6 +448,13 @@ struct fuse_bank0_regs {
#define TSTAT_CAPT (1 1)/* Capture event */
#define TSTAT_COMP 1 /* Compare event */
+#define GPIO1_BASE_ADDR 0x10015000
+#define GPIO2_BASE_ADDR 0x10015100
+#define GPIO3_BASE_ADDR 0x10015200
+#define GPIO4_BASE_ADDR 0x10015300
+#define GPIO5_BASE_ADDR 0x10015400
+#define
[U-Boot] [PATCH 2/2] imx27lite: update with gpio api change (v3)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
board/logicpd/imx27lite/imx27lite.c |5 ++---
include/configs/imx27lite-common.h |5 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/board/logicpd/imx27lite/imx27lite.c
b/board/logicpd/imx27lite/imx27lite.c
index 8a5015c..b38e5ab 100644
--- a/board/logicpd/imx27lite/imx27lite.c
+++ b/board/logicpd/imx27lite/imx27lite.c
@@ -23,12 +23,12 @@
#include common.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/gpio.h
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE)
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
@@ -43,8 +43,7 @@ int board_init(void)
#ifdef CONFIG_FEC_MXC
mx27_fec_init_pins();
imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
- writel(readl(regs-port[PORTC].dr) | (1 31),
- regs-port[PORTC].dr);
+ gpio_set_value(GPIO_PORTC | 31, 1);
#endif
#ifdef CONFIG_MXC_MMC
#if defined(CONFIG_MAGNESIUM)
diff --git a/include/configs/imx27lite-common.h
b/include/configs/imx27lite-common.h
index 7d2876b..2e79a9e 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -162,6 +162,11 @@
#define CONFIG_DOS_PARTITION
/*
+ * GPIO
+ */
+#define CONFIG_MXC_GPIO
+
+/*
* MTD partitions
*/
#define CONFIG_CMD_MTDPARTS
--
1.7.4.4
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Re: [U-Boot] [PATCH 2/2] imx27lite: update with gpio api change
On 05/08/2012 12:00, Philippe Reynes wrote:
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
board/logicpd/imx27lite/imx27lite.c | 7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Hi Philippe,
Hi Stefano,
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE)
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
@@ -43,8 +44,8 @@ int board_init(void)
#ifdef CONFIG_FEC_MXC
mx27_fec_init_pins();
imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
- writel(readl(regs-port[PORTC].dr) | (1 31),
- regs-port[PORTC].dr);
+ writel(readl(regs-port[PORTC].gpio_dr) | (1 31),
+ regs-port[PORTC].gpio_dr);
This is not what I am expecting from the patch when it will move to
generic GPIO API.
The GPIO API uses really generic as in kernel functions, independently
from the SOC where it is running. This hides the physical registers of
the GPIOs.
Instead of that, gpio_set_value(), gpio_get_value(),
gpio_direction_input() and gpio_direction_output() should be used. You
can take a look at other iMX (MX3, MX28, MX5, MX6), that are already
using the generic API.
Oh, I understand. As I don't have this board, I've done the smallest change to
fix the compilation.
I add the driver mxc_gpio on imx27lite, remove this direct acces to gpio
register,
and send the new version of the patch.
regards,
Philippe___
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[U-Boot] [PATCH 1/2] gpio: add gpio api support to mx27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++---
arch/arm/include/asm/arch-mx27/gpio.h | 55 +
arch/arm/include/asm/arch-mx27/imx-regs.h | 30
drivers/gpio/mxc_gpio.c |8 +++--
4 files changed, 73 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 65c4813..41bb84b 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -24,6 +24,7 @@
#include asm/io.h
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
+#include asm/arch/gpio.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
void imx_gpio_mode(int gpio_mode)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
unsigned int pin = gpio_mode GPIO_PIN_MASK;
unsigned int port = (gpio_mode GPIO_PORT_MASK) GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode GPIO_OCR_MASK) GPIO_OCR_SHIFT;
@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
/* Data direction */
if (gpio_mode GPIO_OUT) {
- writel(readl(regs-port[port].ddir) | 1 pin,
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) | 1 pin,
+ regs-port[port].gpio_dir);
} else {
- writel(readl(regs-port[port].ddir) ~(1 pin),
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) ~(1 pin),
+ regs-port[port].gpio_dir);
}
/* Primary / alternate function */
diff --git a/arch/arm/include/asm/arch-mx27/gpio.h
b/arch/arm/include/asm/arch-mx27/gpio.h
new file mode 100644
index 000..965b584
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/gpio.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012
+ * Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __ASM_ARCH_MX27_GPIO_H
+#define __ASM_ARCH_MX27_GPIO_H
+
+/* GPIO registers */
+struct gpio_regs {
+ u32 gpio_dir; /* DDIR */
+ u32 ocr1;
+ u32 ocr2;
+ u32 iconfa1;
+ u32 iconfa2;
+ u32 iconfb1;
+ u32 iconfb2;
+ u32 gpio_dr; /* DR */
+ u32 gius;
+ u32 ssr;
+ u32 icr1;
+ u32 icr2;
+ u32 imr;
+ u32 isr;
+ u32 gpr;
+ u32 swr;
+ u32 puen;
+ u32 res[0x2f];
+};
+
+/* This structure is used by the function imx_gpio_mode */
+struct gpio_port_regs {
+ struct gpio_regs port[6];
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index ced5b2a..4035d2b 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -162,29 +162,6 @@ struct gpt_regs {
#define PORTE 4
#define PORTF 5
-struct gpio_regs {
- struct {
- u32 ddir;
- u32 ocr1;
- u32 ocr2;
- u32 iconfa1;
- u32 iconfa2;
- u32 iconfb1;
- u32 iconfb2;
- u32 dr;
- u32 gius;
- u32 ssr;
- u32 icr1;
- u32 icr2;
- u32 imr;
- u32 isr;
- u32 gpr;
- u32 swr;
- u32 puen;
- u32 res[0x2f];
- } port[6];
-};
-
/* IIM Control Registers */
struct iim_regs {
u32 iim_stat;
@@ -471,6 +448,13 @@ struct fuse_bank0_regs {
#define TSTAT_CAPT (1 1)/* Capture event */
#define TSTAT_COMP 1 /* Compare event */
+#define GPIO1_BASE_ADDR 0x10015000
+#define GPIO2_BASE_ADDR 0x10015100
+#define GPIO3_BASE_ADDR 0x10015200
+#define GPIO4_BASE_ADDR 0x10015300
+#define GPIO5_BASE_ADDR 0x10015400
+#define GPIO6_BASE_ADDR 0x10015500
+
#define GPIO_PIN_MASK 0x1f
#define GPIO_PORT_SHIFT5
diff
[U-Boot] [PATCH 2/2] imx27lite: update with gpio api change
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
board/logicpd/imx27lite/imx27lite.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/board/logicpd/imx27lite/imx27lite.c
b/board/logicpd/imx27lite/imx27lite.c
index 8a5015c..5bd3b68 100644
--- a/board/logicpd/imx27lite/imx27lite.c
+++ b/board/logicpd/imx27lite/imx27lite.c
@@ -23,12 +23,13 @@
#include common.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE)
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
@@ -43,8 +44,8 @@ int board_init(void)
#ifdef CONFIG_FEC_MXC
mx27_fec_init_pins();
imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
- writel(readl(regs-port[PORTC].dr) | (1 31),
- regs-port[PORTC].dr);
+ writel(readl(regs-port[PORTC].gpio_dr) | (1 31),
+ regs-port[PORTC].gpio_dr);
#endif
#ifdef CONFIG_MXC_MMC
#if defined(CONFIG_MAGNESIUM)
--
1.7.4.4
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[U-Boot] [PATCH 1/2] gpio: add gpio api support to mx27 (v2)
There is a little change on gpio_get_value because
on mx27 the register to read is ssr and not dr.
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++---
arch/arm/include/asm/arch-mx27/gpio.h | 55 +
arch/arm/include/asm/arch-mx27/imx-regs.h | 30
drivers/gpio/mxc_gpio.c | 12 +--
4 files changed, 77 insertions(+), 31 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 65c4813..41bb84b 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -24,6 +24,7 @@
#include asm/io.h
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
+#include asm/arch/gpio.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
void imx_gpio_mode(int gpio_mode)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
unsigned int pin = gpio_mode GPIO_PIN_MASK;
unsigned int port = (gpio_mode GPIO_PORT_MASK) GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode GPIO_OCR_MASK) GPIO_OCR_SHIFT;
@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
/* Data direction */
if (gpio_mode GPIO_OUT) {
- writel(readl(regs-port[port].ddir) | 1 pin,
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) | 1 pin,
+ regs-port[port].gpio_dir);
} else {
- writel(readl(regs-port[port].ddir) ~(1 pin),
- regs-port[port].ddir);
+ writel(readl(regs-port[port].gpio_dir) ~(1 pin),
+ regs-port[port].gpio_dir);
}
/* Primary / alternate function */
diff --git a/arch/arm/include/asm/arch-mx27/gpio.h
b/arch/arm/include/asm/arch-mx27/gpio.h
new file mode 100644
index 000..965b584
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/gpio.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012
+ * Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __ASM_ARCH_MX27_GPIO_H
+#define __ASM_ARCH_MX27_GPIO_H
+
+/* GPIO registers */
+struct gpio_regs {
+ u32 gpio_dir; /* DDIR */
+ u32 ocr1;
+ u32 ocr2;
+ u32 iconfa1;
+ u32 iconfa2;
+ u32 iconfb1;
+ u32 iconfb2;
+ u32 gpio_dr; /* DR */
+ u32 gius;
+ u32 ssr;
+ u32 icr1;
+ u32 icr2;
+ u32 imr;
+ u32 isr;
+ u32 gpr;
+ u32 swr;
+ u32 puen;
+ u32 res[0x2f];
+};
+
+/* This structure is used by the function imx_gpio_mode */
+struct gpio_port_regs {
+ struct gpio_regs port[6];
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index ced5b2a..4035d2b 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -162,29 +162,6 @@ struct gpt_regs {
#define PORTE 4
#define PORTF 5
-struct gpio_regs {
- struct {
- u32 ddir;
- u32 ocr1;
- u32 ocr2;
- u32 iconfa1;
- u32 iconfa2;
- u32 iconfb1;
- u32 iconfb2;
- u32 dr;
- u32 gius;
- u32 ssr;
- u32 icr1;
- u32 icr2;
- u32 imr;
- u32 isr;
- u32 gpr;
- u32 swr;
- u32 puen;
- u32 res[0x2f];
- } port[6];
-};
-
/* IIM Control Registers */
struct iim_regs {
u32 iim_stat;
@@ -471,6 +448,13 @@ struct fuse_bank0_regs {
#define TSTAT_CAPT (1 1)/* Capture event */
#define TSTAT_COMP 1 /* Compare event */
+#define GPIO1_BASE_ADDR 0x10015000
+#define GPIO2_BASE_ADDR 0x10015100
+#define GPIO3_BASE_ADDR 0x10015200
+#define GPIO4_BASE_ADDR 0x10015300
+#define GPIO5_BASE_ADDR 0x10015400
+#define
[U-Boot] [PATCH 2/2] imx27lite: update with gpio api change (v2)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
---
board/logicpd/imx27lite/imx27lite.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/board/logicpd/imx27lite/imx27lite.c
b/board/logicpd/imx27lite/imx27lite.c
index 8a5015c..5bd3b68 100644
--- a/board/logicpd/imx27lite/imx27lite.c
+++ b/board/logicpd/imx27lite/imx27lite.c
@@ -23,12 +23,13 @@
#include common.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE)
struct system_control_regs *sc_regs =
(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
@@ -43,8 +44,8 @@ int board_init(void)
#ifdef CONFIG_FEC_MXC
mx27_fec_init_pins();
imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
- writel(readl(regs-port[PORTC].dr) | (1 31),
- regs-port[PORTC].dr);
+ writel(readl(regs-port[PORTC].gpio_dr) | (1 31),
+ regs-port[PORTC].gpio_dr);
#endif
#ifdef CONFIG_MXC_MMC
#if defined(CONFIG_MAGNESIUM)
--
1.7.4.4
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[U-Boot] [PATCH 1/5] [PATCH 1/5] Add missing constant to mx27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34
arch/arm/include/asm/arch-mx27/imx-regs.h | 11 -
arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 +
3 files changed, 127 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
index f3a8d7b..b95c58c 100644
--- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -34,6 +34,7 @@ int main(void)
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
+ DEFINE(CCSR, IMX_PLL_BASE + offsetof(struct pll_regs, ccsr));
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
@@ -41,5 +42,38 @@ int main(void)
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+ DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, gpcr));
+ DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, fmcr));
+ DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr2));
+ DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr3));
+ DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr7));
+ DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE +
+ offsetof(struct system_control_regs, dscr10));
+
+ DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u));
+ DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l));
+ DEFINE(CS0A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0a));
+ DEFINE(CS1U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1u));
+ DEFINE(CS1L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1l));
+ DEFINE(CS1A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1a));
+ DEFINE(CS2U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2u));
+ DEFINE(CS2L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2l));
+ DEFINE(CS2A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2a));
+ DEFINE(CS3U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3u));
+ DEFINE(CS3L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3l));
+ DEFINE(CS3A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3a));
+ DEFINE(CS4U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4u));
+ DEFINE(CS4L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4l));
+ DEFINE(CS4A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4a));
+ DEFINE(CS5U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5u));
+ DEFINE(CS5L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5l));
+ DEFINE(CS5A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5a));
+ DEFINE(EIM, IMX_WEIM_BASE + offsetof(struct weim_regs, eim));
+
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index ced5b2a..fe2861e 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -206,7 +206,7 @@ struct iim_regs {
struct fuse_bank {
u32 fuse_regs[0x20];
u32 fuse_rsvd[0xe0];
- } bank[1];
+ } bank[2];
};
struct fuse_bank0_regs {
@@ -522,4 +522,13 @@ struct fuse_bank0_regs {
#define IIM_ERR_SNSE (1 2)
#define IIM_ERR_PARITYE(1 1)
+/*
+ * Memory areas of the NFC
+ */
+#define IMX_NFC_BASE(0xD800)
+#define IMX_NFC_MAIN_AREA0 (0xD800)
+#define IMX_NFC_MAIN_AREA1 (0xD8000200)
+#define IMX_NFC_SPARE_AREA0 (0xD8000800)
+#define IMX_NFC_REGS(0xD8000E00)
+
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h
b/arch/arm/include/asm/arch-mx27/mxc_nand.h
new file mode 100644
index 000..3429601
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h
@@ -0,0 +1,83 @@
+/*
+ * (c) 2012 Philippe Reynes trem...@yahoo.fr
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS
[U-Boot] [PATCH 2/5] [PATCH 2/5] Add support for the armadeus APF27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
board/armadeus/apf27/Makefile| 52 ++
board/armadeus/apf27/apf27.c | 310 ++
board/armadeus/apf27/config.mk | 38
board/armadeus/apf27/lowlevel_init.S | 275 ++
boards.cfg |1 +
5 files changed, 676 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/config.mk
create mode 100644 board/armadeus/apf27/lowlevel_init.S
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..fe6ba5c
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..75be2c1
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ * Copyright (C) 2008-2012 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include crc.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/errno.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_gpio_init(void)
+{
+ struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+
+ /* PORT A */
+ writel(CONFIG_SYS_DR_A_VAL,regs-port[PORTA].dr);
+ writel(CONFIG_SYS_OCR1_A_VAL, regs-port[PORTA].ocr1);
+ writel(CONFIG_SYS_OCR2_A_VAL, regs-port[PORTA].ocr2);
+ writel(CONFIG_SYS_ICFA1_A_VAL, regs-port[PORTA].iconfa1);
+ writel(CONFIG_SYS_ICFA2_A_VAL, regs-port[PORTA].iconfa2);
+ writel(CONFIG_SYS_ICFB1_A_VAL, regs-port[PORTA].iconfb1);
+ writel(CONFIG_SYS_ICFB2_A_VAL, regs-port[PORTA].iconfb2);
+ writel(CONFIG_SYS_ICR1_A_VAL, regs-port[PORTA].icr1);
+ writel(CONFIG_SYS_ICR2_A_VAL, regs-port[PORTA].icr2
[U-Boot] [PATCH 3/5] [PATCH 3/5] Add nand_spl support for the apf27
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
nand_spl/board/armadeus/apf27/Makefile | 79 +
nand_spl/board/armadeus/apf27/config.mk | 45 +++
nand_spl/board/armadeus/apf27/start.S| 548 ++
nand_spl/board/armadeus/apf27/u-boot.lds | 39 +++
4 files changed, 711 insertions(+), 0 deletions(-)
create mode 100644 nand_spl/board/armadeus/apf27/Makefile
create mode 100644 nand_spl/board/armadeus/apf27/config.mk
create mode 100644 nand_spl/board/armadeus/apf27/start.S
create mode 100644 nand_spl/board/armadeus/apf27/u-boot.lds
diff --git a/nand_spl/board/armadeus/apf27/Makefile
b/nand_spl/board/armadeus/apf27/Makefile
new file mode 100644
index 000..600ef6b
--- /dev/null
+++ b/nand_spl/board/armadeus/apf27/Makefile
@@ -0,0 +1,79 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, s...@denx.de.
+# (C) Copyright 2012
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE)
$(PLATFORM_LDFLAGS)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL
+
+SOBJS = start.o
+COBJS =
+
+SRCS := $(addprefix $(src),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj:= $(OBJTREE)/nand_spl/
+
+ALL= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin
$(nandobj)u-boot-spl-16k.bin \
+ $(nandobj)System.map
+
+all: $(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $ $@
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $ $@
+
+$(nandobj)u-boot-spl: $(OBJS)
+ cd $(LNDIR) $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+$(nandobj)System.map: $(nandobj)u-boot-spl
+ @$(NM) $ | \
+ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw]
\)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+ sort $(nandobj)System.map
+
+
+#
+
+$(obj)%.o: %.S
+ $(CC) $(AFLAGS) -c -o $@ $
+
+$(obj)%.o: %.c
+ $(CC) $(CFLAGS) -c -o $@ $
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/nand_spl/board/armadeus/apf27/config.mk
b/nand_spl/board/armadeus/apf27/config.mk
new file mode 100644
index 000..3063c89
--- /dev/null
+++ b/nand_spl/board/armadeus/apf27/config.mk
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, s...@denx.de.
+# (C) Copyright 2012
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# This config file is used for compilation of armadeus apf27 board
+#
+
+#
+# TEXT_BASE for SPL:
+#
+#
+# This config file is used for compilation of armadeus sources
+#
+# You might change location of U-Boot in memory by setting right TEXT_BASE.
+# This allows for example having one copy located at the end of ram and stored
+# in flash device
[U-Boot] [PATCH 4/5] [PATCH 4/5] Add FPGA support for the apf27 board
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
board/armadeus/apf27/Makefile |2 +-
board/armadeus/apf27/apf27.c | 16 +++
board/armadeus/apf27/fpga.c | 272 +
board/armadeus/apf27/fpga.h | 39 ++
4 files changed, 328 insertions(+), 1 deletions(-)
create mode 100644 board/armadeus/apf27/fpga.c
create mode 100644 board/armadeus/apf27/fpga.h
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index fe6ba5c..7a39426 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS := apf27.o
+COBJS := apf27.o fpga.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 75be2c1..b073703 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -21,6 +21,7 @@
#include common.h
#include crc.h
+#include fpga.h
#include jffs2/jffs2.h
#include nand.h
#include netdev.h
@@ -241,6 +242,21 @@ misc_init_r(void)
struct mtd_device *dev;
struct part_info *part;
+#if defined(CONFIG_FPGA)
+ /* init and download fpga */
+ if ((autoload) (0 == strcmp(autoload, 1))) {
+ if (mtdparts_init() == 0)
+ if (find_dev_and_part(firmware,
+ dev, pnum, part) == 0) {
+ size = part-size;
+ if (nand_read_skip_bad(nand_info[0],
+ part-offset, size, firmware_buffer))
+ size = 0;
+ }
+ }
+ APF27_init_fpga(firmware_buffer, size);
+#endif
+
/* detect compatibility issue of environment version */
s = getenv(env_version);
if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 000..9a9e8da
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,272 @@
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige eric.jarr...@armadeus.org
+ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
+ * Keith Outwater, keith_outwa...@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include common.h
+
+#if defined(CONFIG_FPGA)
+
+#include asm/arch/imx-regs.h
+#include asm/io.h
+#include command.h
+#include config.h
+#include fpga.h
+#include spartan3.h
+
+#define GPIO_PORT(x) ((x GPIO_PORT_MASK) GPIO_PORT_SHIFT)
+#define GPIO_SET(x) writel(readl(gpregs-port[GPIO_PORT(x)].dr) | \
+ (1 (x GPIO_PIN_MASK)), gpregs-port[GPIO_PORT(x)].dr)
+
+/* (DR(GPIO_PORT(x)) |= (1(x GPIO_PIN_MASK))) */
+#define GPIO_CLEAR(x) writel(readl(gpregs-port[GPIO_PORT(x)].dr) \
+ ~(1 (x GPIO_PIN_MASK)), gpregs-port[GPIO_PORT(x)].dr)
+/* (DR(GPIO_PORT(x)) = ~(1(x GPIO_PIN_MASK))) */
+#define GPIO_WRITE(x, y) (y ? GPIO_SET(x) : GPIO_CLEAR(x))
+#define GPIO_READ(x) ((readl(gpregs-port[GPIO_PORT(x)].ssr) \
+ (1 (x GPIO_PIN_MASK))) (x GPIO_PIN_MASK))
+/* ((SSR (GPIO_PORT(x)) (1(x GPIO_PIN_MASK))) (x GPIO_PIN_MASK)) */
+#ifdef FPGA_DEBUG
+#definePRINTF(fmt, args...)printf(fmt, ##args)
+#else
+#definePRINTF(fmt, args...)
+#endif
+
+/* Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+*/
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+ fpga_pre_fn,
+ fpga_pgm_fn,
+ fpga_init_fn,
+ NULL,
+ fpga_done_fn,
+ fpga_clk_fn,
+ fpga_cs_fn,
+ fpga_wr_fn,
+ fpga_rdata_fn,
+ fpga_wdata_fn,
+ fpga_busy_fn,
+ fpga_abort_fn,
+ fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+ {Xilinx_Spartan3,
+slave_parallel,
+1196128l/8,
+(void *) fpga_fns,
+0}
+};
+
+/*
+ * nitialize GPIO port B before download
+ */
+int
[U-Boot] [PATCH 5/5] [PATCH 5/5] Add config file for the apf27
Signed-off-by: Philippe Reynes trem...@yahoo.fr --- include/configs/apf27.h | 916 +++ 1 files changed, 916 insertions(+), 0 deletions(-) create mode 100644 include/configs/apf27.h diff --git a/include/configs/apf27.h b/include/configs/apf27.h new file mode 100644 index 000..985fa1a --- /dev/null +++ b/include/configs/apf27.h @@ -0,0 +1,916 @@ +/* + * + * Configuration settings for the Armadeus Project motherboard APF27 + * + * Copyright (C) 2008-2012 ej / Armadeus Project eric.jarr...@armadeus.org + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_VERSION_VARIABLE +#define CONFIG_ENV_VERSION 3.1 +#define CONFIG_IDENT_STRING apf27 patch 3.6 +#define CONFIG_BOARD_NAME apf27 + +/* + * SoC configurations + */ +#define CONFIG_ARM926EJS /* this is an ARM926EJS CPU */ +#define CONFIG_MX27/* in a Freescale i.MX27 Chip */ +#define CONFIG_MACH_TYPE 1698/* APF27 */ + +/* + * Enable the call to miscellaneous platform dependent initialization. + */ +#define CONFIG_SYS_NO_FLASH/* to be define before config_cmd_default.h */ +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_MISC_INIT_R + +/* + * Board display option + */ +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_DISPLAY_CPUINFO + +/* + * SPL + */ +#define CONFIG_NAND_U_BOOT +/* Copy SPL+U-Boot here */ +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_LOAD_ADDR +/* Size is the partion size */ +#define CONFIG_SYS_NAND_U_BOOT_SIZECONFIG_SYS_MONITOR_LEN + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 + +#define CONFIG_HOSTNAMECONFIG_BOARD_NAME +#define CONFIG_ROOTPATH/tftpboot/ MK_STR(CONFIG_BOARD_NAME) -root + +/* + * U-Boot Commands + */ +#include config_cmd_default.h + +#define CONFIG_CMD_ASKENV /* ask for env variable */ +#define CONFIG_CMD_BSP /* Board Specific functions */ +#define CONFIG_CMD_CACHE /* icache, dcache */ +/*#define CONFIG_CMD_DATE */ /* support for RTC, date/time...*/ +#define CONFIG_CMD_DHCP/* DHCP Support */ +#define CONFIG_CMD_DNS +/*#define CONFIG_CMD_EEPROM */ /* EEPROM read/write support*/ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT /* FAT support */ +/*#define CONFIG_CMD_I2C *//* I2C serial bus support */ +#define CONFIG_CMD_IMX_FUSE/* imx iim fuse */ +#define CONFIG_CMD_MII /* MII support */ +#define CONFIG_CMD_MMC +#define CONFIG_CMD_MTDPARTS/* MTD partition support*/ +#define CONFIG_CMD_NAND/* NAND support */ +#define CONFIG_CMD_NAND_LOCK_UNLOCK +#define CONFIG_CMD_NAND_TRIMFFS +#define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_PING/* ping support */ +#define CONFIG_CMD_SETEXPR /* setexpr support */ +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS + +/* + * Memory configurations + */ +#define CONFIG_NR_DRAM_POPULATED 1 +#define CONFIG_NR_DRAM_BANKS 2 + +#define CONFIG_SYS_SDRAM_MBYTE_SYZE 64 + +#define PHYS_SDRAM_1 0xA000 +#define PHYS_SDRAM_2 0xB000 +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (51210)) +#define CONFIG_SYS_GBL_DATA_SIZE 256 /* Initial data */ +#define CONFIG_SYS_MEMTEST_START 0xA000 /* memtest test area */ +#define CONFIG_SYS_MEMTEST_END 0xA030 /* 3 MiB RAM test */ + +#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE \ + + PHYS_SDRAM_1_SIZE - 0x010) + +#define CONFIG_SYS_TEXT_BASE 0xA100 + +/* + * FLASH organization + */ +/*#define CONFIG_SYS_MONITOR_BASE 0xAFF0*/ +#defineCONFIG_SYS_MONITOR_OFFSET 0x +#defineCONFIG_SYS_MONITOR_LEN 0x0010 /* 1MiB */ +#define CONFIG_ENV_IS_IN_NAND +#define
