Re: [PATCH V4 2/2] configs: andes: add watchdog support fot andes ae350

2024-01-30 Thread Randolph Lin 
On Wed, Jan 24, 2024 at 09:37:41AM +0100, Stefan Roese wrote:
Hi Stefan,
Thank you for testing and reviewing.
I have checked the error message and the relationship to my patch.
The reason for the failure has nothing to do with my patch.
Could you kindly help me run the CI test again?

Randolph
Sincerely
> Hi Randolph,
> 
> On 1/24/24 07:21, Randolph wrote:
> > It adds the ATCWDT200 support for Andes AE350 platform.
> > It also enables wdt command support.
> > 
> > Signed-off-by: CL Wang 
> > Signed-off-by: Randolph 
> > Reviewed-by: Leo Yu-Chi Liang 
> 
> This fails in world CI build in "test.py for sandbox":
> 
> https://dev.azure.com/sr0718/0cded7c3-6e6a-4b57-8d0f-65c99496c42f/_apis/build/builds/338/logs/181
> 
> Not sure how this is related. Could you please take a look?
> 
> Thanks,
> Stefan
> 
> > ---
> >   configs/ae350_rv32_defconfig | 4 
> >   configs/ae350_rv32_spl_defconfig | 4 
> >   configs/ae350_rv32_spl_xip_defconfig | 4 
> >   configs/ae350_rv32_xip_defconfig | 4 
> >   configs/ae350_rv64_defconfig | 4 
> >   configs/ae350_rv64_spl_defconfig | 4 
> >   configs/ae350_rv64_spl_xip_defconfig | 4 
> >   configs/ae350_rv64_xip_defconfig | 4 
> >   8 files changed, 32 insertions(+)
> > 
> > diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
> > index 3bfa3e9f8e..35ad62c845 100644
> > --- a/configs/ae350_rv32_defconfig
> > +++ b/configs/ae350_rv32_defconfig
> > @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="RISC-V # "
> >   CONFIG_CMD_IMLS=y
> >   CONFIG_CMD_MMC=y
> >   CONFIG_CMD_SF_TEST=y
> > +CONFIG_CMD_WDT=y
> >   # CONFIG_CMD_SETEXPR is not set
> >   CONFIG_BOOTP_PREFER_SERVERIP=y
> >   CONFIG_CMD_CACHE=y
> > @@ -49,3 +50,6 @@ CONFIG_BAUDRATE=38400
> >   CONFIG_SYS_NS16550=y
> >   CONFIG_SPI=y
> >   CONFIG_ATCSPI200_SPI=y
> > +# CONFIG_WATCHDOG_AUTOSTART is not set
> > +CONFIG_WDT=y
> > +CONFIG_WDT_ATCWDT200=y
> > diff --git a/configs/ae350_rv32_spl_defconfig 
> > b/configs/ae350_rv32_spl_defconfig
> > index aeb50206d2..41cd457bc3 100644
> > --- a/configs/ae350_rv32_spl_defconfig
> > +++ b/configs/ae350_rv32_spl_defconfig
> > @@ -33,6 +33,7 @@ CONFIG_SYS_PROMPT="RISC-V # "
> >   CONFIG_CMD_IMLS=y
> >   CONFIG_CMD_MMC=y
> >   CONFIG_CMD_SF_TEST=y
> > +CONFIG_CMD_WDT=y
> >   # CONFIG_CMD_SETEXPR is not set
> >   CONFIG_BOOTP_PREFER_SERVERIP=y
> >   CONFIG_CMD_CACHE=y
> > @@ -58,3 +59,6 @@ CONFIG_SYS_NS16550=y
> >   CONFIG_SPI=y
> >   CONFIG_ATCSPI200_SPI=y
> >   # CONFIG_BINMAN_FDT is not set
> > +# CONFIG_WATCHDOG_AUTOSTART is not set
> > +CONFIG_WDT=y
> > +CONFIG_WDT_ATCWDT200=y
> > diff --git a/configs/ae350_rv32_spl_xip_defconfig 
> > b/configs/ae350_rv32_spl_xip_defconfig
> > index f15ec301ce..954e2f2de7 100644
> > --- a/configs/ae350_rv32_spl_xip_defconfig
> > +++ b/configs/ae350_rv32_spl_xip_defconfig
> > @@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="RISC-V # "
> >   CONFIG_CMD_IMLS=y
> >   CONFIG_CMD_MMC=y
> >   CONFIG_CMD_SF_TEST=y
> > +CONFIG_CMD_WDT=y
> >   # CONFIG_CMD_SETEXPR is not set
> >   CONFIG_BOOTP_PREFER_SERVERIP=y
> >   CONFIG_CMD_CACHE=y
> > @@ -59,3 +60,6 @@ CONFIG_SYS_NS16550=y
> >   CONFIG_SPI=y
> >   CONFIG_ATCSPI200_SPI=y
> >   # CONFIG_BINMAN_FDT is not set
> > +# CONFIG_WATCHDOG_AUTOSTART is not set
> > +CONFIG_WDT=y
> > +CONFIG_WDT_ATCWDT200=y
> > diff --git a/configs/ae350_rv32_xip_defconfig 
> > b/configs/ae350_rv32_xip_defconfig
> > index c40eb043c5..95863595d2 100644
> > --- a/configs/ae350_rv32_xip_defconfig
> > +++ b/configs/ae350_rv32_xip_defconfig
> > @@ -24,6 +24,7 @@ CONFIG_SYS_PROMPT="RISC-V # "
> >   CONFIG_CMD_IMLS=y
> >   CONFIG_CMD_MMC=y
> >   CONFIG_CMD_SF_TEST=y
> > +CONFIG_CMD_WDT=y
> >   # CONFIG_CMD_SETEXPR is not set
> >   CONFIG_BOOTP_PREFER_SERVERIP=y
> >   CONFIG_CMD_CACHE=y
> > @@ -50,3 +51,6 @@ CONFIG_BAUDRATE=38400
> >   CONFIG_SYS_NS16550=y
> >   CONFIG_SPI=y
> >   CONFIG_ATCSPI200_SPI=y
> > +# CONFIG_WATCHDOG_AUTOSTART is not set
> > +CONFIG_WDT=y
> > +CONFIG_WDT_ATCWDT200=y
> > diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
> > index 7ae938aeb2..988214285a 100644
> > --- a/configs/ae350_rv64_defconfig
> > +++ b/configs/ae350_rv64_defconfig
> > @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="RISC-V # "
> >   CONFIG_CMD_IMLS=y
> >   CONFIG_CMD_MMC=y
> >   CONFIG_CMD_SF_TEST=y
> > +CONFIG_CMD_WDT=y
> >   # CONFIG_CMD_SETEXPR is not set
> >   CONFIG_BOOTP_PREFER_SERVERIP=y
> >   CONFIG_CMD_CACHE=y
> > @@ -49,3 +50,6 @@ CONFIG_BAUDRATE=38400
> >   CONFIG_SYS_NS16550=y
> >   CONFIG_SPI=y
> >   CONFIG_ATCSPI200_SPI=y
> > +# CONFIG_WATCHDOG_AUTOSTART is not set
> > +CONFIG_WDT=y
> > +CONFIG_WDT_ATCWDT200=y
> > diff --git a/configs/ae350_rv64_spl_defconfig 
> > b/configs/ae350_rv64_spl_defconfig
> > index 68ac4325ab..e929320433 100644
> > --- a/configs/ae350_rv64_spl_defconfig
> > +++ b/configs/ae350_rv64_spl_defconfig
> > @@ -33,6 +33,7 @@ CONFIG_SYS_PROMPT="RISC-V # "
> >   CONFIG_CMD_IMLS=y
> >   CONFIG_CMD_MMC=y
> >   CONFIG_CMD_SF_TEST=y
> >

Re: [PATCH] riscv: binman: fix the load field format

2023-11-13 Thread Randolph Lin 
Hi Simon,
Thanks a lot.
On Fri, Nov 10, 2023 at 04:50:24AM -0700, Simon Glass wrote:
> Hi Randolph,
> 
> On Wed, Nov 8, 2023, 20:15 Randolph  wrote:
> >
> > The #address-cells is now equal to 2. The format of the load field for
> > the Linux kernel doesn't match.
> >
> > Signed-off-by: Randolph 
> > ---
> >  arch/riscv/dts/binman.dtsi | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
> > index 6b4eb8dc7b..5117d7c8c9 100644
> > --- a/arch/riscv/dts/binman.dtsi
> > +++ b/arch/riscv/dts/binman.dtsi
> > @@ -50,7 +50,8 @@
> > os = "Linux";
> > arch = "riscv";
> > compression = "none";
> > -   load = ;
> > +   load = 
> >  > +   
> > U64_TO_U32_L(CONFIG_TEXT_BASE)>;
> 
I just see the #address-cells changed from 1 to 2 in commit id: 5a348ccf0257.
In my last commit for binman.dtsi (commit id: d311df8b3169), it is based on
the value of #address-cells being 1. That's the reason for my patch submission.
> Does this work?
> 
> load = /bits 64/ 
>
Yes, it works. We use this way for the DDR memory start address above 4G 
platform. We find the example for 64bit address in the document 
tools/binman/binman.rst and use it.
What is the method that we should continue to use in the binman.dtsi?
1. #address-cells = 2
2. append /bits/64 
> >
> > linux_blob: blob-ext {
> > filename = "Image";
> > --
> > 2.34.1
> >
> 
> Regards,
> Simon

Re: Falcon mode on RISC-V

2023-10-19 Thread Randolph Lin 
On Thu, Oct 19, 2023 at 10:49:56PM +0200, Heinrich Schuchardt wrote:
Hi Heinrich
> Hello Randolph,
> 
> I just saw your patches merged to enable Falcon mode on RISC-V using
> CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT. I did not see any documentation update.
> 
> Should information about your development be added to
> doc/develop/falcon.rst? Would you be willing to provide a patch?
> 
> Best regards
> 
> Heinrich
Thanks a lot, I will update it ASAP.

Randolph
Sincerely