[U-Boot] [PATCH v4 1/2] NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
drivers/net/tsec.c | 21 +--
include/asm-ppc/immap_83xx.h | 11 +-
include/asm-ppc/immap_85xx.h |9
include/asm-ppc/immap_86xx.h | 10 -
include/tsec.h | 44 +-
5 files changed, 60 insertions(+), 35 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3f74118..d8b6619 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -5,7 +5,7 @@
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
- * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2009 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc.
* author Andy Fleming
*
@@ -80,7 +80,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -133,6 +133,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -219,7 +220,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -242,7 +243,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -287,11 +288,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -303,12 +304,10 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -733,7 +732,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1766,7 +1765,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..6dd477c 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2009 Freescale Semiconductor, Inc.
*
* MPC83xx Internal Memory Map
*
@@ -868,4 +868,13
[U-Boot] [PATCH v4 2/2] NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_83xx.h |2 +-
include/asm-ppc/immap_85xx.h |6 +-
include/asm-ppc/immap_86xx.h |2 +-
include/configs/P1_P2_RDB.h |5 +
include/tsec.h |7 +++
5 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 6dd477c..2e6ba2d 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -872,7 +872,7 @@ typedef struct immap {
#define CONFIG_SYS_TSEC1_OFFSET0x24000
#define TSEC_SIZE 0x01000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define TSEC_MDIO_OFFSET 0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 54b43b1..2f2ebfe 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,9 +1933,13 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET0xB
+#else
#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#endif
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define TSEC_MDIO_OFFSET 0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index be2eadd..783ea2e 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1300,7 +1300,7 @@ extern immap_t *immr;
#define CONFIG_SYS_TSEC1_OFFSET0x24000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define TSEC_MDIO_OFFSET 0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 310242e..4d93ed8 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -84,6 +84,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_MP
#endif
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
/*
* These can be toggled for performance analysis, otherwise use default.
*/
diff --git a/include/tsec.h b/include/tsec.h
index 5c13d52..e33ef61 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -456,12 +456,19 @@ typedef struct tsec_hash_regs
} tsec_hash_t;
typedef struct tsec_mdio {
+ uintres1[4];
+ uintieventm;
+ uintimaskm;
+ uintres2;
+ uintemapm;
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
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U-Boot@lists.denx.de
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[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
*. The changes have been tested on P2020RDB and MPC8315ERDB.
*. Included the comments from Kumar Gala and Kim Phillips.
drivers/net/tsec.c | 21 +--
include/asm-ppc/immap_83xx.h | 11 +-
include/asm-ppc/immap_85xx.h |9
include/asm-ppc/immap_86xx.h | 10 -
include/tsec.h | 44 +-
5 files changed, 60 insertions(+), 35 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3f74118..d8b6619 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -5,7 +5,7 @@
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
- * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2009 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc.
* author Andy Fleming
*
@@ -80,7 +80,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -133,6 +133,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -219,7 +220,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -242,7 +243,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -287,11 +288,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -303,12 +304,10 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -733,7 +732,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1766,7 +1765,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..6dd477c 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2004-2009 Freescale Semiconductor, Inc
[U-Boot] [PATCH v3 2/2] NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_83xx.h |2 +-
include/asm-ppc/immap_85xx.h |6 +-
include/asm-ppc/immap_86xx.h |2 +-
include/configs/P1_P2_RDB.h |5 +
include/tsec.h |7 +++
5 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 6dd477c..2e6ba2d 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -872,7 +872,7 @@ typedef struct immap {
#define CONFIG_SYS_TSEC1_OFFSET0x24000
#define TSEC_SIZE 0x01000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define TSEC_MDIO_OFFSET 0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 54b43b1..2f2ebfe 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,9 +1933,13 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET0xB
+#else
#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#endif
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define TSEC_MDIO_OFFSET 0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index be2eadd..783ea2e 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1300,7 +1300,7 @@ extern immap_t *immr;
#define CONFIG_SYS_TSEC1_OFFSET0x24000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define TSEC_MDIO_OFFSET 0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 310242e..4d93ed8 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -84,6 +84,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_MP
#endif
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
/*
* These can be toggled for performance analysis, otherwise use default.
*/
diff --git a/include/tsec.h b/include/tsec.h
index d895d02..fc2f075 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -456,12 +456,19 @@ typedef struct tsec_hash_regs
} tsec_hash_t;
typedef struct tsec_mdio {
+ uintres1[4];
+ uintieventm;
+ uintimaskm;
+ uintres2;
+ uintemapm;
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
drivers/net/tsec.c | 19 -
include/asm-ppc/immap_83xx.h |9
include/asm-ppc/immap_85xx.h | 10 +
include/asm-ppc/immap_86xx.h |9
include/tsec.h | 45 -
5 files changed, 59 insertions(+), 33 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3f74118..34f3be9 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -80,7 +80,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -133,6 +133,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -219,7 +220,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -242,7 +243,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -287,11 +288,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -303,12 +304,10 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -733,7 +732,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1766,7 +1765,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..57b1a72 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -868,4 +868,13 @@ typedef struct immap {
#endif
#define CONFIG_SYS_MPC83xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
+
+#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#define TSEC_SIZE 0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define MDIO_OFFSET0x01000
+
+#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR
[U-Boot] [PATCH v3 2/2] NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_85xx.h |7 ++-
include/configs/P1_P2_RDB.h |5 +
include/tsec.h | 11 +++
3 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index ad3910c..9a5326a 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,10 +1933,15 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET0xB
+#else
#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#endif
+
#define TSEC_SIZE 0x01000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define MDIO_OFFSET0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 310242e..4d93ed8 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -84,6 +84,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_MP
#endif
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
/*
* These can be toggled for performance analysis, otherwise use default.
*/
diff --git a/include/tsec.h b/include/tsec.h
index 92ac49a..0727cbe 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -453,14 +453,25 @@ typedef struct tsec_hash_regs
uintres2[24];
} tsec_hash_t;
+/* MDIO structure for etsec2.0.
+ * Backward compatible to etsec1.x
+ */
+
typedef struct tsec_mdio
{
+ uintres1[4];
+ uintieventm;/* MDIO Interrupt event register */
+ uintimaskm; /* MDIO Interrupt mask register */
+ uintres2;
+ uintemapm; /* MDIO Event mapping register */
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
drivers/net/tsec.c | 20 +-
include/asm-ppc/immap_83xx.h |9
include/asm-ppc/immap_85xx.h | 10 +
include/asm-ppc/immap_86xx.h |9
include/tsec.h | 43 +++--
5 files changed, 58 insertions(+), 33 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 5c3d261..2ad033e 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -83,7 +83,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -136,6 +136,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -222,7 +223,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -245,7 +246,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -290,11 +291,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -739,7 +739,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1772,7 +1772,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..57b1a72 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -868,4 +868,13 @@ typedef struct immap {
#endif
#define CONFIG_SYS_MPC83xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
+
+#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#define TSEC_SIZE 0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define MDIO_OFFSET0x01000
+
+#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR
[U-Boot] [PATCH] NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_85xx.h |7 ++-
include/configs/P1_P2_RDB.h |5 +
include/tsec.h | 11 +++
3 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index ad3910c..9a5326a 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,10 +1933,15 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET0xB
+#else
#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#endif
+
#define TSEC_SIZE 0x01000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define MDIO_OFFSET0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 8e97ad0..77c43e7 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -68,6 +68,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_MP
#endif
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
/*
* These can be toggled for performance analysis, otherwise use default.
*/
diff --git a/include/tsec.h b/include/tsec.h
index 2b9c9c3..e881082 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -451,14 +451,25 @@ typedef struct tsec_hash_regs
uintres2[24];
} tsec_hash_t;
+/* MDIO structure for etsec2.0.
+ * Backward compatible to etsec1.x
+ */
+
typedef struct tsec_mdio
{
+ uintres1[4];
+ uintieventm;/* MDIO Interrupt event register */
+ uintimaskm; /* MDIO Interrupt mask register */
+ uintres2;
+ uintemapm; /* MDIO Event mapping register */
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
drivers/net/tsec.c | 20 +-
include/asm-ppc/immap_83xx.h |9
include/asm-ppc/immap_85xx.h | 10 +
include/asm-ppc/immap_86xx.h |9
include/tsec.h | 43 +++--
5 files changed, 58 insertions(+), 33 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 5c3d261..2ad033e 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -83,7 +83,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -136,6 +136,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -222,7 +223,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -245,7 +246,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -290,11 +291,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -739,7 +739,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1772,7 +1772,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..57b1a72 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -868,4 +868,13 @@ typedef struct immap {
#endif
#define CONFIG_SYS_MPC83xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
+
+#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#define TSEC_SIZE 0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define MDIO_OFFSET0x01000
+
+#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR
[U-Boot] [PATCH v2 2/2] NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_85xx.h |7 ++-
include/configs/P1_P2_RDB.h |5 +
include/tsec.h | 11 +++
3 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index ad3910c..9a5326a 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,10 +1933,15 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET0xB
+#else
#define CONFIG_SYS_TSEC1_OFFSET0x24000
+#endif
+
#define TSEC_SIZE 0x01000
-#define CONFIG_SYS_MDIO1_OFFSET0x24520
+#define CONFIG_SYS_MDIO1_OFFSET0x24000
#define MDIO_OFFSET0x01000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 8e97ad0..77c43e7 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -68,6 +68,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_MP
#endif
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
/*
* These can be toggled for performance analysis, otherwise use default.
*/
diff --git a/include/tsec.h b/include/tsec.h
index 2b9c9c3..e881082 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -451,14 +451,25 @@ typedef struct tsec_hash_regs
uintres2[24];
} tsec_hash_t;
+/* MDIO structure for etsec2.0.
+ * Backward compatible to etsec1.x
+ */
+
typedef struct tsec_mdio
{
+ uintres1[4];
+ uintieventm;/* MDIO Interrupt event register */
+ uintimaskm; /* MDIO Interrupt mask register */
+ uintres2;
+ uintemapm; /* MDIO Event mapping register */
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 1/2] NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
drivers/net/tsec.c | 20
include/asm-ppc/immap_85xx.h | 10
include/tsec.h | 48 +++--
3 files changed, 56 insertions(+), 22 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 5c3d261..2ad033e 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -83,7 +83,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -136,6 +136,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -222,7 +223,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -245,7 +246,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -290,11 +291,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -739,7 +739,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1772,7 +1772,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 4194295..6c9baac 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1932,4 +1932,14 @@ typedef struct ccsr_gur {
#define CONFIG_SYS_MPC85xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
+/* TSEC and MDIO OFFSETS */
+#define CONFIG_SYS_TSEC1_OFFSET(0x24000)
+#define TSEC_SIZE (0x01000)
+
+#define CONFIG_SYS_MDIO1_OFFSET(0x24520)
+#define MDIO_OFFSET(0x01000)
+
+#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
+
#endif /*__IMMAP_85xx__*/
diff --git a/include/tsec.h b/include
[U-Boot] [PATCH v1 2/2] NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_85xx.h |6 +-
include/configs/P1_P2_RDB.h |5 +
include/tsec.h | 13 -
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 6c9baac..fccfca5 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1933,10 +1933,14 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_TSECV2
+#define CONFIG_SYS_TSEC1_OFFSET(0xB)
+#else
#define CONFIG_SYS_TSEC1_OFFSET(0x24000)
+#endif
#define TSEC_SIZE (0x01000)
-#define CONFIG_SYS_MDIO1_OFFSET(0x24520)
+#define CONFIG_SYS_MDIO1_OFFSET(0x24000)
#define MDIO_OFFSET(0x01000)
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 8e97ad0..77c43e7 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -68,6 +68,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_MP
#endif
+/* TSECV2 */
+#if defined(CONFIG_P1020)
+#define CONFIG_TSECV2
+#endif
+
/*
* These can be toggled for performance analysis, otherwise use default.
*/
diff --git a/include/tsec.h b/include/tsec.h
index 342c07e..a915266 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -29,7 +29,7 @@
#endif
#ifndef CONFIG_SYS_MDIO1_OFFSET
-#define CONFIG_SYS_MDIO1_OFFSET(0x24520)
+#define CONFIG_SYS_MDIO1_OFFSET(0x24000)
#endif
#ifndef MDIO_OFFSET
@@ -478,14 +478,25 @@ typedef struct tsec_hash_regs
uintres2[24];
} tsec_hash_t;
+/* MDIO structure for etsec2.0.
+ * Backward compatible to etsec1.x
+ */
+
typedef struct tsec_mdio
{
+ uintres1[4];
+ uintieventm;/* MDIO Interrupt event register */
+ uintimaskm; /* MDIO Interrupt mask register */
+ uintres2;
+ uintemapm; /* MDIO Event mapping register */
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v0 2/2] u-boot-2009.08 NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
include/asm-ppc/immap_85xx.h |6 +-
include/tsec.h | 13 -
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index dc82f49..bbeb585 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1936,10 +1936,14 @@ typedef struct ccsr_gur {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
/* TSEC and MDIO OFFSETS */
+#ifdef CONFIG_P1020
+#define CONFIG_SYS_TSEC1_OFFSET(0xB)
+#else
#define CONFIG_SYS_TSEC1_OFFSET(0x24000)
+#endif
#define TSEC_SIZE (0x01000)
-#define CONFIG_SYS_MDIO1_OFFSET(0x24520)
+#define CONFIG_SYS_MDIO1_OFFSET(0x24000)
#define MDIO_OFFSET(0x01000)
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
diff --git a/include/tsec.h b/include/tsec.h
index 342c07e..a915266 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -29,7 +29,7 @@
#endif
#ifndef CONFIG_SYS_MDIO1_OFFSET
-#define CONFIG_SYS_MDIO1_OFFSET(0x24520)
+#define CONFIG_SYS_MDIO1_OFFSET(0x24000)
#endif
#ifndef MDIO_OFFSET
@@ -478,14 +478,25 @@ typedef struct tsec_hash_regs
uintres2[24];
} tsec_hash_t;
+/* MDIO structure for etsec2.0.
+ * Backward compatible to etsec1.x
+ */
+
typedef struct tsec_mdio
{
+ uintres1[4];
+ uintieventm;/* MDIO Interrupt event register */
+ uintimaskm; /* MDIO Interrupt mask register */
+ uintres2;
+ uintemapm; /* MDIO Event mapping register */
+ uintres3[320];
uintmiimcfg;/* MII Management: Configuration */
uintmiimcom;/* MII Management: Command */
uintmiimadd;/* MII Management: Address */
uintmiimcon;/* MII Management: Control */
uintmiimstat; /* MII Management: Status */
uintmiimind;/* MII Management: Indicators */
+ uintres4[690];
} tsec_mdio_t;
typedef struct tsec
--
1.5.2.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v0 1/2] u-boot-2009.08 NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different
Signed-off-by: Sandeep Gopalpet sandeep.ku...@freescale.com
---
drivers/net/tsec.c | 20
include/asm-ppc/immap_85xx.h | 10
include/tsec.h | 48 +++--
3 files changed, 56 insertions(+), 22 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 5c3d261..2ad033e 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -83,7 +83,7 @@ static struct tsec_info_struct tsec_info[] = {
#ifdef CONFIG_MPC85XX_FEC
{
.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
- .miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+ .miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
.devname = CONFIG_MPC85XX_FEC_NAME,
.phyaddr = FEC_PHY_ADDR,
.flags = FEC_FLAGS
@@ -136,6 +136,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct
*tsec_info)
privlist[num_tsecs++] = priv;
priv-regs = tsec_info-regs;
priv-phyregs = tsec_info-miiregs;
+ priv-phyregs_sgmii = tsec_info-miiregs_sgmii;
priv-phyaddr = tsec_info-phyaddr;
priv-flags = tsec_info-flags;
@@ -222,7 +223,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
}
/* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
uint reg, uint value)
{
int timeout = 100;
@@ -245,7 +246,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs,
uint addr,
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint
regnum)
{
uint value;
@@ -290,11 +291,11 @@ static void tsec_configure_serdes(struct tsec_private
*priv)
{
/* Access TBI PHY registers at given TSEC register offset as opposed to
the
* register offset used for external PHY accesses */
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_ANA,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_ANA,
TBIANA_SETTINGS);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_TBICON,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa,
TBI_TBICON,
TBICON_CLK_SELECT);
- tsec_local_mdio_write(priv-regs, priv-regs-tbipa, TBI_CR,
+ tsec_local_mdio_write(priv-phyregs_sgmii, priv-regs-tbipa, TBI_CR,
TBICR_SETTINGS);
}
@@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev)
{
struct tsec_private *priv = (struct tsec_private *)dev-priv;
struct phy_info *curphy;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
volatile tsec_t *regs = priv-regs;
/* Assign a Physical address to the TBI */
regs-tbipa = CONFIG_SYS_TBIPA_VALUE;
- phyregs-tbipa = CONFIG_SYS_TBIPA_VALUE;
asm(sync);
/* Reset MII (due to new addresses) */
@@ -739,7 +739,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct
tsec_private * priv)
uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
{
uint phyid;
- volatile tsec_t *regbase = priv-phyregs;
+ volatile tsec_mdio_t *regbase = priv-phyregs;
int timeout = 100;
for (phyid = 0; phyid 4; phyid++) {
@@ -1772,7 +1772,7 @@ void phy_run_commands(struct tsec_private *priv, struct
phy_cmd *cmd)
{
int i;
uint result;
- volatile tsec_t *phyregs = priv-phyregs;
+ volatile tsec_mdio_t *phyregs = priv-phyregs;
phyregs-miimcfg = MIIMCFG_RESET;
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 100dfe1..dc82f49 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1935,4 +1935,14 @@ typedef struct ccsr_gur {
#define CONFIG_SYS_MPC85xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
+/* TSEC and MDIO OFFSETS */
+#define CONFIG_SYS_TSEC1_OFFSET(0x24000)
+#define TSEC_SIZE (0x01000)
+
+#define CONFIG_SYS_MDIO1_OFFSET(0x24520)
+#define MDIO_OFFSET(0x01000)
+
+#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
+
#endif /*__IMMAP_85xx__*/
diff --git a/include/tsec.h
