[PATCH 1/2] clk: sunxi: support Ethernet clock gates and resets on V3s-based SoCs
Previously Ethernet clock gates and resets were missing from the V3s CCU
driver.
Add the required clock gates and resets for Ethernet MAC and internal
Ethernet phy.
Signed-off-by: Tobias Schramm
---
drivers/clk/sunxi/clk_v3s.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 6524c13540..0402d5ed19 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -17,6 +17,7 @@ static struct ccu_clk_gate v3s_gates[] = {
[CLK_BUS_MMC0] = GATE(0x060, BIT(8)),
[CLK_BUS_MMC1] = GATE(0x060, BIT(9)),
[CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
+ [CLK_BUS_EMAC] = GATE(0x060, BIT(17)),
[CLK_BUS_SPI0] = GATE(0x060, BIT(20)),
[CLK_BUS_OTG] = GATE(0x060, BIT(24)),
@@ -31,6 +32,8 @@ static struct ccu_clk_gate v3s_gates[] = {
[CLK_BUS_UART1] = GATE(0x06c, BIT(17)),
[CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
+ [CLK_BUS_EPHY] = GATE(0x070, BIT(0)),
+
[CLK_SPI0] = GATE(0x0a0, BIT(31)),
[CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
@@ -45,12 +48,15 @@ static struct ccu_reset v3s_resets[] = {
[RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
[RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
[RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
+ [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
[RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
[RST_BUS_OTG] = RESET(0x2c0, BIT(24)),
[RST_BUS_TCON0] = RESET(0x2c4, BIT(4)),
[RST_BUS_DE]= RESET(0x2c4, BIT(12)),
+ [RST_BUS_EPHY] = RESET(0x2c8, BIT(2)),
+
[RST_BUS_I2C0] = RESET(0x2d8, BIT(0)),
[RST_BUS_I2C1] = RESET(0x2d8, BIT(1)),
[RST_BUS_UART0] = RESET(0x2d8, BIT(16)),
--
2.30.2
[PATCH 2/2] net: sun8i_emac: add support for EMAC on V3s-based SoCs
The Allwinner V3s SoC and related SoCs have a fast Ethernet MAC with
internal Ethernet phy. The internal phy is connected via MII and the MII
is not exposed externally on SoC pins.
Add support for this MAC and phy combo to the sun8i EMAC driver.
Signed-off-by: Tobias Schramm
---
drivers/net/sun8i_emac.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 8bff4fe9a9..d9d1825b69 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -903,6 +903,11 @@ static const struct emac_variant emac_variant_h6 = {
.support_rmii = true,
};
+static const struct emac_variant emac_variant_v3s = {
+ .syscon_offset = 0x30,
+ .soc_has_internal_phy = true,
+};
+
static const struct udevice_id sun8i_emac_eth_ids[] = {
{ .compatible = "allwinner,sun8i-a83t-emac",
.data = (ulong)_variant_a83t },
@@ -914,6 +919,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
.data = (ulong)_variant_a64 },
{ .compatible = "allwinner,sun50i-h6-emac",
.data = (ulong)_variant_h6 },
+ { .compatible = "allwinner,sun8i-v3s-emac",
+ .data = (ulong)_variant_v3s },
{ }
};
--
2.30.2
[PATCH 0/2] sunxi: add support for Ethernet on V3s-based SoCs
This patchset adds support for Ethernet on V3s-based SoCs, adding in required clock gates, resets to the CCU driver and finally a matching configuration for the sun8i_emac driver. Tobias Schramm (2): clk: sunxi: support Ethernet clock gates and resets on V3s-based SoCs net: sun8i_emac: add support for EMAC on V3s-based SoCs drivers/clk/sunxi/clk_v3s.c | 6 ++ drivers/net/sun8i_emac.c| 7 +++ 2 files changed, 13 insertions(+) -- 2.30.2
[PATCH] arm: sunxi: add support for I2C1 on V3s-based SoCs
Previously enabling I2C1 when using a V3s-based SoC had no effect.
Set pinmux on PE21 and PE22 to I2C1 function when enabling I2C1 on
V3s-based SoCs.
Signed-off-by: Tobias Schramm
---
board/sunxi/board.c | 4
include/sunxi_gpio.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 1313b01dce..df2faba3e5 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -98,6 +98,10 @@ void i2c_init_board(void)
sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1);
sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1);
clock_twi_onoff(1, 1);
+#elif defined(CONFIG_MACH_SUN8I_V3S)
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(21), SUN8I_V3S_GPE_TWI1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPE(22), SUN8I_V3S_GPE_TWI1);
+ clock_twi_onoff(1, 1);
#elif defined(CONFIG_MACH_SUN8I)
sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1);
sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1);
diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h
index db3742c039..175b13a887 100644
--- a/include/sunxi_gpio.h
+++ b/include/sunxi_gpio.h
@@ -113,6 +113,7 @@ enum sunxi_gpio_number {
#define SUN4I_GPB_TWI1 2
#define SUN5I_GPB_TWI1 2
#define SUN8I_V3S_GPB_TWI0 2
+#define SUN8I_V3S_GPE_TWI1 3
#define SUN4I_GPB_UART02
#define SUN5I_GPB_UART02
#define SUN8I_GPB_UART22
--
2.30.2
[PATCH v2] sunxi: support boot console on uart1 for sun8i
The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on
GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins
as boot console.
Signed-off-by: Tobias Schramm
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index de77bf638e..2969a530ae 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -190,6 +190,7 @@ enum sunxi_gpio_number {
#define SUN5I_GPG_SDC1 2
#define SUN6I_GPG_SDC1 2
#define SUN8I_GPG_SDC1 2
+#define SUN8I_GPG_UART12
#define SUN6I_GPG_TWI3 2
#define SUN5I_GPG_UART14
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index ae6bc656d9..d25081c92f 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -144,6 +144,11 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I) && \
+ !defined(CONFIG_MACH_SUN8I_R40)
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_GPG_UART1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_GPG_UART1);
+ sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);
#else
#error Unsupported console port number. Please fix pin mux settings in board.c
#endif
--
2.30.0
Re: [PATCH] sunxi: support boot console on uart1 for sun8i
Hi Andre, > Which particular SoC or board is this triggered by? > I'm currently using a board with a Sochip S3 SoC, where the boot console is on uart1. > From the SoCs listed as belonging to the MACH_SUN8I "family", I don't > see the R40 and V3s having UART1 muxed on PortG, only A23, A33, H3, H5, > and A83T have. > So can you restrict the conditions? I can - at least in the commit description. Unfortunately there is no real distinction between V3s and S3 in u-boot. I could of course define a new "S3" SoC variant and add it to the ifdef for the uart iomux. Would you prefer me to do that? [...] > So I'd recommend to leave this out, I will probably send a patch to > remove this altogether. Ok. I'll leave that out in v2 then. Thanks, Tobias
[PATCH] sunxi: support boot console on uart1 for sun8i
From: Tobias Schramm
This commit adds support for using uart1 as boot console on sun8i.
Signed-off-by: Tobias Schramm
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 4
include/configs/sunxi-common.h | 2 ++
3 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index de77bf638e..2969a530ae 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -190,6 +190,7 @@ enum sunxi_gpio_number {
#define SUN5I_GPG_SDC1 2
#define SUN6I_GPG_SDC1 2
#define SUN8I_GPG_SDC1 2
+#define SUN8I_GPG_UART12
#define SUN6I_GPG_TWI3 2
#define SUN5I_GPG_UART14
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index ae6bc656d9..febec0ae03 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -144,6 +144,10 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_GPG_UART1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_GPG_UART1);
+ sunxi_gpio_set_pull(SUNXI_GPL(7), SUNXI_GPIO_PULL_UP);
#else
#error Unsupported console port number. Please fix pin mux settings in board.c
#endif
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 000f386470..19f0026888 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -251,6 +251,8 @@ extern int soft_i2c_gpio_scl;
#define OF_STDOUT_PATH "/soc@01c0/serial@01c28800:115200"
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH "/soc@01c0/serial@01f02800:115200"
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I)
+#define OF_STDOUT_PATH "/soc@01c0/serial@01c28400:115200"
#else
#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
#endif
--
2.30.0
[PATCH 0/2] Add sf SPI flash support to distro boot
This patchset adds support for booting from SPI flash via the SPI flash subsystem commands to distro boot. This addition is useful for allowing small embedded devices that support booting from various storage media (USB thumb drives, SD cards, eMMC) to boot from SPI flash, too using a common framework. I'll use this feature for supporting the Pine64 Pinebook Pro, an 14" RK3399 ARM based laptop. I'll send a patchset for that device, soon. Cc-ing some of the latest commit signers since there does not seem to be a dedicated maintainer for distro boot. Tobias Tobias Schramm (2): distro_bootcmd: make BOOTENV_DEV_NAME and BOOTENV_DEV macro variadic distro_bootcmd: add sf SPI flash boot support include/config_distro_bootcmd.h | 30 ++ 1 file changed, 26 insertions(+), 4 deletions(-) -- 2.26.0
[PATCH 1/2] distro_bootcmd: make BOOTENV_DEV_NAME and BOOTENV_DEV macro variadic
Using a variadic macro allows boot device macros to take additional arguments Signed-off-by: Tobias Schramm Cc: Patrick Wildt Cc: AKASHI Takahiro --- include/config_distro_bootcmd.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index fc0935fa21..aacfb309da 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -398,13 +398,13 @@ BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE #endif -#define BOOTENV_DEV_NAME(devtypeu, devtypel, instance) \ - BOOTENV_DEV_NAME_##devtypeu(devtypeu, devtypel, instance) +#define BOOTENV_DEV_NAME(devtypeu, devtypel, instance, ...) \ + BOOTENV_DEV_NAME_##devtypeu(devtypeu, devtypel, instance, ##__VA_ARGS__) #define BOOTENV_BOOT_TARGETS \ "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0" -#define BOOTENV_DEV(devtypeu, devtypel, instance) \ - BOOTENV_DEV_##devtypeu(devtypeu, devtypel, instance) +#define BOOTENV_DEV(devtypeu, devtypel, instance, ...) \ + BOOTENV_DEV_##devtypeu(devtypeu, devtypel, instance, ##__VA_ARGS__) #define BOOTENV \ BOOTENV_SHARED_HOST \ BOOTENV_SHARED_MMC \ -- 2.26.0
[PATCH 2/2] distro_bootcmd: add sf SPI flash boot support
This commit adds generic boot support for SPI flash.
Adding SPI flash support to a device can be achieved by adding
following declaration to the BOOT_TARGET_DEVICES
func(SF, sf, [:], )
Signed-off-by: Tobias Schramm
Cc: Patrick Wildt
Cc: AKASHI Takahiro
---
include/config_distro_bootcmd.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index aacfb309da..02b70dd271 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -67,6 +67,27 @@
BOOT_TARGET_DEVICES_references_MMC_without_CONFIG_CMD_MMC
#endif
+#ifdef CONFIG_CMD_SF
+#define BOOTENV_SHARED_SF \
+ "sf_boot=if sf probe ${devnum}; then " \
+ "sf read ${scriptaddr} ${distro_bootpart} && "\
+ "source ${scriptaddr}; " \
+ "fi\0"
+#define BOOTENV_DEV_SF(devtypeu, devtypel, instance, bootpart) \
+ "bootcmd_" #devtypel #instance "=" \
+ "devnum=" #instance "; " \
+ "distro_bootpart=" #bootpart "; " \
+ "run " #devtypel "_boot\0"
+#define BOOTENV_DEV_NAME_SF(devtypeu, devtypel, instance, bootpart) \
+ #devtypel #instance " "
+#else
+#define BOOTENV_SHARED_MMC
+#define BOOTENV_DEV_SF \
+ BOOT_TARGET_DEVICES_references_SF_without_CONFIG_CMD_SF
+#define BOOTENV_DEV_NAME_SF \
+ BOOT_TARGET_DEVICES_references_SF_without_CONFIG_CMD_SF
+#endif
+
#ifdef CONFIG_CMD_UBIFS
#define BOOTENV_SHARED_UBIFS \
"ubifs_boot=" \
@@ -408,6 +429,7 @@
#define BOOTENV \
BOOTENV_SHARED_HOST \
BOOTENV_SHARED_MMC \
+ BOOTENV_SHARED_SF \
BOOTENV_SHARED_PCI \
BOOTENV_SHARED_USB \
BOOTENV_SHARED_SATA \
--
2.26.0
