[PATCH] rockchip: sdhci: rk3568: bypass DLL when clk <= 52 MHz
For Rockchip platform, DLL bypass bit and start bit need to be set if
DLL is not locked.
With this change applied eMMC in my NanoPi R5S can run at 52 MHz.
Based on linux commit b75a52b0dda3 ("mmc: sdhci-of-dwcmshc: Update DLL
and pre-change delay for rockchip platform")
Signed-off-by: Vasily Khoruzhick
---
drivers/mmc/rockchip_sdhci.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 1ac95f32b3..fef23f593e 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -61,6 +61,7 @@
#define DWCMSHC_EMMC_DLL_RXCLK 0x804
#define DWCMSHC_EMMC_DLL_TXCLK 0x808
#define DWCMSHC_EMMC_DLL_STRBIN0x80c
+#define DECMSHC_EMMC_DLL_CMDOUT0x810
#define DWCMSHC_EMMC_DLL_STATUS0 0x840
#define DWCMSHC_EMMC_DLL_STATUS1 0x844
#define DWCMSHC_EMMC_DLL_START BIT(0)
@@ -69,6 +70,7 @@
#define DWCMSHC_EMMC_DLL_START_DEFAULT 5
#define DWCMSHC_EMMC_DLL_INC_VALUE 2
#define DWCMSHC_EMMC_DLL_INC 8
+#define DWCMSHC_EMMC_DLL_BYPASSBIT(24)
#define DWCMSHC_EMMC_DLL_DLYENABIT(27)
#define DLL_TXCLK_TAPNUM_DEFAULT 0xA
@@ -83,6 +85,7 @@
#define DWCMSHC_EMMC_DLL_TIMEOUT BIT(9)
#define DLL_RXCLK_NO_INVERTER 1
#define DLL_RXCLK_INVERTER 0
+#define DLL_RXCLK_ORI_GATE BIT(31)
#define DWCMSHC_ENHANCED_STROBEBIT(8)
#define DLL_LOCK_WO_TMOUT(x) \
x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \
@@ -348,10 +351,14 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host
*host, unsigned int clo
DLL_STRBIN_TAPNUM_FROM_SW;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
} else {
- /* reset the clock phase when the frequency is lower than
100MHz */
- sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
- extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
- sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+ /*
+* Disable DLL and reset both of sample and drive clock.
+* The bypass bit and start bit need to be set if DLL is not
locked.
+*/
+ sdhci_writel(host, DWCMSHC_EMMC_DLL_BYPASS |
DWCMSHC_EMMC_DLL_START,
+DWCMSHC_EMMC_DLL_CTRL);
+ sdhci_writel(host, DLL_RXCLK_ORI_GATE, DWCMSHC_EMMC_DLL_RXCLK);
+ sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT);
sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
/*
* Before switching to hs400es mode, the driver will enable
--
2.39.2
Re: [PATCH 2/3] phy: rockchip-inno-usb2: add initial support for rk3588 PHY
On Thu, Mar 2, 2023 at 11:32 PM Eugen Hristev
wrote:
>
> Add initial support for the rk3588 PHY variant.
> The driver now looks for phy-supply and enables/disables the vbus
> accordingly.
> The lookup for the host-port reg inside the struct now does a do {} while()
> instead of a while() {} in order to allow a first check for reg == 0.
>
> Co-developed-by: Frank Wang
> Signed-off-by: Frank Wang
> Signed-off-by: Eugen Hristev
Tested-by: Vasily Khoruzhick # rk3568-based board
> ---
> drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 109 +-
> 1 file changed, 104 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> index 55e1dbcfef7e..0551876436d5 100644
> --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
> @@ -13,6 +13,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -61,6 +62,7 @@ struct rockchip_usb2phy_cfg {
> struct rockchip_usb2phy {
> void *reg_base;
> struct clk phyclk;
> + struct udevice *vbus_supply[USB2PHY_NUM_PORTS];
> const struct rockchip_usb2phy_cfg *phy_cfg;
> };
>
> @@ -86,11 +88,34 @@ struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct
> phy *phy)
> return _cfg->port_cfgs[phy->id];
> }
>
> +static struct udevice *rockchip_usb2phy_check_vbus(struct phy *phy)
> +{
> + struct udevice *parent = phy->dev->parent;
> + struct rockchip_usb2phy *priv = dev_get_priv(parent);
> + struct udevice *vbus = NULL;
> +
> + if (phy->id == USB2PHY_PORT_HOST)
> + vbus = priv->vbus_supply[USB2PHY_PORT_HOST];
> +
> + return vbus;
> +}
> +
> static int rockchip_usb2phy_power_on(struct phy *phy)
> {
> struct udevice *parent = dev_get_parent(phy->dev);
> struct rockchip_usb2phy *priv = dev_get_priv(parent);
> const struct rockchip_usb2phy_port_cfg *port_cfg =
> us2phy_get_port(phy);
> + struct udevice *vbus = NULL;
> + int ret;
> +
> + vbus = rockchip_usb2phy_check_vbus(phy);
> + if (vbus) {
> + ret = regulator_set_enable(vbus, true);
> + if (ret) {
> + dev_err(phy->dev, "vbus enable failed: %d\n", ret);
> + return ret;
> + }
> + }
>
> property_enable(priv->reg_base, _cfg->phy_sus, false);
>
> @@ -105,6 +130,17 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
> struct udevice *parent = dev_get_parent(phy->dev);
> struct rockchip_usb2phy *priv = dev_get_priv(parent);
> const struct rockchip_usb2phy_port_cfg *port_cfg =
> us2phy_get_port(phy);
> + struct udevice *vbus = NULL;
> + int ret;
> +
> + vbus = rockchip_usb2phy_check_vbus(phy);
> + if (vbus) {
> + ret = regulator_set_enable(vbus, false);
> + if (ret) {
> + dev_err(phy->dev, "vbus disable failed: %d\n", ret);
> + return ret;
> + }
> + }
>
> property_enable(priv->reg_base, _cfg->phy_sus, true);
>
> @@ -149,13 +185,20 @@ static int rockchip_usb2phy_of_xlate(struct phy *phy,
> struct ofnode_phandle_args *args)
> {
> const char *name = phy->dev->name;
> + struct udevice *parent = phy->dev->parent;
> + struct rockchip_usb2phy *priv = dev_get_priv(parent);
>
> - if (!strcasecmp(name, "host-port"))
> + if (!strcasecmp(name, "host-port")) {
> phy->id = USB2PHY_PORT_HOST;
> - else if (!strcasecmp(name, "otg-port"))
> + device_get_supply_regulator(phy->dev, "phy-supply",
> +
> >vbus_supply[USB2PHY_PORT_HOST]);
> + } else if (!strcasecmp(name, "otg-port")) {
> phy->id = USB2PHY_PORT_OTG;
> - else
> + device_get_supply_regulator(phy->dev, "phy-supply",
> +
> >vbus_supply[USB2PHY_PORT_OTG]);
> + } else {
> dev_err(phy->dev, "improper %s device\n", name);
> + }
>
> return 0;
> }
> @@ -201,14 +244,14 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
>
> /* find out a proper config which can be matched with dt. */
> index = 0;
> - whi
Re: [PATCH v2 3/3] Revert "arm64: dts: rk356x-u-boot: Drop combphy1 assigned-clocks/rates"
On Tue, Mar 7, 2023 at 4:48 PM Kever Yang wrote: > > Hi Vasily, Hi Kever, > Please use a new patch instead of a revert, I think I merge the > patch twice by mistake, so there is another one need to remove. Sure, I changed the patch subject and description in v3. Regards, Vasily
[PATCH v3 2/2] arm64:dts: rk356x-u-boot: do not drop combphy1 assigned-clocks/rates
We have stubs for CLK_PCIEPHY_REF now, so there is no reason to
modify the dtsi.
This essentialy reverts commit 5bec4b0de785
("arm64: dts: rk356x-u-boot: Drop combphy1 assigned-clocks/rates").
Signed-off-by: Vasily Khoruzhick
---
v3: change patch subject and description from default revert commit to a
bit more verbose
v2: revert dropping assigned-clock properties because we have stubs for
CLK_PCIEPHY_REF clocks now
arch/arm/dts/rk356x-u-boot.dtsi | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 2331641049..1709604b22 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -34,11 +34,6 @@
};
};
- {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-rates;
-};
-
{
u-boot,dm-pre-reloc;
status = "okay";
--
2.39.2
[PATCH v3 1/2] clk: rockchip: rk3568: add stubs for CLK_PCIEPHY_REF clocks
Device tree contains assigned-clock-rates property for these, but default value will work just fine Reviewed-by: Kever Yang Signed-off-by: Vasily Khoruzhick --- v3: add r-b tag from Kever v2: implement stubs for CLK_PCIEPHY_REF instead of dropping assigned-clock properties drivers/clk/rockchip/clk_rk3568.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 253b69504f..1c6adc56f9 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -425,6 +425,9 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate) case PCLK_PMU: ret = rk3568_pmu_set_pmuclk(priv, rate); break; + case CLK_PCIEPHY0_REF: + case CLK_PCIEPHY1_REF: + return 0; default: return -ENOENT; } -- 2.39.2
Re: [PATCH v2 1/3] phy: rockchip-inno-usb2: add support for phy-supply
On Tue, Mar 7, 2023 at 4:52 PM Kever Yang wrote: > > Hi Vasily, Hi Keven, > This patch is cover by patch[1] from Eugen, right? Yeah, I didn't notice Eugen's patch. Anyway, he sent his patch earlier, so please discard mine. Regards, Vasily
[PATCH v2 3/3] Revert "arm64: dts: rk356x-u-boot: Drop combphy1 assigned-clocks/rates"
This reverts commit 5bec4b0de7851a254fb4447b3599a60f95550141.
Signed-off-by: Vasily Khoruzhick
---
v2: revert dropping assigned-clock properties because we have stubs for
CLK_PCIEPHY_REF clocks now
arch/arm/dts/rk356x-u-boot.dtsi | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 2331641049..1709604b22 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -34,11 +34,6 @@
};
};
- {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-rates;
-};
-
{
u-boot,dm-pre-reloc;
status = "okay";
--
2.39.2
[PATCH v2 2/3] clk: rockchip: rk3568: add stubs for CLK_PCIEPHY_REF clocks
Device tree contains assigned-clock-rates property for these, but default value will work just fine Signed-off-by: Vasily Khoruzhick --- v2: implement stubs for CLK_PCIEPHY_REF instead of dropping assigned-clock properties drivers/clk/rockchip/clk_rk3568.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 253b69504f..1c6adc56f9 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -425,6 +425,9 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate) case PCLK_PMU: ret = rk3568_pmu_set_pmuclk(priv, rate); break; + case CLK_PCIEPHY0_REF: + case CLK_PCIEPHY1_REF: + return 0; default: return -ENOENT; } -- 2.39.2
[PATCH v2 1/3] phy: rockchip-inno-usb2: add support for phy-supply
PHY driver needs to enable PHY supply, otherwise port will
remain unpowered.
Signed-off-by: Vasily Khoruzhick
---
v2: address check_patch.pl issues
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 64 ++-
1 file changed, 61 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 55e1dbcfef..a859cd6f18 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -62,6 +63,10 @@ struct rockchip_usb2phy {
void *reg_base;
struct clk phyclk;
const struct rockchip_usb2phy_cfg *phy_cfg;
+#if IS_ENABLED(CONFIG_DM_REGULATOR)
+ struct udevice *host_supply;
+ struct udevice *otg_supply;
+#endif
};
static inline int property_enable(void *reg_base,
@@ -86,12 +91,42 @@ struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct
phy *phy)
return _cfg->port_cfgs[phy->id];
}
+#if IS_ENABLED(CONFIG_DM_REGULATOR)
+static int rockchip_usb2phy_regulator_set_enable(struct phy *phy, bool enable)
+{
+ struct udevice *parent = dev_get_parent(phy->dev);
+ struct rockchip_usb2phy *priv = dev_get_priv(parent);
+ struct udevice *supply;
+ int ret = 0;
+
+ if (phy->id == USB2PHY_PORT_HOST)
+ supply = priv->host_supply;
+ else
+ supply = priv->otg_supply;
+
+ if (supply)
+ ret = regulator_set_enable(supply, enable);
+
+ return ret;
+}
+#else
+static int rockchip_usb2phy_regulator_set_enable(struct phy *phy, bool enable)
+{
+ return 0;
+}
+#endif
+
static int rockchip_usb2phy_power_on(struct phy *phy)
{
struct udevice *parent = dev_get_parent(phy->dev);
struct rockchip_usb2phy *priv = dev_get_priv(parent);
const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
+ int ret = rockchip_usb2phy_regulator_set_enable(phy, true);
+
+ if (ret)
+ return ret;
+
property_enable(priv->reg_base, _cfg->phy_sus, false);
/* waiting for the utmi_clk to become stable */
@@ -108,6 +143,11 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
property_enable(priv->reg_base, _cfg->phy_sus, true);
+ int ret = rockchip_usb2phy_regulator_set_enable(phy, false);
+
+ if (ret)
+ return ret;
+
return 0;
}
@@ -149,13 +189,31 @@ static int rockchip_usb2phy_of_xlate(struct phy *phy,
struct ofnode_phandle_args *args)
{
const char *name = phy->dev->name;
+ struct udevice *parent = dev_get_parent(phy->dev);
+ struct rockchip_usb2phy *priv = dev_get_priv(parent);
+#if IS_ENABLED(CONFIG_DM_REGULATOR)
+ struct udevice *supply;
+ int ret = device_get_supply_regulator(phy->dev, "phy-supply", );
+
+ if (ret && ret != -ENOENT) {
+ pr_err("Failed to get PHY regulator\n");
+ return ret;
+ }
+#endif
- if (!strcasecmp(name, "host-port"))
+ if (!strcasecmp(name, "host-port")) {
phy->id = USB2PHY_PORT_HOST;
- else if (!strcasecmp(name, "otg-port"))
+#if IS_ENABLED(CONFIG_DM_REGULATOR)
+ priv->host_supply = supply;
+#endif
+ } else if (!strcasecmp(name, "otg-port")) {
phy->id = USB2PHY_PORT_OTG;
- else
+#if IS_ENABLED(CONFIG_DM_REGULATOR)
+ priv->otg_supply = supply;
+#endif
+ } else {
dev_err(phy->dev, "improper %s device\n", name);
+ }
return 0;
}
--
2.39.2
Re: [PATCH 2/2] arm64: dts: rk3568-u-boot: Drop combphy0 assigned-clocks/rates
On Tue, Mar 7, 2023 at 1:04 PM Mark Kettenis wrote:
> And implement support for the CLK_PCIEPHYn_REF clocks in
> drivers/clk/rockchip/clk_rk3568.c:rk3568_pmuclk_set_rate()?
>
> Yes, I'd say so.
>
> If U-Boot doesn't actually need these clocks to run at the frequency
> provided by assigned-clock-rates, that could be as simple as returning
> 0 for these clocks.
Sounds good. I'll send v2 that reverts 5bec4b0de785 and implements
stubs for CLK_PCIEPHYn_REF clocks.
FWIW, I tried booting linux-6.2.2 with u-boot dtb and these clocks
dropped, and USB works just fine.
> > > > commit 5bec4b0de785 ("arm64: dts: rk356x-u-boot: Drop combphy1
> > > > assigned-clocks/rates")
> > > > dropped these properties for combphy1, so let's drop them for combphy0
> > > > as well.
> > > >
> > > > Signed-off-by: Vasily Khoruzhick
> > > > ---
> > > > arch/arm/dts/rk3568-evb-u-boot.dtsi | 1 +
> > > > arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 1 +
> > > > arch/arm/dts/rk3568-u-boot.dtsi | 11 +++
> > > > 3 files changed, 13 insertions(+)
> > > > create mode 100644 arch/arm/dts/rk3568-u-boot.dtsi
> > > >
> > > > diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > > > b/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > > > index 17503d3d27..77430da3ba 100644
> > > > --- a/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > > > +++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > > > @@ -4,6 +4,7 @@
> > > > */
> > > >
> > > > #include "rk356x-u-boot.dtsi"
> > > > +#include "rk3568-u-boot.dtsi"
> > > >
> > > > / {
> > > > chosen {
> > > > diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > > > b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > > > index ed47efa44b..44cf33ed4b 100644
> > > > --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > > > +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > > > @@ -5,6 +5,7 @@
> > > > */
> > > >
> > > > #include "rk356x-u-boot.dtsi"
> > > > +#include "rk3568-u-boot.dtsi"
> > > >
> > > > / {
> > > > chosen {
> > > > diff --git a/arch/arm/dts/rk3568-u-boot.dtsi
> > > > b/arch/arm/dts/rk3568-u-boot.dtsi
> > > > new file mode 100644
> > > > index 00..c677df
> > > > --- /dev/null
> > > > +++ b/arch/arm/dts/rk3568-u-boot.dtsi
> > > > @@ -0,0 +1,11 @@
> > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > > +/*
> > > > + * Copyright (c) 2023 Vasily Khoruzhick
> > > > + */
> > > > +
> > > > +#include "rockchip-u-boot.dtsi"
> > > > +
> > > > + {
> > > > + /delete-property/ assigned-clocks;
> > > > + /delete-property/ assigned-clock-rates;
> > > > +};
> > > > --
> > > > 2.39.2
> > > >
> > > >
> >
[PATCH] rockchip: sdhci: rk3568: fix clock setting logic
mmc->tran_speed is max clock, but currently rk3568_sdhci_set_ios_post
uses it if its != 0, regardless of mmc->clock value, and it breaks
eMMC controller.
Without this patch 'mmc dev 0; mmc dev 1; mmc dev 0' is enough for
breaking eMMC, since first initialization sets mmc->mmc_tran speed
to non-zero value (26MHz in my case), and on subsequent re-init when
mmc layer asks for 400KHz it sets 26MHz instead.
Fix it by using MAX(mmc->tran_speed, mmc->clock)
Signed-off-by: Vasily Khoruzhick
---
drivers/mmc/rockchip_sdhci.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 9608770d4e..1ac95f32b3 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -394,11 +394,11 @@ static int rk3568_sdhci_set_enhanced_strobe(struct
sdhci_host *host)
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
- uint clock = mmc->tran_speed;
+ uint clock = mmc->clock;
u32 reg, vendor_reg;
- if (!clock)
- clock = mmc->clock;
+ if (mmc->tran_speed && mmc->clock > mmc->tran_speed)
+ clock = mmc->tran_speed;
rk3568_sdhci_emmc_set_clock(host, clock);
--
2.39.2
Re: [PATCH 2/2] arm64: dts: rk3568-u-boot: Drop combphy0 assigned-clocks/rates
On Tue, Mar 7, 2023 at 11:53 AM Mark Kettenis wrote:
> That is probably the wrong approach. It should be possible to boot an
> OS with the device tree provided by U-Boot. Removing these properties
> means the OS doesn't see them either. But if the assigned-clocks
> property isn't needed it wouldn't be there would it?
Well, should we revert 5bec4b0de785 in this case?
> > commit 5bec4b0de785 ("arm64: dts: rk356x-u-boot: Drop combphy1
> > assigned-clocks/rates")
> > dropped these properties for combphy1, so let's drop them for combphy0 as
> > well.
> >
> > Signed-off-by: Vasily Khoruzhick
> > ---
> > arch/arm/dts/rk3568-evb-u-boot.dtsi | 1 +
> > arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 1 +
> > arch/arm/dts/rk3568-u-boot.dtsi | 11 +++
> > 3 files changed, 13 insertions(+)
> > create mode 100644 arch/arm/dts/rk3568-u-boot.dtsi
> >
> > diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > b/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > index 17503d3d27..77430da3ba 100644
> > --- a/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi
> > @@ -4,6 +4,7 @@
> > */
> >
> > #include "rk356x-u-boot.dtsi"
> > +#include "rk3568-u-boot.dtsi"
> >
> > / {
> > chosen {
> > diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > index ed47efa44b..44cf33ed4b 100644
> > --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> > @@ -5,6 +5,7 @@
> > */
> >
> > #include "rk356x-u-boot.dtsi"
> > +#include "rk3568-u-boot.dtsi"
> >
> > / {
> > chosen {
> > diff --git a/arch/arm/dts/rk3568-u-boot.dtsi
> > b/arch/arm/dts/rk3568-u-boot.dtsi
> > new file mode 100644
> > index 00..c677df
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3568-u-boot.dtsi
> > @@ -0,0 +1,11 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2023 Vasily Khoruzhick
> > + */
> > +
> > +#include "rockchip-u-boot.dtsi"
> > +
> > + {
> > + /delete-property/ assigned-clocks;
> > + /delete-property/ assigned-clock-rates;
> > +};
> > --
> > 2.39.2
> >
> >
[PATCH 2/2] arm64: dts: rk3568-u-boot: Drop combphy0 assigned-clocks/rates
combphy0 is failing to probe due to unhandled assigned-clocks and
assigned-clocks-rates.
commit 5bec4b0de785 ("arm64: dts: rk356x-u-boot: Drop combphy1
assigned-clocks/rates")
dropped these properties for combphy1, so let's drop them for combphy0 as well.
Signed-off-by: Vasily Khoruzhick
---
arch/arm/dts/rk3568-evb-u-boot.dtsi | 1 +
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 1 +
arch/arm/dts/rk3568-u-boot.dtsi | 11 +++
3 files changed, 13 insertions(+)
create mode 100644 arch/arm/dts/rk3568-u-boot.dtsi
diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi
b/arch/arm/dts/rk3568-evb-u-boot.dtsi
index 17503d3d27..77430da3ba 100644
--- a/arch/arm/dts/rk3568-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include "rk356x-u-boot.dtsi"
+#include "rk3568-u-boot.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index ed47efa44b..44cf33ed4b 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -5,6 +5,7 @@
*/
#include "rk356x-u-boot.dtsi"
+#include "rk3568-u-boot.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
new file mode 100644
index 00..c677df
--- /dev/null
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Vasily Khoruzhick
+ */
+
+#include "rockchip-u-boot.dtsi"
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-rates;
+};
--
2.39.2
[PATCH 1/2] phy: rockchip-inno-usb2: add support for phy-supply
PHY driver needs to enable PHY supply, otherwise port will
remain unpowered.
Signed-off-by: Vasily Khoruzhick
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 59 ++-
1 file changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 55e1dbcfef..1ef40b448e 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -62,6 +63,10 @@ struct rockchip_usb2phy {
void *reg_base;
struct clk phyclk;
const struct rockchip_usb2phy_cfg *phy_cfg;
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ struct udevice *host_supply;
+ struct udevice *otg_supply;
+#endif
};
static inline int property_enable(void *reg_base,
@@ -86,12 +91,40 @@ struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct
phy *phy)
return _cfg->port_cfgs[phy->id];
}
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+static int rockchip_usb2phy_regulator_set_enable(struct phy *phy, bool enable)
+{
+ struct udevice *parent = dev_get_parent(phy->dev);
+ struct rockchip_usb2phy *priv = dev_get_priv(parent);
+ struct udevice *supply;
+ int ret = 0;
+ if (phy->id == USB2PHY_PORT_HOST)
+ supply = priv->host_supply;
+ else
+ supply = priv->otg_supply;
+
+ if (supply)
+ ret = regulator_set_enable(supply, enable);
+
+ return ret;
+}
+#else
+static int rockchip_usb2phy_regulator_set_enable(struct phy *phy, bool enable)
+{
+ return 0;
+}
+#endif
+
static int rockchip_usb2phy_power_on(struct phy *phy)
{
struct udevice *parent = dev_get_parent(phy->dev);
struct rockchip_usb2phy *priv = dev_get_priv(parent);
const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
+ int ret = rockchip_usb2phy_regulator_set_enable(phy, true);
+ if (ret)
+ return ret;
+
property_enable(priv->reg_base, _cfg->phy_sus, false);
/* waiting for the utmi_clk to become stable */
@@ -108,6 +141,10 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
property_enable(priv->reg_base, _cfg->phy_sus, true);
+ int ret = rockchip_usb2phy_regulator_set_enable(phy, false);
+ if (ret)
+ return ret;
+
return 0;
}
@@ -149,11 +186,29 @@ static int rockchip_usb2phy_of_xlate(struct phy *phy,
struct ofnode_phandle_args *args)
{
const char *name = phy->dev->name;
+ struct udevice *parent = dev_get_parent(phy->dev);
+ struct rockchip_usb2phy *priv = dev_get_priv(parent);
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ struct udevice *supply;
+ int ret = device_get_supply_regulator(phy->dev, "phy-supply", );
+ if (ret && ret != -ENOENT) {
+ pr_err("Failed to get PHY regulator\n");
+ return ret;
+ }
+#endif
- if (!strcasecmp(name, "host-port"))
+ if (!strcasecmp(name, "host-port")) {
phy->id = USB2PHY_PORT_HOST;
- else if (!strcasecmp(name, "otg-port"))
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ priv->host_supply = supply;
+#endif
+ }
+ else if (!strcasecmp(name, "otg-port")) {
phy->id = USB2PHY_PORT_OTG;
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ priv->otg_supply = supply;
+#endif
+ }
else
dev_err(phy->dev, "improper %s device\n", name);
--
2.39.2
Re: [PATCH V2 8/9] arm64: dts: rockchip: add gpio-ranges property to gpio nodes
On Wed, Mar 1, 2023 at 6:49 PM Kever Yang wrote: Hi Kever, > So I have take this patch set, and we can improve later when kernel have > a version and we have a better solution for U-Boot. My concern is that dts will be overwritten during the next dts sync with the kernel. U-boot specific properties should be moved into an appropriate -u-boot.dtsi file. Regards, Vasily
Re: [PATCH V2 7/9] gpio/rockchip: rk_gpio support v2 gpio controller
On Mon, Feb 13, 2023 at 2:30 PM Chris Morgan wrote:
>
> From: Chris Morgan
>
> Add support for the newer GPIO controller used by the rk356x series,
> as well as the pinctrl device for the rk356x series. The GPIOv2
> controller has a write enable bit for some registers which differs
> from the older versions of the GPIO controller.
>
> Signed-off-by: Peter Geis
> Signed-off-by: Chris Morgan
With pinctrl part from
https://patchwork.ozlabs.org/project/uboot/patch/20230217115845.75303-11-ja...@amarulasolutions.com/
Tested-by: Vasily Khoruzhick
> ---
> arch/arm/include/asm/arch-rockchip/gpio.h | 38 ++
> drivers/gpio/rk_gpio.c| 49 +-
> drivers/pinctrl/rockchip/Makefile | 1 +
> drivers/pinctrl/rockchip/pinctrl-rk3568.c | 453 ++
> .../pinctrl/rockchip/pinctrl-rockchip-core.c | 12 +-
> 5 files changed, 540 insertions(+), 13 deletions(-)
> create mode 100644 drivers/pinctrl/rockchip/pinctrl-rk3568.c
>
> diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h
> b/arch/arm/include/asm/arch-rockchip/gpio.h
> index 1aaec5faec..15f5de321b 100644
> --- a/arch/arm/include/asm/arch-rockchip/gpio.h
> +++ b/arch/arm/include/asm/arch-rockchip/gpio.h
> @@ -6,6 +6,7 @@
> #ifndef _ASM_ARCH_GPIO_H
> #define _ASM_ARCH_GPIO_H
>
> +#if !defined(CONFIG_ROCKCHIP_RK3568)
> struct rockchip_gpio_regs {
> u32 swport_dr;
> u32 swport_ddr;
> @@ -22,7 +23,44 @@ struct rockchip_gpio_regs {
> u32 reserved1[(0x60 - 0x54) / 4];
> u32 ls_sync;
> };
> +
> check_member(rockchip_gpio_regs, ls_sync, 0x60);
> +#else
> +struct rockchip_gpio_regs {
> + u32 swport_dr_l;/* ADDRESS OFFSET: 0x */
> + u32 swport_dr_h;/* ADDRESS OFFSET: 0x0004 */
> + u32 swport_ddr_l; /* ADDRESS OFFSET: 0x0008 */
> + u32 swport_ddr_h; /* ADDRESS OFFSET: 0x000c */
> + u32 int_en_l; /* ADDRESS OFFSET: 0x0010 */
> + u32 int_en_h; /* ADDRESS OFFSET: 0x0014 */
> + u32 int_mask_l; /* ADDRESS OFFSET: 0x0018 */
> + u32 int_mask_h; /* ADDRESS OFFSET: 0x001c */
> + u32 int_type_l; /* ADDRESS OFFSET: 0x0020 */
> + u32 int_type_h; /* ADDRESS OFFSET: 0x0024 */
> + u32 int_polarity_l; /* ADDRESS OFFSET: 0x0028 */
> + u32 int_polarity_h; /* ADDRESS OFFSET: 0x002c */
> + u32 int_bothedge_l; /* ADDRESS OFFSET: 0x0030 */
> + u32 int_bothedge_h; /* ADDRESS OFFSET: 0x0034 */
> + u32 debounce_l; /* ADDRESS OFFSET: 0x0038 */
> + u32 debounce_h; /* ADDRESS OFFSET: 0x003c */
> + u32 dbclk_div_en_l; /* ADDRESS OFFSET: 0x0040 */
> + u32 dbclk_div_en_h; /* ADDRESS OFFSET: 0x0044 */
> + u32 dbclk_div_con; /* ADDRESS OFFSET: 0x0048 */
> + u32 reserved004c; /* ADDRESS OFFSET: 0x004c */
> + u32 int_status; /* ADDRESS OFFSET: 0x0050 */
> + u32 reserved0054; /* ADDRESS OFFSET: 0x0054 */
> + u32 int_rawstatus; /* ADDRESS OFFSET: 0x0058 */
> + u32 reserved005c; /* ADDRESS OFFSET: 0x005c */
> + u32 port_eoi_l; /* ADDRESS OFFSET: 0x0060 */
> + u32 port_eoi_h; /* ADDRESS OFFSET: 0x0064 */
> + u32 reserved0068[2];/* ADDRESS OFFSET: 0x0068 */
> + u32 ext_port; /* ADDRESS OFFSET: 0x0070 */
> + u32 reserved0074; /* ADDRESS OFFSET: 0x0074 */
> + u32 ver_id; /* ADDRESS OFFSET: 0x0078 */
> +};
> +
> +check_member(rockchip_gpio_regs, ver_id, 0x0078);
> +#endif
>
> enum gpio_pu_pd {
> GPIO_PULL_NORMAL = 0,
> diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
> index 98a79b5f4d..e2653be058 100644
> --- a/drivers/gpio/rk_gpio.c
> +++ b/drivers/gpio/rk_gpio.c
> @@ -2,12 +2,15 @@
> /*
> * (C) Copyright 2015 Google, Inc
> *
> - * (C) Copyright 2008-2014 Rockchip Electronics
> + * (C) Copyright 2008-2023 Rockchip Electronics
> * Peter, Software Engineering, .
> + * Jianqun Xu, Software Engineering, .
> */
>
> #include
> #include
> +#include
> +#include
> #include
> #include
> #include
> @@ -23,6 +26,35 @@ enum {
>
&g
Re: [PATCH V2 8/9] arm64: dts: rockchip: add gpio-ranges property to gpio nodes
On Mon, Feb 13, 2023 at 2:30 PM Chris Morgan wrote: > > From: Chris Morgan > > Add gpio-ranges property to GPIO nodes so that the bank ID can > be correctly derived for each GPIO bank. Should not it be merged into linux first? Otherwise it will be overwritten during the next dts sync with linux. > Signed-off-by: Chris Morgan > --- > arch/arm/dts/rk356x.dtsi | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi > index 5706c3e24f..6492ace0de 100644 > --- a/arch/arm/dts/rk356x.dtsi > +++ b/arch/arm/dts/rk356x.dtsi > @@ -1806,6 +1806,7 @@ > interrupts = ; > clocks = < PCLK_GPIO0>, < DBCLK_GPIO0>; > gpio-controller; > + gpio-ranges = < 0 0 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1817,6 +1818,7 @@ > interrupts = ; > clocks = < PCLK_GPIO1>, < DBCLK_GPIO1>; > gpio-controller; > + gpio-ranges = < 0 32 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1828,6 +1830,7 @@ > interrupts = ; > clocks = < PCLK_GPIO2>, < DBCLK_GPIO2>; > gpio-controller; > + gpio-ranges = < 0 64 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1839,6 +1842,7 @@ > interrupts = ; > clocks = < PCLK_GPIO3>, < DBCLK_GPIO3>; > gpio-controller; > + gpio-ranges = < 0 96 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > @@ -1850,6 +1854,7 @@ > interrupts = ; > clocks = < PCLK_GPIO4>, < DBCLK_GPIO4>; > gpio-controller; > + gpio-ranges = < 0 128 32>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > -- > 2.34.1 >
[PATCH] clk: rockchip: rk3568: add more supported clk rates for sdmmc and emmc
SDHCI driver may attempt to set 26MHz clock, but clk_rk3568
will return error in this case. Apparently, SDHCI silently ignores the
error and as a result eMMC initialization fails.
Add 25 MHz and 26 MHz clk rates for sdmmc and emmc on rk3568 to fix that.
Signed-off-by: Vasily Khoruzhick
---
drivers/clk/rockchip/clk_rk3568.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3568.c
b/drivers/clk/rockchip/clk_rk3568.c
index c83ae22dc3..253b69504f 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1443,6 +1443,7 @@ static ulong rk3568_sdmmc_set_clk(struct rk3568_clk_priv
*priv,
switch (rate) {
case OSC_HZ:
case 26 * MHz:
+ case 25 * MHz:
src_clk = CLK_SDMMC_SEL_24M;
break;
case 400 * MHz:
@@ -1632,6 +1633,8 @@ static ulong rk3568_emmc_set_clk(struct rk3568_clk_priv
*priv, ulong rate)
switch (rate) {
case OSC_HZ:
+ case 26 * MHz:
+ case 25 * MHz:
src_clk = CCLK_EMMC_SEL_24M;
break;
case 52 * MHz:
--
2.39.2
Re: [PATCH v4 1/1] arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support
On Thu, Feb 23, 2023 at 7:40 AM Akash wrote:
>
> HI Vasily,
Hi Akash,
> I just tried now adding emmc module and able to access it.
Thanks for testing! It looks like sdhci driver decides to clock your
eMMC at 52MHz which works, while for my eMMC it choses 26MHz.
Unfortunately, clk_rk3568 driver supports only certain clock rates,
and fails with e.g. 25MHz, 26MHz. SDHCI driver doesn't check for
errors and fails silently, I'll send a fix later today.
> Also Added CMD_REGULATOR support and tried command as you suggested.
>
> Pasting logs at https://paste.ubuntu.com/p/Cx6x3CNj9w/
Yeah, you can see that regulator status is incorrect. Currently,
rk_i2c driver is non-functional on rk3568 in u-boot master. It's
caused by missing pinctrl driver (it's already merged into rockchip
custodian tree)
Regards,
Vasily
> Let me know if I am missing anything here.
>
>
> Thanks,
> Akash
>
> On 23-02-2023 06:01, Vasily Khoruzhick wrote:
> > On Tue, Feb 14, 2023 at 12:11 PM Akash Gajjar
> > wrote:
> >
> > Hi Akash,
> >
> >> Add Radxa ROCK 3 Model A support. sync rk3568-rock-3a.dts from Linux
> >> 6.2.0-rc7
> >>
> >> Board Specifications
> >> - Rockchip RK3568
> >> - 2/4/8GB LPDDR4 3200MT/s
> >> - eMMC socket, SD card slot
> > Have you actually tested eMMC support? It seems to be broken when the
> > system boots off SD card, "mmc info" returns "unable to select a mode
> > : -70". I have a strong suspicion that it's due to rk_i2c being broken
> > for rk3568, with debug enabled it complains "I2C Send Start Bit
> > Timeout" on every i2c transaction.
> >
> > Could you please share "mmc info" and "regulator status -a" output
> > from your build?
> >
> > Regards,
> > Vasily
> >
> >> - GbE LAN,
> >> - PCIe 3.0/2.0
> >> - M.2 Connector
> >> - 3.5mm Audio jack with mic
> >> - HDMI 2.0, MIPI DSI/CSI
> >> - USB 3.0 Host/OTG, USB 2.0 Host
> >> - 40-pin GPIO expansion ports
> >> - USB Type C PD 2.0, 9V/2A, 12V/2A, 15V/2A, 20V/2A
> >>
> >> Refer Linux commit <22a442e6586c>
> >> ("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")
> >>
> >> Signed-off-by: Akash Gajjar
> >> ---
> >> Changes in v2:
> >> - Ammend the commit message, Replace Rock Pi 3a with ROCK3A Model A.
> >> Update the
> >>specs from https://wiki.radxa.com/Rock3/3a
> >> - Sync missing node in dts, still some of the nodes like vop, vop mmu,
> >> i2s2_2ch
> >>gpu, hdmi removed as there is no driver support present in u-boot.
> >> - Duplicated sdmmc node removed from dts.
> >> Changes in v3:
> >> - Replace rock-pi-3a-rk3568_defconfig with rock-3a-rk3568_defconfig
> >> Changes in v4:
> >> - Add maintainer for the board
> >> ---
> >> arch/arm/dts/Makefile | 3 +-
> >> arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 24 +
> >> arch/arm/dts/rk3568-rock-3a.dts | 609
> >> board/rockchip/evb_rk3568/MAINTAINERS | 7 +
> >> configs/rock-3a-rk3568_defconfig| 74 +++
> >> 5 files changed, 716 insertions(+), 1 deletion(-)
> >> create mode 100644 arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> >> create mode 100644 arch/arm/dts/rk3568-rock-3a.dts
> >> create mode 100644 configs/rock-3a-rk3568_defconfig
> >>
> >> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> >> index 9d647b9639..945843bebc 100644
> >> --- a/arch/arm/dts/Makefile
> >> +++ b/arch/arm/dts/Makefile
> >> @@ -165,7 +165,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> >> rk3399pro-rock-pi-n10.dtb
> >>
> >> dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> >> - rk3568-evb.dtb
> >> + rk3568-evb.dtb \
> >> + rk3568-rock-3a.dtb
> >>
> >> dtb-$(CONFIG_ROCKCHIP_RV1108) += \
> >> rv1108-elgin-r1.dtb \
> >> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> >> b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> >> new file mode 100644
> >> index 00..ae23ae8587
> >> --- /dev/null
> >> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> >> @@ -0,0 +1,24 @@
> >> +// SPDX-License-Identifier: GPL-2.0+
> >> +/*
> >> + * (C) Copyright 2021 Rockchip Electronics Co., Ltd
> >> + * (C) Copyright 2023 Akash Gajjar
> >> + */
> >> +
> >> +#inclu
Re: [PATCH v4 1/1] arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support
On Tue, Feb 14, 2023 at 12:11 PM Akash Gajjar wrote:
Hi Akash,
> Add Radxa ROCK 3 Model A support. sync rk3568-rock-3a.dts from Linux 6.2.0-rc7
>
> Board Specifications
> - Rockchip RK3568
> - 2/4/8GB LPDDR4 3200MT/s
> - eMMC socket, SD card slot
Have you actually tested eMMC support? It seems to be broken when the
system boots off SD card, "mmc info" returns "unable to select a mode
: -70". I have a strong suspicion that it's due to rk_i2c being broken
for rk3568, with debug enabled it complains "I2C Send Start Bit
Timeout" on every i2c transaction.
Could you please share "mmc info" and "regulator status -a" output
from your build?
Regards,
Vasily
> - GbE LAN,
> - PCIe 3.0/2.0
> - M.2 Connector
> - 3.5mm Audio jack with mic
> - HDMI 2.0, MIPI DSI/CSI
> - USB 3.0 Host/OTG, USB 2.0 Host
> - 40-pin GPIO expansion ports
> - USB Type C PD 2.0, 9V/2A, 12V/2A, 15V/2A, 20V/2A
>
> Refer Linux commit <22a442e6586c>
> ("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")
>
> Signed-off-by: Akash Gajjar
> ---
> Changes in v2:
> - Ammend the commit message, Replace Rock Pi 3a with ROCK3A Model A. Update
> the
> specs from https://wiki.radxa.com/Rock3/3a
> - Sync missing node in dts, still some of the nodes like vop, vop mmu,
> i2s2_2ch
> gpu, hdmi removed as there is no driver support present in u-boot.
> - Duplicated sdmmc node removed from dts.
> Changes in v3:
> - Replace rock-pi-3a-rk3568_defconfig with rock-3a-rk3568_defconfig
> Changes in v4:
> - Add maintainer for the board
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 24 +
> arch/arm/dts/rk3568-rock-3a.dts | 609
> board/rockchip/evb_rk3568/MAINTAINERS | 7 +
> configs/rock-3a-rk3568_defconfig| 74 +++
> 5 files changed, 716 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3568-rock-3a.dts
> create mode 100644 configs/rock-3a-rk3568_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 9d647b9639..945843bebc 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -165,7 +165,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> rk3399pro-rock-pi-n10.dtb
>
> dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> - rk3568-evb.dtb
> + rk3568-evb.dtb \
> + rk3568-rock-3a.dtb
>
> dtb-$(CONFIG_ROCKCHIP_RV1108) += \
> rv1108-elgin-r1.dtb \
> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> new file mode 100644
> index 00..ae23ae8587
> --- /dev/null
> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2021 Rockchip Electronics Co., Ltd
> + * (C) Copyright 2023 Akash Gajjar
> + */
> +
> +#include "rk356x-u-boot.dtsi"
> +
> +/ {
> + chosen {
> + stdout-path =
> + u-boot,spl-boot-order = "same-as-spl",
> + };
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + clock-frequency = <2400>;
> + u-boot,dm-spl;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts
> new file mode 100644
> index 00..a2f2baa4ea
> --- /dev/null
> +++ b/arch/arm/dts/rk3568-rock-3a.dts
> @@ -0,0 +1,609 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + * Copyright (c) 2023 Akash Gajjar
> + */
> +
> +/dts-v1/;
> +#include
> +#include
> +#include "rk3568.dtsi"
> +
> +/ {
> + model = "Radxa ROCK3 Model A";
> + compatible = "radxa,rock3a", "rockchip,rk3568";
> +
> + chosen: chosen {
> + stdout-path = "serial2:150n8";
> + };
> +
> + gmac1_clkin: external-gmac1-clock {
> + compatible = "fixed-clock";
> + clock-frequency = <12500>;
> + clock-output-names = "gmac1_clkin";
> + #clock-cells = <0>;
> + };
> +
> + vcc12v_dcin: vcc12v-dcin-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc12v_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1200>;
> + regulator-max-microvolt = <1200>;
> + };
> +
> + vcc3v3_sys: vcc3v3-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + vin-supply = <_dcin>;
> + };
> +
> + vcc5v0_sys: vcc5v0-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> +
Re: [PATCH 1/5] sunxi: video: No double clock on DE2
On Wed, Sep 16, 2020 at 9:26 AM Martin Cerveny wrote: > > > > On Wed, 16 Sep 2020, Maxime Ripard wrote: > > > On Wed, Sep 16, 2020 at 04:10:48PM +0200, Martin Cerveny wrote: > >> Weird code or comment. This is variant is tested on V3s. > >> > >> Signed-off-by: Martin Cerveny > > > > Generally speaking your commit logs are fairly concise, but it really > > becomes an issue when you're allegedly fixing a bug. > > > > There's a bunch of questions here that are completely up in the air: > > > > - What issue are you actually trying to fix, how can one reproduce it > > - You claim that there's no double clock on the DE2, according to > >what? > > - DE2 is used on way more SoCs than just the V3s, did you check/test > >on those SoCs as well? > > > > In general, a good commit log should not explain what you're doing but > > *why* you're doing it. The what can be quite easily figured out from the > > patch content, the why can't today, and it will be even harder in a > > year's time. > > > > Maxime > > > > I cannot issue more information on the problem: > - check original code - the "1x pll" was commented by #ifndef >(only "2x pll" is computed) > - but original author added comment "/* No double clock on DE2 */" > - V3s does not support "2x pll" in TCON_CLK_REG > > So I wrote where I tested this patch. > It should be discussed with original author. Sorry, I don't remember the details on why the driver uses pll-video0-2x, that's the code from 2017 > Regards. > > CC: Vasily Khoruzhick
Re: [U-Boot] [PATCH 2/2] rockchip: rk3399: rockpro64: enable force power on reset workaround
On Thu, Nov 28, 2019 at 4:59 PM Kever Yang wrote: > > Hi Vasily, > > On 2019/11/28 下午11:51, Vasily Khoruzhick wrote: > > On Thu, Nov 28, 2019 at 1:23 AM Kever Yang > > wrote: > >> Hi Vasily, > >> > >> I think this should not be needed, see comments below. > > Hi Kever, > > > > I've spent 2 weeks of my evenings debugging this issue but > > I can understand you work pretty hard on make it work, it's not so easy > to identify the root cause > > some times, thanks very much for working on this. > > > unfortunately I don't have a proper fix. This is the only solution > > that makes my rockpro64 reboot reliably with mainline u-boot and ATF. > > See my comments below. > > > >> Hi Philipp, Klaus and Christoph: > >> > >> Could you help to check why do you need below patch for your board? > >> > >> ae0d33a729 rockchip: rk3399-puma: add code to allow forcing a power-on > >> reset > >> > >> > >> I think we don't need this workaround for rk3399 CPU_B voltage > >> supply, and > >> here is what I got: > >> - rockchip use cru glb_rst_1 for reboot in kernel; > >> - the glb_rst_1 will reset all the GPIO logic to default state; > >> - the cpu_b voltage supplier syr83x have a VSEL connect to rk3399, which > >> may be > >> a pull up/down IO, > >> - the syr83x output with the hardware default state of the VSEL(with > >> RK3399 default IO output) > >> should be normal output(1.0V), and another state output for > >> suspend(disabled), > >> - In order to make the syr83x works as expected, the kernel setting of > >> syr83x should be correct, > >> check property: > >> fcs,suspend-voltage-selector = <1>; > >> This is correct for rockpro64(vsel connect to a gpio with default > >> pull down) on upstream, > >> but I don't have a puma schematic, so I don't know if this is > >> correct for puma. > >> - With correct setting in syr83x, the cpu_b should always have power > >> supply after reboot/reset with > >> cru glb_rst_1 reg. > >> So no workaround is needed in U-Boot, please correct me if anything is > >> missing. > > I already tried re-initializing SYR83x, see [1] (and thus fixed couple > > of the bugs in FAN53555 driver which has been broken since it was > > merged into u-boot) but it doesn't help with reboot issue on > > RockPro64. I checked VSEL gpio status and it's identical on cold boot > > and on soft reboot, so I doubt SYR83X settings are related since I > > checked regulators settings and they're correct. > > Could you help to provide some more info? > > - For code boot, syr83x VSEL is low, and what is its output voltage? > > - For reboot, syr83x VSEL is low, what is its output voltage? I'll double check later tonight. > - For reboot, after this patch, the syr83x VSEL is high, what is its > output voltage? This patch doesn't touch VSEL. It sets OTP_OUT to 1, see [1] "Over-Temperature Protection" and thus forces board reset. OTP_OUT is GPIO1 A6. VSEL (or rather CPU_B_SLEEP_H) is different pin, it's wired to GPIO1 C1 http://files.pine64.org/doc/rockpro64/rockpro64_v21-SCH.pdf > I think the setting of syr83x is wrong if the output voltage is not the > same for code boot and reboot. > > > > > I tried to boot with CPUFREQ disabled - that didn't help, linux hangs > > when booted after soft reset. > > > > Also tried to boot with big cluster disabled - that didn't help either. > > This is strange, this patch only affects the big cluster CPU, if big > cluster is disabled, then there is > > no reason this patch can work. Have you double check the big cluster is > truly _DISABLED_? See explanation above. > > Thanks, > > - Kever > > > > > So could you merge this patch please unless someone else wants to work > > on this issue? > > > > Thanks, > > Vasily. > > > > [1] > > https://github.com/anarsoul/u-boot-pine64/commit/7a50e58f09c68efe08f0b9912805fb9b3c985751 > > > >> Thanks, > >> - Kever > >> On 2019/11/28 下午2:14, Vasily Khoruzhick wrote: > >>> Rockpro64 doesn't boot reliably after soft reset, so let's force power on > >>> reset by asserting sysreset pin if we detected soft reset. > >>> > >>> Signed-off-by: Vasily Khoruzhick > >>> --- > >>>arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 8 > >>>configs/rockpro64-rk3399_
Re: [U-Boot] [PATCH 2/2] rockchip: rk3399: rockpro64: enable force power on reset workaround
On Thu, Nov 28, 2019 at 1:23 AM Kever Yang wrote:
>
> Hi Vasily,
>
> I think this should not be needed, see comments below.
Hi Kever,
I've spent 2 weeks of my evenings debugging this issue but
unfortunately I don't have a proper fix. This is the only solution
that makes my rockpro64 reboot reliably with mainline u-boot and ATF.
See my comments below.
> Hi Philipp, Klaus and Christoph:
>
> Could you help to check why do you need below patch for your board?
>
> ae0d33a729 rockchip: rk3399-puma: add code to allow forcing a power-on reset
>
>
> I think we don't need this workaround for rk3399 CPU_B voltage
> supply, and
> here is what I got:
> - rockchip use cru glb_rst_1 for reboot in kernel;
> - the glb_rst_1 will reset all the GPIO logic to default state;
> - the cpu_b voltage supplier syr83x have a VSEL connect to rk3399, which
> may be
> a pull up/down IO,
> - the syr83x output with the hardware default state of the VSEL(with
> RK3399 default IO output)
>should be normal output(1.0V), and another state output for
> suspend(disabled),
> - In order to make the syr83x works as expected, the kernel setting of
> syr83x should be correct,
>check property:
> fcs,suspend-voltage-selector = <1>;
> This is correct for rockpro64(vsel connect to a gpio with default
> pull down) on upstream,
> but I don't have a puma schematic, so I don't know if this is
> correct for puma.
> - With correct setting in syr83x, the cpu_b should always have power
> supply after reboot/reset with
>cru glb_rst_1 reg.
> So no workaround is needed in U-Boot, please correct me if anything is
> missing.
I already tried re-initializing SYR83x, see [1] (and thus fixed couple
of the bugs in FAN53555 driver which has been broken since it was
merged into u-boot) but it doesn't help with reboot issue on
RockPro64. I checked VSEL gpio status and it's identical on cold boot
and on soft reboot, so I doubt SYR83X settings are related since I
checked regulators settings and they're correct.
I tried to boot with CPUFREQ disabled - that didn't help, linux hangs
when booted after soft reset.
Also tried to boot with big cluster disabled - that didn't help either.
So could you merge this patch please unless someone else wants to work
on this issue?
Thanks,
Vasily.
[1]
https://github.com/anarsoul/u-boot-pine64/commit/7a50e58f09c68efe08f0b9912805fb9b3c985751
> Thanks,
> - Kever
> On 2019/11/28 下午2:14, Vasily Khoruzhick wrote:
> > Rockpro64 doesn't boot reliably after soft reset, so let's force power on
> > reset by asserting sysreset pin if we detected soft reset.
> >
> > Signed-off-by: Vasily Khoruzhick
> > ---
> > arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 8
> > configs/rockpro64-rk3399_defconfig| 1 +
> > 2 files changed, 9 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > index 4648513ea9..bb94bcf7be 100644
> > --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> > @@ -6,11 +6,19 @@
> > #include "rk3399-u-boot.dtsi"
> > #include "rk3399-sdram-lpddr4-100.dtsi"
> > / {
> > + config {
> > + sysreset-gpio = < RK_PA6 GPIO_ACTIVE_HIGH>;
> > + };
> > +
> > chosen {
> > u-boot,spl-boot-order = "same-as-spl", ,
> > };
> > };
> >
> > + {
> > + u-boot,dm-pre-reloc;
> > +};
> > +
> > _center {
> > regulator-min-microvolt = <95>;
> > regulator-max-microvolt = <95>;
> > diff --git a/configs/rockpro64-rk3399_defconfig
> > b/configs/rockpro64-rk3399_defconfig
> > index 49e27c91cb..d153ac5485 100644
> > --- a/configs/rockpro64-rk3399_defconfig
> > +++ b/configs/rockpro64-rk3399_defconfig
> > @@ -1,6 +1,7 @@
> > CONFIG_ARM=y
> > CONFIG_ARCH_ROCKCHIP=y
> > CONFIG_SYS_TEXT_BASE=0x0020
> > +CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_ROCKCHIP_RK3399=y
> > CONFIG_ENV_OFFSET=0x3F8000
> > CONFIG_TARGET_ROCKPRO64_RK3399=y
>
>
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[U-Boot] [PATCH 2/2] rockchip: rk3399: rockpro64: enable force power on reset workaround
Rockpro64 doesn't boot reliably after soft reset, so let's force power on
reset by asserting sysreset pin if we detected soft reset.
Signed-off-by: Vasily Khoruzhick
---
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 8
configs/rockpro64-rk3399_defconfig| 1 +
2 files changed, 9 insertions(+)
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index 4648513ea9..bb94bcf7be 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -6,11 +6,19 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
/ {
+ config {
+ sysreset-gpio = < RK_PA6 GPIO_ACTIVE_HIGH>;
+ };
+
chosen {
u-boot,spl-boot-order = "same-as-spl", ,
};
};
+ {
+ u-boot,dm-pre-reloc;
+};
+
_center {
regulator-min-microvolt = <95>;
regulator-max-microvolt = <95>;
diff --git a/configs/rockpro64-rk3399_defconfig
b/configs/rockpro64-rk3399_defconfig
index 49e27c91cb..d153ac5485 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x0020
+CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_TARGET_ROCKPRO64_RK3399=y
--
2.24.0
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[U-Boot] [PATCH 1/2] rockchip: rk3399: fix force power on reset
Currently code doesn't even compile since it uses wrong
define for ifdef. Fix that and also add missing include
Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init")
Signed-off-by: Vasily Khoruzhick
---
arch/arm/mach-rockchip/rk3399/rk3399.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 863024d071..eeb99dd11b 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -213,7 +214,7 @@ void spl_perform_fixups(struct spl_image_info *spl_image)
"u-boot,spl-boot-device", boot_ofpath);
}
-#if defined(SPL_GPIO_SUPPORT)
+#if defined(CONFIG_SPL_GPIO_SUPPORT)
static void rk3399_force_power_on_reset(void)
{
ofnode node;
@@ -239,7 +240,7 @@ static void rk3399_force_power_on_reset(void)
void spl_board_init(void)
{
-#if defined(SPL_GPIO_SUPPORT)
+#if defined(CONFIG_SPL_GPIO_SUPPORT)
struct rk3399_cru *cru = rockchip_get_cru();
/*
--
2.24.0
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Re: [U-Boot] [PATCH v2 2/8] rockchip: rk3399: Support common spl_board_init
On Thu, Jun 20, 2019 at 11:57 AM Jagan Teki wrote:
>
> Support common spl_board_init by moving code from puma
> board file into, common rk3399-board-spl.c.
>
> Part of the code has sysreset-gpio, regulators_enable_boot_on
> but right now only puma board is using this with relevant
> config options rest remains common for all targets.
>
> Signed-off-by: Jagan Teki
> ---
> arch/arm/mach-rockchip/rk3399-board-spl.c | 63 +++
> board/rockchip/evb_rk3399/evb-rk3399.c| 8 ---
> .../puma_rk3399/puma-rk3399.c | 58 -
> board/vamrs/rock960_rk3399/rock960-rk3399.c | 8 ---
> 4 files changed, 63 insertions(+), 74 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c
> b/arch/arm/mach-rockchip/rk3399-board-spl.c
> index 800ca80022..65c98b697d 100644
> --- a/arch/arm/mach-rockchip/rk3399-board-spl.c
> +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
> @@ -11,13 +11,16 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> #include
> +#include
> #include
>
> void board_return_to_bootrom(void)
> @@ -202,6 +205,66 @@ void board_init_f(ulong dummy)
> }
> }
>
> +#if defined(SPL_GPIO_SUPPORT)
That hasn't been compile tested since "defined(SPL_GPIO_SUPPORT)"
ensures that this code never compiles.
It should be CONFIG_SPL_GPIO_SUPPORT instead, and it won't compile due
to missing header in this case.
Unfortunately code won't work even with missing include added since
something else is broken and it fails to request gpio.
> +static void rk3399_force_power_on_reset(void)
> +{
> + ofnode node;
> + struct gpio_desc sysreset_gpio;
> +
> + debug("%s: trying to force a power-on reset\n", __func__);
> +
> + node = ofnode_path("/config");
> + if (!ofnode_valid(node)) {
> + debug("%s: no /config node?\n", __func__);
> + return;
> + }
> +
> + if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0,
> + _gpio, GPIOD_IS_OUT)) {
> + debug("%s: could not find a /config/sysreset-gpio\n",
> __func__);
> + return;
> + }
> +
> + dm_gpio_set_value(_gpio, 1);
> +}
> +#endif
> +
> +void spl_board_init(void)
> +{
> +#if defined(SPL_GPIO_SUPPORT)
> + struct rk3399_cru *cru = rockchip_get_cru();
> +
> + /*
> +* The RK3399 resets only 'almost all logic' (see also in the TRM
> +* "3.9.4 Global software reset"), when issuing a software reset.
> +* This may cause issues during boot-up for some configurations of
> +* the application software stack.
> +*
> +* To work around this, we test whether the last reset reason was
> +* a power-on reset and (if not) issue an overtemp-reset to reset
> +* the entire module.
> +*
> +* While this was previously fixed by modifying the various places
> +* that could generate a software reset (e.g. U-Boot's sysreset
> +* driver, the ATF or Linux), we now have it here to ensure that
> +* we no longer have to track this through the various components.
> +*/
> + if (cru->glb_rst_st != 0)
> + rk3399_force_power_on_reset();
> +#endif
> +
> +#if defined(SPL_DM_REGULATOR)
> + /*
> +* Turning the eMMC and SPI back on (if disabled via the Qseven
> +* BIOS_ENABLE) signal is done through a always-on regulator).
> +*/
> + if (regulators_enable_boot_on(false))
> + debug("%s: Cannot enable boot on regulator\n", __func__);
> +#endif
> +
> + preloader_console_init();
> +}
> +
> #ifdef CONFIG_SPL_LOAD_FIT
> int board_fit_config_name_match(const char *name)
> {
> diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c
> b/board/rockchip/evb_rk3399/evb-rk3399.c
> index 769b5d146f..c600553ff6 100644
> --- a/board/rockchip/evb_rk3399/evb-rk3399.c
> +++ b/board/rockchip/evb_rk3399/evb-rk3399.c
> @@ -8,7 +8,6 @@
> #include
> #include
> #include
> -#include
>
> int board_init(void)
> {
> @@ -64,10 +63,3 @@ int board_init(void)
> out:
> return 0;
> }
> -
> -void spl_board_init(void)
> -{
> - preloader_console_init();
> -
> - return;
> -}
> diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
> b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
> index c6b509c109..251cd2d566 100644
> --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
> +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
> @@ -13,10 +13,8 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -38,62 +36,6 @@ int board_init(void)
> return 0;
> }
>
> -static void rk3399_force_power_on_reset(void)
> -{
> - ofnode node;
> - struct gpio_desc sysreset_gpio;
> -
> - debug("%s: trying to force a
Re: [U-Boot] Reboot is broken on RockPro64 with mainline u-boot and ATF
On Wed, Nov 27, 2019 at 9:53 AM Jagan Teki wrote: > > Hi, > > On Mon, Nov 25, 2019 at 10:56 PM Vasily Khoruzhick wrote: > > > > Hey guys, > > > > Looks like reboot is broken on RockPro64 (RK3399-based) with mainline > > u-boot and ATF (ATF already has a fix [1]). > > > > When I type 'reboot' in linux I get back to u-boot, but subsequent > > linux boot hangs in most cases. Sometimes I get this warning: > > > > [ 62.400363] rcu: INFO: rcu_sched detected stalls on CPUs/tasks: > > [ 62.418095] rcu: 4-...!: (3 ticks this GP) > > idle=332/1/0x4000 softirq=23/24 fqs=13 > > [ 62.444137] Task dump for CPU 4: > > [ 62.453791] kworker/4:1 R running task042 2 > > 0x002a > > [ 62.474907] Workqueue: pm genpd_power_off_work_fn > > [ 62.489013] rcu: rcu_sched kthread starved for 5976 jiffies! g-1147 > > f0x0 RCU_GP_WAIT_FQS(5) ->state=0x0 ->cpu=1 > > [ 62.519205] rcu: RCU grace-period kthread stack dump: > > [ 62.534316] rcu_sched R running task010 2 > > 0x0028 > > > > I already checked that regulators are configured correctly, also I > > tried to disable big CPU cluster in linux and re-initializing CPU > > voltages in u-boot but unfortunately nothing helps. > > > > There were other reports on #linux-rockchip at freenode that reboot is > > broken. > > > > Any ideas how to debug it or what could be wrong? > > I did see it was hang in SPL when I reboot from Linux. But nothing > seen with rkbin. Can you have a quick check with rkbin flow if you > haven't tried yet? (I mean idbloader.img, trust.img and uboot.img) It gets to u-boot console and it hangs in Linux before it even starts init for me. I can check with rkbin and it'll likely work, but it won't help much since we don't have sources for these blobs. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Reboot is broken on RockPro64 with mainline u-boot and ATF
On Mon, Nov 25, 2019 at 9:25 AM Vasily Khoruzhick wrote: > > Hey guys, > > Looks like reboot is broken on RockPro64 (RK3399-based) with mainline > u-boot and ATF (ATF already has a fix [1]). Added Philipp and Simon to CC. Can anyone please help me with this issue? > When I type 'reboot' in linux I get back to u-boot, but subsequent > linux boot hangs in most cases. Sometimes I get this warning: > > [ 62.400363] rcu: INFO: rcu_sched detected stalls on CPUs/tasks: > [ 62.418095] rcu: 4-...!: (3 ticks this GP) > idle=332/1/0x4000 softirq=23/24 fqs=13 > [ 62.444137] Task dump for CPU 4: > [ 62.453791] kworker/4:1 R running task042 2 > 0x002a > [ 62.474907] Workqueue: pm genpd_power_off_work_fn > [ 62.489013] rcu: rcu_sched kthread starved for 5976 jiffies! g-1147 > f0x0 RCU_GP_WAIT_FQS(5) ->state=0x0 ->cpu=1 > [ 62.519205] rcu: RCU grace-period kthread stack dump: > [ 62.534316] rcu_sched R running task010 2 > 0x0028 > > I already checked that regulators are configured correctly, also I > tried to disable big CPU cluster in linux and re-initializing CPU > voltages in u-boot but unfortunately nothing helps. > > There were other reports on #linux-rockchip at freenode that reboot is broken. > > Any ideas how to debug it or what could be wrong? > > Regards, > Vasily > > [1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/2512 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Reboot is broken on RockPro64 with mainline u-boot and ATF
Hey guys, Looks like reboot is broken on RockPro64 (RK3399-based) with mainline u-boot and ATF (ATF already has a fix [1]). When I type 'reboot' in linux I get back to u-boot, but subsequent linux boot hangs in most cases. Sometimes I get this warning: [ 62.400363] rcu: INFO: rcu_sched detected stalls on CPUs/tasks: [ 62.418095] rcu: 4-...!: (3 ticks this GP) idle=332/1/0x4000 softirq=23/24 fqs=13 [ 62.444137] Task dump for CPU 4: [ 62.453791] kworker/4:1 R running task042 2 0x002a [ 62.474907] Workqueue: pm genpd_power_off_work_fn [ 62.489013] rcu: rcu_sched kthread starved for 5976 jiffies! g-1147 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x0 ->cpu=1 [ 62.519205] rcu: RCU grace-period kthread stack dump: [ 62.534316] rcu_sched R running task010 2 0x0028 I already checked that regulators are configured correctly, also I tried to disable big CPU cluster in linux and re-initializing CPU voltages in u-boot but unfortunately nothing helps. There were other reports on #linux-rockchip at freenode that reboot is broken. Any ideas how to debug it or what could be wrong? Regards, Vasily [1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/2512 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] power: fan53555: add support for Silergy SYR82X and SYR83X
On Tue, Nov 19, 2019 at 5:51 PM Anand Moon wrote:
>
> Hi Vasily,
>
> I have got a development board Odroid N1
> it has SYR837PKC and SYR838PKC regulator IC on the board.
>
> On testing this patch, it failed with below message.
>
> Model: Hardkernel ODROID-N1
> DRAM: 3.9 GiB
> SW: fan53555_voltages_setup: die id 7 rev 7 not supported!
> MMC: dwmmc@fe32: 1, sdhci@fe33: 0
> Loading Environment from MMC... Card did not respond to voltage select!
> *** Warning - No block device, using default environment
>
> could you add this *die id* and *rev id* and update in the next patch.
Likely you're missing another patch from me, see
https://patchwork.ozlabs.org/patch/1196194/ so ID you're getting here
are not correct.
> Could we enable this feature on all rk3399 development boards
That's out of scope of this patch.
> -Anand
>
> On Sun, 17 Nov 2019 at 01:02, Vasily Khoruzhick wrote:
> >
> > SYR82X and SYR83X are almost identical to FAN53555, the only difference
> > is different die ID and revision, voltage ranges and steps.
> >
> > Signed-off-by: Vasily Khoruzhick
> > ---
> > drivers/power/pmic/fan53555.c | 7 +++--
> > drivers/power/regulator/fan53555.c | 45 ++
> > include/power/fan53555.h | 14 ++
> > 3 files changed, 52 insertions(+), 14 deletions(-)
> > create mode 100644 include/power/fan53555.h
> >
> > diff --git a/drivers/power/pmic/fan53555.c b/drivers/power/pmic/fan53555.c
> > index 1ca59c5f0c..11304d2146 100644
> > --- a/drivers/power/pmic/fan53555.c
> > +++ b/drivers/power/pmic/fan53555.c
> > @@ -8,6 +8,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -58,7 +59,7 @@ static int pmic_fan53555_bind(struct udevice *dev)
> > return -ENOENT;
> > }
> >
> > - return device_bind_with_driver_data(dev, drv, "SW", 0,
> > + return device_bind_with_driver_data(dev, drv, "SW",
> > dev->driver_data,
> > dev_ofnode(dev), );
> > };
> >
> > @@ -69,7 +70,9 @@ static struct dm_pmic_ops pmic_fan53555_ops = {
> > };
> >
> > static const struct udevice_id pmic_fan53555_match[] = {
> > - { .compatible = "fcs,fan53555" },
> > + { .compatible = "fcs,fan53555", .data = FAN53555_VENDOR_FAIRCHILD,
> > },
> > + { .compatible = "silergy,syr827", .data = FAN53555_VENDOR_SILERGY,
> > },
> > + { .compatible = "silergy,syr828", .data = FAN53555_VENDOR_SILERGY,
> > },
> > { },
> > };
> >
> > diff --git a/drivers/power/regulator/fan53555.c
> > b/drivers/power/regulator/fan53555.c
> > index dbd5502377..9c48b26216 100644
> > --- a/drivers/power/regulator/fan53555.c
> > +++ b/drivers/power/regulator/fan53555.c
> > @@ -10,6 +10,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -27,21 +28,37 @@
> > * See http://www.onsemi.com/pub/Collateral/FAN53555-D.pdf for details.
> > */
> > static const struct {
> > + unsigned int vendor;
> > u8 die_id;
> > u8 die_rev;
> > + bool check_rev;
> > u32 vsel_min;
> > u32 vsel_step;
> > } ic_types[] = {
> > - { 0x0, 0x3, 60, 1 }, /* Option 00 */
> > - { 0x0, 0xf, 80, 1 }, /* Option 13 */
> > - { 0x0, 0xc, 60, 12500 }, /* Option 23 */
> > - { 0x1, 0x3, 60, 1 }, /* Option 01 */
> > - { 0x3, 0x3, 60, 1 }, /* Option 03 */
> > - { 0x4, 0xf, 603000, 12826 }, /* Option 04 */
> > - { 0x5, 0x3, 60, 1 }, /* Option 05 */
> > - { 0x8, 0x1, 60, 1 }, /* Option 08 */
> > - { 0x8, 0xf, 60, 1 }, /* Option 08 */
> > - { 0xc, 0xf, 603000, 12826 }, /* Option 09 */
> > + /* Option 00 */
> > + { FAN53555_VENDOR_FAIRCHILD, 0x0, 0x3, true, 60, 1 },
> > + /* Option 13 */
> > + { FAN53555_VENDOR_FAIRCHILD, 0x0, 0xf, true, 80, 1 },
> > + /* Option 23 */
> > + { FAN53555_VENDOR_FAIRCHILD, 0x0, 0xc, true, 60, 12500 },
> > + /* Option 01 */
> > + { FAN53555_VENDOR_FAIRCHILD, 0x1, 0x3, true, 60, 1 },
> > + /* Option 03 */
> > + { FAN53555_VENDOR_FAIRCHILD, 0x3, 0x3, true, 60, 1 },
> > + /*
Re: [U-Boot] [PATCH] rockchip: i2c: don't sent stop bit after each message
On Sun, Nov 17, 2019 at 7:26 PM David.Wu wrote:
>
> Hi Vasily,
>
> 在 2019/11/17 3:32, Vasily Khoruzhick 写道:
> > + rk_i2c_send_stop_bit(i2c);
> > + rk_i2c_disable(i2c);
>
> I think it is better to also stop i2c if i2c xfer failed, how do you
> feel about it?
I'm not sure if it's a good idea to continue communication if we've
got a failure and sending a stop bit is continuing communication.
But I'm not an expert in i2c and I don't have any strong opinion on
that, so I can send v2 with change you proposed.
> @@ -356,11 +356,16 @@ static int rockchip_i2c_xfer(struct udevice *bus,
> struct i2c_msg *msg,
> }
> if (ret) {
> debug("i2c_write: error sending\n");
> - return -EREMOTEIO;
> + ret = -EREMOTEIO;
> + goto exit;
> }
> }
>
> - return 0;
> +exit:
> + rk_i2c_send_stop_bit(i2c);
> + rk_i2c_disable(i2c);
> +
> + return ret;
> }
>
>
>
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[U-Boot] [PATCH] power: fan53555: fix fan53555_regulator_set_value
fan53555_regulator_set_value() passes its own dev to pmic_clrsetbits()
instead of its parent (pmic). As result u-boot crashes when you try to
set voltage on fan53555 regulator
Signed-off-by: Vasily Khoruzhick
---
drivers/power/regulator/fan53555.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/regulator/fan53555.c
b/drivers/power/regulator/fan53555.c
index 9c48b26216..24a9b67586 100644
--- a/drivers/power/regulator/fan53555.c
+++ b/drivers/power/regulator/fan53555.c
@@ -159,7 +159,7 @@ static int fan53555_regulator_set_value(struct udevice
*dev, int uV)
debug("%s: uV=%d; writing volume %d: %02x\n",
__func__, uV, pdata->vol_reg, vol);
- return pmic_clrsetbits(dev, pdata->vol_reg, GENMASK(6, 0), vol);
+ return pmic_clrsetbits(dev->parent, pdata->vol_reg, GENMASK(6, 0), vol);
}
static int fan53555_voltages_setup(struct udevice *dev)
--
2.24.0
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[U-Boot] [PATCH] rockchip: i2c: don't sent stop bit after each message
That's not correct and it breaks SMBUS-style reads and and writes for some chips (e.g. SYR82X/SYR83X). Stop bit should be sent only after the last message. Signed-off-by: Vasily Khoruzhick --- drivers/i2c/rk_i2c.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c index cdd94bb05a..32b2ee8578 100644 --- a/drivers/i2c/rk_i2c.c +++ b/drivers/i2c/rk_i2c.c @@ -253,7 +253,6 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, } i2c_exit: - rk_i2c_send_stop_bit(i2c); rk_i2c_disable(i2c); return err; @@ -332,7 +331,6 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, } i2c_exit: - rk_i2c_send_stop_bit(i2c); rk_i2c_disable(i2c); return err; @@ -360,6 +358,9 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, } } + rk_i2c_send_stop_bit(i2c); + rk_i2c_disable(i2c); + return 0; } -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] power: fan53555: add support for Silergy SYR82X and SYR83X
SYR82X and SYR83X are almost identical to FAN53555, the only difference
is different die ID and revision, voltage ranges and steps.
Signed-off-by: Vasily Khoruzhick
---
drivers/power/pmic/fan53555.c | 7 +++--
drivers/power/regulator/fan53555.c | 45 ++
include/power/fan53555.h | 14 ++
3 files changed, 52 insertions(+), 14 deletions(-)
create mode 100644 include/power/fan53555.h
diff --git a/drivers/power/pmic/fan53555.c b/drivers/power/pmic/fan53555.c
index 1ca59c5f0c..11304d2146 100644
--- a/drivers/power/pmic/fan53555.c
+++ b/drivers/power/pmic/fan53555.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
@@ -58,7 +59,7 @@ static int pmic_fan53555_bind(struct udevice *dev)
return -ENOENT;
}
- return device_bind_with_driver_data(dev, drv, "SW", 0,
+ return device_bind_with_driver_data(dev, drv, "SW", dev->driver_data,
dev_ofnode(dev), );
};
@@ -69,7 +70,9 @@ static struct dm_pmic_ops pmic_fan53555_ops = {
};
static const struct udevice_id pmic_fan53555_match[] = {
- { .compatible = "fcs,fan53555" },
+ { .compatible = "fcs,fan53555", .data = FAN53555_VENDOR_FAIRCHILD, },
+ { .compatible = "silergy,syr827", .data = FAN53555_VENDOR_SILERGY, },
+ { .compatible = "silergy,syr828", .data = FAN53555_VENDOR_SILERGY, },
{ },
};
diff --git a/drivers/power/regulator/fan53555.c
b/drivers/power/regulator/fan53555.c
index dbd5502377..9c48b26216 100644
--- a/drivers/power/regulator/fan53555.c
+++ b/drivers/power/regulator/fan53555.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
@@ -27,21 +28,37 @@
* See http://www.onsemi.com/pub/Collateral/FAN53555-D.pdf for details.
*/
static const struct {
+ unsigned int vendor;
u8 die_id;
u8 die_rev;
+ bool check_rev;
u32 vsel_min;
u32 vsel_step;
} ic_types[] = {
- { 0x0, 0x3, 60, 1 }, /* Option 00 */
- { 0x0, 0xf, 80, 1 }, /* Option 13 */
- { 0x0, 0xc, 60, 12500 }, /* Option 23 */
- { 0x1, 0x3, 60, 1 }, /* Option 01 */
- { 0x3, 0x3, 60, 1 }, /* Option 03 */
- { 0x4, 0xf, 603000, 12826 }, /* Option 04 */
- { 0x5, 0x3, 60, 1 }, /* Option 05 */
- { 0x8, 0x1, 60, 1 }, /* Option 08 */
- { 0x8, 0xf, 60, 1 }, /* Option 08 */
- { 0xc, 0xf, 603000, 12826 }, /* Option 09 */
+ /* Option 00 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x0, 0x3, true, 60, 1 },
+ /* Option 13 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x0, 0xf, true, 80, 1 },
+ /* Option 23 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x0, 0xc, true, 60, 12500 },
+ /* Option 01 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x1, 0x3, true, 60, 1 },
+ /* Option 03 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x3, 0x3, true, 60, 1 },
+ /* Option 04 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x4, 0xf, true, 603000, 12826 },
+ /* Option 05 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x5, 0x3, true, 60, 1 },
+ /* Option 08 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x8, 0x1, true, 60, 1 },
+ /* Option 08 */
+ { FAN53555_VENDOR_FAIRCHILD, 0x8, 0xf, true, 60, 1 },
+ /* Option 09 */
+ { FAN53555_VENDOR_FAIRCHILD, 0xc, 0xf, true, 603000, 12826 },
+ /* SYL82X */
+ { FAN53555_VENDOR_SILERGY, 0x8, 0x0, false, 712500, 12500 },
+ /* SYL83X */
+ { FAN53555_VENDOR_SILERGY, 0x9, 0x0, false, 712500, 12500 },
};
/* I2C-accessible byte-sized registers */
@@ -152,10 +169,14 @@ static int fan53555_voltages_setup(struct udevice *dev)
/* Init voltage range and step */
for (i = 0; i < ARRAY_SIZE(ic_types); ++i) {
+ if (ic_types[i].vendor != priv->vendor)
+ continue;
+
if (ic_types[i].die_id != priv->die_id)
continue;
- if (ic_types[i].die_rev != priv->die_rev)
+ if (ic_types[i].check_rev &&
+ ic_types[i].die_rev != priv->die_rev)
continue;
priv->vsel_min = ic_types[i].vsel_min;
@@ -193,7 +214,7 @@ static int fan53555_probe(struct udevice *dev)
return ID2;
/* extract vendor, die_id and die_rev */
- priv->vendor = bitfield_extract(ID1, 5, 3);
+ priv->vendor = dev->driver_data;
priv->die_id = ID1 & GENMASK(3, 0);
priv->die_rev = ID2 & GENMASK(3, 0);
diff --git a/include/power/fan53555.h b/include/power/fan53555.h
new file mode 100644
index 00..c039f06071
--- /dev/null
+++ b/include/power/fan53555.h
@@ -0,0 +1,14 @@
+/* SPDX-Lic
Re: [U-Boot] [PATCH] rockchip: rk3399: Add Pinebook Pro laptop support
On Wed, Nov 13, 2019 at 4:51 PM Peter Robinson wrote:
>
> Add initial support for Pinebook Pro laptop.
Hi Peter,
> Specification
> - Rockchip RK3399
> - 4GB Dual-Channel LPDDR4
> - SD card slot
> - eMMC socket
> - 128Mb SPI Flash
> - PCIe 4X slot
> - AP6256 for WiFi + BT
> - 1920*1080 screen
> - USB 3.0, 2.0
> - USB Type C power and data
> - DC 12V/2A
It's 5V/3A, see schematics
>
> Signed-off-by: Peter Robinson
> ---
>
> Initial v1 for feedback
>
> U-Boot TPL 2020.01-rc2-5-g7d87be0ff5 (Nov 14 2019 - 00:27:33)
> Trying to boot from BOOTROM
> Returning to boot ROM...
>
> U-Boot SPL 2020.01-rc2-5-g7d87be0ff5 (Nov 14 2019 - 00:27:33 +)
> Trying to boot from MMC1
>
>
> U-Boot 2020.01-rc2-5-g7d87be0ff5 (Nov 14 2019 - 00:27:33 +)
>
> Model: Pine64 Pinebook Pro
> DRAM: 3.9 GiB
> PMIC: RK808
> MMC: dwmmc@fe32: 1, sdhci@fe33: 0
> In:serial@ff1a
> Out: serial@ff1a
> Err: serial@ff1a
> Model: Pine64 Pinebook Pro
> ## Error: Can't overwrite "serial#"
> ## Error inserting "serial#" variable, errno=1
That doesn't look right to me
> rockchip_dnl_key_pressed: adc_channel_single_shot fail!
> Net: No ethernet found.
> Hit any key to stop autoboot: 0
> =>
>
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 25 +
> arch/arm/dts/rk3399-pinebook-pro.dts | 631 ++
> arch/arm/mach-rockchip/rk3399/Kconfig | 8 +
> board/pine64/pinebook_pro_rk3399/Kconfig | 15 +
> board/pine64/pinebook_pro_rk3399/MAINTAINERS | 8 +
> board/pine64/pinebook_pro_rk3399/Makefile | 1 +
> .../pinebook_pro_rk3399/pinebook-pro-rk3399.c | 192 ++
> configs/pinebook_pro-rk3399_defconfig | 76 +++
> include/configs/pinebook_pro_rk3399.h | 29 +
> 10 files changed, 986 insertions(+)
> create mode 100644 arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts
> create mode 100644 board/pine64/pinebook_pro_rk3399/Kconfig
> create mode 100644 board/pine64/pinebook_pro_rk3399/MAINTAINERS
> create mode 100644 board/pine64/pinebook_pro_rk3399/Makefile
> create mode 100644 board/pine64/pinebook_pro_rk3399/pinebook-pro-rk3399.c
> create mode 100644 configs/pinebook_pro-rk3399_defconfig
> create mode 100644 include/configs/pinebook_pro_rk3399.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 5a64fcc5a7..affedfd666 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -116,6 +116,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> rk3399-nanopi-m4.dtb \
> rk3399-nanopi-neo4.dtb \
> rk3399-orangepi.dtb \
> + rk3399-pinebook-pro.dtb \
> rk3399-puma-ddr1333.dtb \
> rk3399-puma-ddr1600.dtb \
> rk3399-puma-ddr1866.dtb \
> diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
> b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
> new file mode 100644
> index 00..9b0cb7010f
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Peter Robinson
> + */
> +
> +#include "rk3399-u-boot.dtsi"
> +#include "rk3399-sdram-lpddr4-100.dtsi"
> +
> +/ {
> + chosen {
> + u-boot,spl-boot-order = "same-as-spl", ,
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> +u-boot,dm-pre-reloc;
> +};
> +
> + {
> +u-boot,dm-pre-reloc;
> +};
> diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts
> b/arch/arm/dts/rk3399-pinebook-pro.dts
> new file mode 100644
> index 00..85ce0206d7
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-pinebook-pro.dts
You have to submit this DTS into linux first and then sync linux dts to u-boot.
> @@ -0,0 +1,631 @@
> +/*
> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +/dts-v1/;
> +#include
> +#include
> +#include
> +#include "rk3399.dtsi"
> +#include "rk3399-opp.dtsi"
> +
> +/ {
> + model = "Pine64 Pinebook Pro";
> + compatible = "pine64,pinebook-pro", "rockchip,rk3399";
> +
> + chosen {
> + stdout-path =
> + };
> +
> + aliases {
> + spi0 =
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + enable-gpios = < RK_PA0 GPIO_ACTIVE_HIGH>;
> + pwms = < 0 740740 0>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + autorepeat;
> + pinctrl-names = "default";
> + pinctrl-0 = <>;
> +
> + power {
> + debounce-interval = <100>;
> + gpios = < RK_PA5 GPIO_ACTIVE_LOW>;
> + label = "GPIO Key Power";
> + linux,code = ;
> + wakeup-source;
> + };
> + };
Re: [U-Boot] [PATCH v2] rockchip: rk3399: split rockpro64 out of evb_rk3399
On Sun, Nov 10, 2019 at 7:01 AM Peter Robinson wrote: > > On Sat, Nov 9, 2019 at 7:25 PM Vasily Khoruzhick wrote: > > > > rockpro64 needs to setup I/O domains in order for USB to work in u-boot. > > Since we currently don't have a driver to do that, split it into its own > > board file and initialize I/O domains here. > > > > Signed-off-by: Vasily Khoruzhick > > --- > > v2: add missing include/configs/rockpro64_rk3399.h > > > > arch/arm/mach-rockchip/rk3399/Kconfig | 20 +++ > > board/pine64/rockpro64_rk3399/Kconfig | 15 + > > board/pine64/rockpro64_rk3399/MAINTAINERS | 8 +++ > > board/pine64/rockpro64_rk3399/Makefile| 7 +++ > > .../rockpro64_rk3399/rockpro64-rk3399.c | 55 +++ > > board/rockchip/evb_rk3399/MAINTAINERS | 7 --- > > configs/rockpro64-rk3399_defconfig| 1 + > > include/configs/rockpro64_rk3399.h| 15 + > > 8 files changed, 121 insertions(+), 7 deletions(-) > > create mode 100644 board/pine64/rockpro64_rk3399/Kconfig > > create mode 100644 board/pine64/rockpro64_rk3399/MAINTAINERS > > create mode 100644 board/pine64/rockpro64_rk3399/Makefile > > create mode 100644 board/pine64/rockpro64_rk3399/rockpro64-rk3399.c > > create mode 100644 include/configs/rockpro64_rk3399.h > > > > diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig > > b/arch/arm/mach-rockchip/rk3399/Kconfig > > index 6660d05349..db67440c11 100644 > > --- a/arch/arm/mach-rockchip/rk3399/Kconfig > > +++ b/arch/arm/mach-rockchip/rk3399/Kconfig > > @@ -62,6 +62,25 @@ config TARGET_CHROMEBOOK_BOB > > display. It includes a Chrome OS EC (Cortex-M3) to provide access > > to > > the keyboard and battery functions. > > > > +config TARGET_ROCKPRO64_RK3399 > > + bool "Pine64 Rockpro64 board" > > + help > > + Rockro64 is SBC produced by Pine64. Key features: > > + > > + * Rockchip RK3399 > > + * 2/4GB Dual-Channel LPDDR3 > > + * SD card slot > > + * eMMC socket > > + * 128Mb SPI Flash > > + * Gigabit ethernet > > + * PCIe 4X slot > > + * WiFI/BT module socket > > + * HDMI In/Out, DP, MIPI DSI/CSI, eDP > > + * USB 3.0, 2.0 > > + * USB Type C power and data > > + * GPIO expansion ports > > + * DC 12V/2A > > + > > endchoice > > > > config ROCKCHIP_BOOT_MODE_REG > > @@ -95,5 +114,6 @@ source "board/rockchip/evb_rk3399/Kconfig" > > source "board/theobroma-systems/puma_rk3399/Kconfig" > > source "board/vamrs/rock960_rk3399/Kconfig" > > source "board/google/gru/Kconfig" > > +source "board/pine64/rockpro64_rk3399/Kconfig" > > > > endif > > diff --git a/board/pine64/rockpro64_rk3399/Kconfig > > b/board/pine64/rockpro64_rk3399/Kconfig > > new file mode 100644 > > index 00..3353f1fd09 > > --- /dev/null > > +++ b/board/pine64/rockpro64_rk3399/Kconfig > > @@ -0,0 +1,15 @@ > > +if TARGET_ROCKPRO64_RK3399 > > + > > +config SYS_BOARD > > + default "rockpro64_rk3399" > > + > > +config SYS_VENDOR > > + default "pine64" > > + > > +config SYS_CONFIG_NAME > > + default "rockpro64_rk3399" > > + > > +config BOARD_SPECIFIC_OPTIONS # dummy > > + def_bool y > > + > > +endif > > diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS > > b/board/pine64/rockpro64_rk3399/MAINTAINERS > > new file mode 100644 > > index 00..303db144aa > > --- /dev/null > > +++ b/board/pine64/rockpro64_rk3399/MAINTAINERS > > @@ -0,0 +1,8 @@ > > +ROCKPRO64 > > +M: Akash Gajjar > > +M: Jagan Teki > > +S: Maintained > > +F: board/pine64/rockpro64_rk3399 > > +F: include/configs/rockpro64_rk3399.h > > +F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi > > I think this should also have: > F: arch/arm/dts/rk3399-rockpro64.dts It wasn't there in board/rockchip/evb_rk3399/MAINTAINERS. Actually none of the boards have their dts listed in this file. > > +F: configs/rockpro64-rk3399_defconfig > > diff --git a/board/pine64/rockpro64_rk3399/Makefile > > b/board/pine64/rockpro64_rk3399/Makefile > > new file mode 100644 > > index 00..b015c47e6f > > --- /dev/null > > +++ b/board/pine64/rockpro64_rk3399/Makefile > > @@ -0,0 +1
[U-Boot] [PATCH v2] rockchip: rk3399: split rockpro64 out of evb_rk3399
rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.
Signed-off-by: Vasily Khoruzhick
---
v2: add missing include/configs/rockpro64_rk3399.h
arch/arm/mach-rockchip/rk3399/Kconfig | 20 +++
board/pine64/rockpro64_rk3399/Kconfig | 15 +
board/pine64/rockpro64_rk3399/MAINTAINERS | 8 +++
board/pine64/rockpro64_rk3399/Makefile| 7 +++
.../rockpro64_rk3399/rockpro64-rk3399.c | 55 +++
board/rockchip/evb_rk3399/MAINTAINERS | 7 ---
configs/rockpro64-rk3399_defconfig| 1 +
include/configs/rockpro64_rk3399.h| 15 +
8 files changed, 121 insertions(+), 7 deletions(-)
create mode 100644 board/pine64/rockpro64_rk3399/Kconfig
create mode 100644 board/pine64/rockpro64_rk3399/MAINTAINERS
create mode 100644 board/pine64/rockpro64_rk3399/Makefile
create mode 100644 board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
create mode 100644 include/configs/rockpro64_rk3399.h
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig
b/arch/arm/mach-rockchip/rk3399/Kconfig
index 6660d05349..db67440c11 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -62,6 +62,25 @@ config TARGET_CHROMEBOOK_BOB
display. It includes a Chrome OS EC (Cortex-M3) to provide access to
the keyboard and battery functions.
+config TARGET_ROCKPRO64_RK3399
+ bool "Pine64 Rockpro64 board"
+ help
+ Rockro64 is SBC produced by Pine64. Key features:
+
+ * Rockchip RK3399
+ * 2/4GB Dual-Channel LPDDR3
+ * SD card slot
+ * eMMC socket
+ * 128Mb SPI Flash
+ * Gigabit ethernet
+ * PCIe 4X slot
+ * WiFI/BT module socket
+ * HDMI In/Out, DP, MIPI DSI/CSI, eDP
+ * USB 3.0, 2.0
+ * USB Type C power and data
+ * GPIO expansion ports
+ * DC 12V/2A
+
endchoice
config ROCKCHIP_BOOT_MODE_REG
@@ -95,5 +114,6 @@ source "board/rockchip/evb_rk3399/Kconfig"
source "board/theobroma-systems/puma_rk3399/Kconfig"
source "board/vamrs/rock960_rk3399/Kconfig"
source "board/google/gru/Kconfig"
+source "board/pine64/rockpro64_rk3399/Kconfig"
endif
diff --git a/board/pine64/rockpro64_rk3399/Kconfig
b/board/pine64/rockpro64_rk3399/Kconfig
new file mode 100644
index 00..3353f1fd09
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCKPRO64_RK3399
+
+config SYS_BOARD
+ default "rockpro64_rk3399"
+
+config SYS_VENDOR
+ default "pine64"
+
+config SYS_CONFIG_NAME
+ default "rockpro64_rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS
b/board/pine64/rockpro64_rk3399/MAINTAINERS
new file mode 100644
index 00..303db144aa
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+ROCKPRO64
+M: Akash Gajjar
+M: Jagan Teki
+S: Maintained
+F: board/pine64/rockpro64_rk3399
+F: include/configs/rockpro64_rk3399.h
+F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+F: configs/rockpro64-rk3399_defconfig
diff --git a/board/pine64/rockpro64_rk3399/Makefile
b/board/pine64/rockpro64_rk3399/Makefile
new file mode 100644
index 00..b015c47e6f
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2019 Vasily Khoruzhick
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += rockpro64-rk3399.o
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
new file mode 100644
index 00..3f60235771
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Vasily Khoruzhick
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define GRF_IO_VSEL_BT565_SHIFT 0
+#define PMUGRF_CON0_VSEL_SHIFT 8
+
+#ifdef CONFIG_MISC_INIT_R
+static void setup_iodomain(void)
+{
+ struct rk3399_grf_regs *grf =
+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ struct rk3399_pmugrf_regs *pmugrf =
+ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+ /* BT565 is in 1.8v domain */
+ rk_setreg(>io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
+
+ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
+ rk_setreg(>soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
+}
+
+int misc_init_r(void)
+{
+ const u32 cpuid_offset = 0x7;
+ const u32 cpuid_length = 0x10;
+ u8 cpuid[cpuid_length];
+ int ret;
+
+ setup_iodomain();
+
+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length,
Re: [U-Boot] [PATCH] rockchip: rk3399: split rockpro64 out of evb_rk3399
On Sat, Nov 9, 2019 at 12:41 AM Vasily Khoruzhick wrote:
>
> rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
> Since we currently don't have a driver to do that, split it into its own
> board file and initialize I/O domains here.
Please discard this patch, I forgot to git add one file. Will send v2 shortly.
> Signed-off-by: Vasily Khoruzhick
> ---
> arch/arm/mach-rockchip/rk3399/Kconfig | 20 +++
> board/pine64/rockpro64_rk3399/Kconfig | 15 +
> board/pine64/rockpro64_rk3399/MAINTAINERS | 8 +++
> board/pine64/rockpro64_rk3399/Makefile| 7 +++
> .../rockpro64_rk3399/rockpro64-rk3399.c | 55 +++
> board/rockchip/evb_rk3399/MAINTAINERS | 7 ---
> configs/rockpro64-rk3399_defconfig| 1 +
> 7 files changed, 106 insertions(+), 7 deletions(-)
> create mode 100644 board/pine64/rockpro64_rk3399/Kconfig
> create mode 100644 board/pine64/rockpro64_rk3399/MAINTAINERS
> create mode 100644 board/pine64/rockpro64_rk3399/Makefile
> create mode 100644 board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
>
> diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig
> b/arch/arm/mach-rockchip/rk3399/Kconfig
> index 6660d05349..db67440c11 100644
> --- a/arch/arm/mach-rockchip/rk3399/Kconfig
> +++ b/arch/arm/mach-rockchip/rk3399/Kconfig
> @@ -62,6 +62,25 @@ config TARGET_CHROMEBOOK_BOB
> display. It includes a Chrome OS EC (Cortex-M3) to provide access to
> the keyboard and battery functions.
>
> +config TARGET_ROCKPRO64_RK3399
> + bool "Pine64 Rockpro64 board"
> + help
> + Rockro64 is SBC produced by Pine64. Key features:
> +
> + * Rockchip RK3399
> + * 2/4GB Dual-Channel LPDDR3
> + * SD card slot
> + * eMMC socket
> + * 128Mb SPI Flash
> + * Gigabit ethernet
> + * PCIe 4X slot
> + * WiFI/BT module socket
> + * HDMI In/Out, DP, MIPI DSI/CSI, eDP
> + * USB 3.0, 2.0
> + * USB Type C power and data
> + * GPIO expansion ports
> + * DC 12V/2A
> +
> endchoice
>
> config ROCKCHIP_BOOT_MODE_REG
> @@ -95,5 +114,6 @@ source "board/rockchip/evb_rk3399/Kconfig"
> source "board/theobroma-systems/puma_rk3399/Kconfig"
> source "board/vamrs/rock960_rk3399/Kconfig"
> source "board/google/gru/Kconfig"
> +source "board/pine64/rockpro64_rk3399/Kconfig"
>
> endif
> diff --git a/board/pine64/rockpro64_rk3399/Kconfig
> b/board/pine64/rockpro64_rk3399/Kconfig
> new file mode 100644
> index 00..3353f1fd09
> --- /dev/null
> +++ b/board/pine64/rockpro64_rk3399/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_ROCKPRO64_RK3399
> +
> +config SYS_BOARD
> + default "rockpro64_rk3399"
> +
> +config SYS_VENDOR
> + default "pine64"
> +
> +config SYS_CONFIG_NAME
> + default "rockpro64_rk3399"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> + def_bool y
> +
> +endif
> diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS
> b/board/pine64/rockpro64_rk3399/MAINTAINERS
> new file mode 100644
> index 00..303db144aa
> --- /dev/null
> +++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
> @@ -0,0 +1,8 @@
> +ROCKPRO64
> +M: Akash Gajjar
> +M: Jagan Teki
> +S: Maintained
> +F: board/pine64/rockpro64_rk3399
> +F: include/configs/rockpro64_rk3399.h
> +F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
> +F: configs/rockpro64-rk3399_defconfig
> diff --git a/board/pine64/rockpro64_rk3399/Makefile
> b/board/pine64/rockpro64_rk3399/Makefile
> new file mode 100644
> index 00..b015c47e6f
> --- /dev/null
> +++ b/board/pine64/rockpro64_rk3399/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# (C) Copyright 2019 Vasily Khoruzhick
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y += rockpro64-rk3399.o
> diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
> b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
> new file mode 100644
> index 00..3f60235771
> --- /dev/null
> +++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
> @@ -0,0 +1,55 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2019 Vasily Khoruzhick
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define GRF_IO_VSEL_BT565_SHIFT 0
> +#define PMUGRF_CON0_VSEL_SHIFT 8
> +
> +#ifdef CONFIG_MISC_INIT_R
> +static void setup_iodomain(void)
> +{
> + struct rk3399_grf_regs *grf =
> +
Re: [U-Boot] USB doesn't work on Rockpro64 in u-boot
On Thu, Nov 7, 2019 at 10:33 PM Jagan Teki wrote: > > Hi Vasily, > > On Fri, Nov 8, 2019 at 9:18 AM Vasily Khoruzhick wrote: > > > > I checked voltage on regulator enable pin and it's 1.5v in u-boot (and it's > > not enough to enable regulator!) and in linux it's 3v. That's why USB > > ports have no power in u-boot. > > > > Looks like u-boot doesn't switch GPIO voltage from 1.8v to 3.3v. Any > > ideas how to fix this? > > I think I need to clock look of this, will look into it next week. I'm > travelling till that time. I figured it out, rockpro64 needs I/O domains to be configured in order for USB to work. See "rockchip: rk3399: split rockpro64 out of evb_rk3399" patch on ML. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] rockchip: rk3399: split rockpro64 out of evb_rk3399
rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.
Signed-off-by: Vasily Khoruzhick
---
arch/arm/mach-rockchip/rk3399/Kconfig | 20 +++
board/pine64/rockpro64_rk3399/Kconfig | 15 +
board/pine64/rockpro64_rk3399/MAINTAINERS | 8 +++
board/pine64/rockpro64_rk3399/Makefile| 7 +++
.../rockpro64_rk3399/rockpro64-rk3399.c | 55 +++
board/rockchip/evb_rk3399/MAINTAINERS | 7 ---
configs/rockpro64-rk3399_defconfig| 1 +
7 files changed, 106 insertions(+), 7 deletions(-)
create mode 100644 board/pine64/rockpro64_rk3399/Kconfig
create mode 100644 board/pine64/rockpro64_rk3399/MAINTAINERS
create mode 100644 board/pine64/rockpro64_rk3399/Makefile
create mode 100644 board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig
b/arch/arm/mach-rockchip/rk3399/Kconfig
index 6660d05349..db67440c11 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -62,6 +62,25 @@ config TARGET_CHROMEBOOK_BOB
display. It includes a Chrome OS EC (Cortex-M3) to provide access to
the keyboard and battery functions.
+config TARGET_ROCKPRO64_RK3399
+ bool "Pine64 Rockpro64 board"
+ help
+ Rockro64 is SBC produced by Pine64. Key features:
+
+ * Rockchip RK3399
+ * 2/4GB Dual-Channel LPDDR3
+ * SD card slot
+ * eMMC socket
+ * 128Mb SPI Flash
+ * Gigabit ethernet
+ * PCIe 4X slot
+ * WiFI/BT module socket
+ * HDMI In/Out, DP, MIPI DSI/CSI, eDP
+ * USB 3.0, 2.0
+ * USB Type C power and data
+ * GPIO expansion ports
+ * DC 12V/2A
+
endchoice
config ROCKCHIP_BOOT_MODE_REG
@@ -95,5 +114,6 @@ source "board/rockchip/evb_rk3399/Kconfig"
source "board/theobroma-systems/puma_rk3399/Kconfig"
source "board/vamrs/rock960_rk3399/Kconfig"
source "board/google/gru/Kconfig"
+source "board/pine64/rockpro64_rk3399/Kconfig"
endif
diff --git a/board/pine64/rockpro64_rk3399/Kconfig
b/board/pine64/rockpro64_rk3399/Kconfig
new file mode 100644
index 00..3353f1fd09
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCKPRO64_RK3399
+
+config SYS_BOARD
+ default "rockpro64_rk3399"
+
+config SYS_VENDOR
+ default "pine64"
+
+config SYS_CONFIG_NAME
+ default "rockpro64_rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS
b/board/pine64/rockpro64_rk3399/MAINTAINERS
new file mode 100644
index 00..303db144aa
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+ROCKPRO64
+M: Akash Gajjar
+M: Jagan Teki
+S: Maintained
+F: board/pine64/rockpro64_rk3399
+F: include/configs/rockpro64_rk3399.h
+F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+F: configs/rockpro64-rk3399_defconfig
diff --git a/board/pine64/rockpro64_rk3399/Makefile
b/board/pine64/rockpro64_rk3399/Makefile
new file mode 100644
index 00..b015c47e6f
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2019 Vasily Khoruzhick
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += rockpro64-rk3399.o
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
new file mode 100644
index 00..3f60235771
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Vasily Khoruzhick
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define GRF_IO_VSEL_BT565_SHIFT 0
+#define PMUGRF_CON0_VSEL_SHIFT 8
+
+#ifdef CONFIG_MISC_INIT_R
+static void setup_iodomain(void)
+{
+ struct rk3399_grf_regs *grf =
+ syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ struct rk3399_pmugrf_regs *pmugrf =
+ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+ /* BT565 is in 1.8v domain */
+ rk_setreg(>io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
+
+ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
+ rk_setreg(>soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
+}
+
+int misc_init_r(void)
+{
+ const u32 cpuid_offset = 0x7;
+ const u32 cpuid_length = 0x10;
+ u8 cpuid[cpuid_length];
+ int ret;
+
+ setup_iodomain();
+
+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
+ if (ret)
+ return ret;
+
+ ret = rockchip_cpuid_set(cpuid, cpuid_length);
+ if (ret)
+ return ret;
+
+
Re: [U-Boot] USB doesn't work on Rockpro64 in u-boot
I checked voltage on regulator enable pin and it's 1.5v in u-boot (and it's not enough to enable regulator!) and in linux it's 3v. That's why USB ports have no power in u-boot. Looks like u-boot doesn't switch GPIO voltage from 1.8v to 3.3v. Any ideas how to fix this? On Wed, Nov 6, 2019 at 11:28 PM Vasily Khoruzhick wrote: > > On Wed, Nov 6, 2019 at 7:48 PM Vasily Khoruzhick wrote: > > > > On Wed, Nov 6, 2019 at 8:50 AM Jagan Teki > > wrote: > > > > > > Hi Vasily, > > > > > > On Wed, Nov 6, 2019 at 9:17 AM Vasily Khoruzhick > > > wrote: > > > > > > > > Hi Akash, Jagan, > > > > > > > > Looks like USB is not functional in u-boot on Rockpro64. u-boot is > > > > from git, commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0. > > > > > > > > I'm using u-boot SPL and mainline ATF > > > > (19adcb415c313d656324d54e7608cdc7d7a5c414 is ATF commit) > > > > > > > > 'usb start' doesn't detect anything but hubs and looks like there's no > > > > power on USB ports: > > > > > > > > => usb start > > > > starting USB... > > > > Bus usb@fe38: USB EHCI 1.00 > > > > Bus usb@fe3c: USB EHCI 1.00 > > > > Bus dwc3: Register 2000140 NbrPorts 2 > > > > Starting the controller > > > > USB XHCI 1.10 > > > > Bus dwc3: Register 2000140 NbrPorts 2 > > > > Starting the controller > > > > USB XHCI 1.10 > > > > scanning bus usb@fe38 for devices... 1 USB Device(s) found > > > > scanning bus usb@fe3c for devices... 1 USB Device(s) found > > > > scanning bus dwc3 for devices... 1 USB Device(s) found > > > > scanning bus dwc3 for devices... 1 USB Device(s) found > > > >scanning usb for storage devices... 0 Storage Device(s) found > > > > > > > > => usb tree > > > > USB device tree: > > > > 1 Hub (480 Mb/s, 0mA) > > > > u-boot EHCI Host Controller > > > > > > > > 1 Hub (480 Mb/s, 0mA) > > > > u-boot EHCI Host Controller > > > > > > > > 1 Hub (5 Gb/s, 0mA) > > > > U-Boot XHCI Host Controller > > > > > > > > 1 Hub (5 Gb/s, 0mA) > > > > U-Boot XHCI Host Controller > > > > > > > > Regulators were probed correctly according to 'dm tree': > > > > > > > > regulator14 [ + ] fixed regulator |-- vcc12v-dcin > > > > regulator15 [ + ] fixed regulator |-- vcc1v8-s3 > > > > regulator16 [ + ] fixed regulator |-- > > > > vcc3v3-pcie-regulator > > > > regulator17 [ + ] fixed regulator |-- vcc3v3-sys > > > > regulator18 [ + ] fixed regulator |-- > > > > vcc5v0-host-regulator > > > > regulator19 [ + ] fixed regulator |-- > > > > vcc5v0-typec-regulator > > > > regulator20 [ + ] fixed regulator |-- vcc5v0-sys > > > > regulator21 [ + ] fixed regulator |-- vcc5v0-usb > > > > regulator22 [ + ] pwm_regulator `-- vdd-log > > > > > > > > Any ideas what can be wrong? Have it worked before? > > > > > > I remember my last checking, give me sometime will check it on master > > > and update you. > > > > Looks like gpio clock is not enabled anywhere in u-boot for rk3399, so > > gpios just don't work. > > I was wrong about clock, it appears that set bin in CRU is disabled > clock. Yet GPIOs don't work in u-boot, e.g. > > => gpio set 154 > gpio: pin 154 (gpio 154) value is 1 >Warning: value of pin is still 0 > > 154 is vcc5v0-host-regulator.gpio. > > > rk3399 clock driver is very rudimentary and doesn't touch clock gates at > > all. > > > > Can anyone explain how it's supposed to work? > > > > > > > > Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] arm: dts: rk3399-rockpro64: sync dts from linux kernel
On Thu, Nov 7, 2019 at 12:26 PM Soeren Moch wrote:
>
> On 07.11.19 21:04, Vasily Khoruzhick wrote:
> > On Thu, Nov 7, 2019 at 3:11 AM Soeren Moch wrote:
> >> The most important change for u-boot is the fix for the vdd-log pwm
> >> voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
> > I don't see any changes to vdd-log regulator in this patch that can
> > help avoiding overvoltage. It just bumps regulator-max-microvolt to
> > 170.
> The duty-cycle of this pwm regulator is calculated from the min and max
> values. And with a max value that is set too low for the actual
> circuitry, a wrong duty-cycle is calculated that results in a higher
> voltage that what is set in regulator-init-microvolt.
> I measured the voltage on the board, with the original setting it was
> far above the allowed 1.0V, this patch fixes this, also see [1].
Thanks for explanation!
> Regards,
> Soeren
>
> [1] https://patchwork.kernel.org/patch/11173465/
> >
> >> Signed-off-by: Soeren Moch
> >> ---
> >> Cc: Kever Yang
> >> Cc: u-boot@lists.denx.de
> >> ---
> >> arch/arm/dts/rk3399-rockpro64.dts | 57 ++-
> >> 1 file changed, 49 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/arch/arm/dts/rk3399-rockpro64.dts
> >> b/arch/arm/dts/rk3399-rockpro64.dts
> >> index 1f2394e058..e544deb61d 100644
> >> --- a/arch/arm/dts/rk3399-rockpro64.dts
> >> +++ b/arch/arm/dts/rk3399-rockpro64.dts
> >> @@ -58,6 +58,13 @@
> >> };
> >> };
> >>
> >> + fan: pwm-fan {
> >> + compatible = "pwm-fan";
> >> + #cooling-cells = <2>;
> >> + fan-supply = <_dcin>;
> >> + pwms = < 0 5 0>;
> >> + };
> >> +
> >> sdio_pwrseq: sdio-pwrseq {
> >> compatible = "mmc-pwrseq-simple";
> >> clocks = < 1>;
> >> @@ -166,7 +173,7 @@
> >> regulator-always-on;
> >> regulator-boot-on;
> >> regulator-min-microvolt = <80>;
> >> - regulator-max-microvolt = <140>;
> >> + regulator-max-microvolt = <170>;
> >> vin-supply = <_sys>;
> >> };
> >> };
> >> @@ -222,6 +229,10 @@
> >> status = "okay";
> >> };
> >>
> >> +_sound {
> >> + status = "okay";
> >> +};
> >> +
> >> {
> >> mali-supply = <_gpu>;
> >> status = "okay";
> >> @@ -236,8 +247,8 @@
> >> rk808: pmic@1b {
> >> compatible = "rockchip,rk808";
> >> reg = <0x1b>;
> >> - interrupt-parent = <>;
> >> - interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
> >> + interrupt-parent = <>;
> >> + interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
> >> #clock-cells = <1>;
> >> clock-output-names = "xin32k", "rk808-clkout2";
> >> pinctrl-names = "default";
> >> @@ -504,11 +515,25 @@
> >> status = "okay";
> >>
> >> bt656-supply = <_dvp>;
> >> - audio-supply = <_codec>;
> >> + audio-supply = <_3v0>;
> >> sdmmc-supply = <_sdio>;
> >> gpio1830-supply = <_3v0>;
> >> };
> >>
> >> + {
> >> + ep-gpios = < RK_PD4 GPIO_ACTIVE_HIGH>;
> >> + num-lanes = <4>;
> >> + pinctrl-names = "default";
> >> + pinctrl-0 = <_perst>;
> >> + vpcie12v-supply = <_dcin>;
> >> + vpcie3v3-supply = <_pcie>;
> >> + status = "okay";
> >> +};
> >> +
> >> +_phy {
> >> + status = "okay";
> >> +};
> >> +
> >> _io_domains {
> >> pmu1830-supply = <_3v0>;
> >> status = "okay";
> >> @@ -538,6 +563,10 @@
> >> };
> >>
> >> pcie {
> >> + pcie_perst: pcie-perst {
> >> + rockchip,pins = <2 RK_PD4 RK_FUN
Re: [U-Boot] [PATCH 1/2] arm: dts: rk3399-rockpro64: sync dts from linux kernel
On Thu, Nov 7, 2019 at 3:11 AM Soeren Moch wrote:
>
> The most important change for u-boot is the fix for the vdd-log pwm
> voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
I don't see any changes to vdd-log regulator in this patch that can
help avoiding overvoltage. It just bumps regulator-max-microvolt to
170.
> Signed-off-by: Soeren Moch
> ---
> Cc: Kever Yang
> Cc: u-boot@lists.denx.de
> ---
> arch/arm/dts/rk3399-rockpro64.dts | 57 ++-
> 1 file changed, 49 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/dts/rk3399-rockpro64.dts
> b/arch/arm/dts/rk3399-rockpro64.dts
> index 1f2394e058..e544deb61d 100644
> --- a/arch/arm/dts/rk3399-rockpro64.dts
> +++ b/arch/arm/dts/rk3399-rockpro64.dts
> @@ -58,6 +58,13 @@
> };
> };
>
> + fan: pwm-fan {
> + compatible = "pwm-fan";
> + #cooling-cells = <2>;
> + fan-supply = <_dcin>;
> + pwms = < 0 5 0>;
> + };
> +
> sdio_pwrseq: sdio-pwrseq {
> compatible = "mmc-pwrseq-simple";
> clocks = < 1>;
> @@ -166,7 +173,7 @@
> regulator-always-on;
> regulator-boot-on;
> regulator-min-microvolt = <80>;
> - regulator-max-microvolt = <140>;
> + regulator-max-microvolt = <170>;
> vin-supply = <_sys>;
> };
> };
> @@ -222,6 +229,10 @@
> status = "okay";
> };
>
> +_sound {
> + status = "okay";
> +};
> +
> {
> mali-supply = <_gpu>;
> status = "okay";
> @@ -236,8 +247,8 @@
> rk808: pmic@1b {
> compatible = "rockchip,rk808";
> reg = <0x1b>;
> - interrupt-parent = <>;
> - interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-parent = <>;
> + interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
> #clock-cells = <1>;
> clock-output-names = "xin32k", "rk808-clkout2";
> pinctrl-names = "default";
> @@ -504,11 +515,25 @@
> status = "okay";
>
> bt656-supply = <_dvp>;
> - audio-supply = <_codec>;
> + audio-supply = <_3v0>;
> sdmmc-supply = <_sdio>;
> gpio1830-supply = <_3v0>;
> };
>
> + {
> + ep-gpios = < RK_PD4 GPIO_ACTIVE_HIGH>;
> + num-lanes = <4>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_perst>;
> + vpcie12v-supply = <_dcin>;
> + vpcie3v3-supply = <_pcie>;
> + status = "okay";
> +};
> +
> +_phy {
> + status = "okay";
> +};
> +
> _io_domains {
> pmu1830-supply = <_3v0>;
> status = "okay";
> @@ -538,6 +563,10 @@
> };
>
> pcie {
> + pcie_perst: pcie-perst {
> + rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO
> _pull_none>;
> + };
> +
> pcie_pwr_en: pcie-pwr-en {
> rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO
> _pull_none>;
> };
> @@ -545,7 +574,7 @@
>
> pmic {
> pmic_int_l: pmic-int-l {
> - rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO _pull_up>;
> + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO _pull_up>;
> };
>
> vsel1_gpio: vsel1-gpio {
> @@ -580,6 +609,10 @@
> status = "okay";
> };
>
> + {
> + status = "okay";
> +};
> +
> {
> status = "okay";
> };
> @@ -591,7 +624,6 @@
>
> {
> bus-width = <4>;
> - cap-mmc-highspeed;
> cap-sd-highspeed;
> cd-gpios = < 7 GPIO_ACTIVE_LOW>;
> disable-wp;
> @@ -603,12 +635,21 @@
>
> {
> bus-width = <8>;
> - mmc-hs400-1_8v;
> - mmc-hs400-enhanced-strobe;
> + mmc-hs200-1_8v;
> non-removable;
> status = "okay";
> };
>
> + {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1000>;
> + };
> +};
> +
> {
> status = "okay";
> };
> --
> 2.17.1
>
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Re: [U-Boot] USB doesn't work on Rockpro64 in u-boot
On Wed, Nov 6, 2019 at 7:48 PM Vasily Khoruzhick wrote: > > On Wed, Nov 6, 2019 at 8:50 AM Jagan Teki wrote: > > > > Hi Vasily, > > > > On Wed, Nov 6, 2019 at 9:17 AM Vasily Khoruzhick wrote: > > > > > > Hi Akash, Jagan, > > > > > > Looks like USB is not functional in u-boot on Rockpro64. u-boot is > > > from git, commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0. > > > > > > I'm using u-boot SPL and mainline ATF > > > (19adcb415c313d656324d54e7608cdc7d7a5c414 is ATF commit) > > > > > > 'usb start' doesn't detect anything but hubs and looks like there's no > > > power on USB ports: > > > > > > => usb start > > > starting USB... > > > Bus usb@fe38: USB EHCI 1.00 > > > Bus usb@fe3c: USB EHCI 1.00 > > > Bus dwc3: Register 2000140 NbrPorts 2 > > > Starting the controller > > > USB XHCI 1.10 > > > Bus dwc3: Register 2000140 NbrPorts 2 > > > Starting the controller > > > USB XHCI 1.10 > > > scanning bus usb@fe38 for devices... 1 USB Device(s) found > > > scanning bus usb@fe3c for devices... 1 USB Device(s) found > > > scanning bus dwc3 for devices... 1 USB Device(s) found > > > scanning bus dwc3 for devices... 1 USB Device(s) found > > >scanning usb for storage devices... 0 Storage Device(s) found > > > > > > => usb tree > > > USB device tree: > > > 1 Hub (480 Mb/s, 0mA) > > > u-boot EHCI Host Controller > > > > > > 1 Hub (480 Mb/s, 0mA) > > > u-boot EHCI Host Controller > > > > > > 1 Hub (5 Gb/s, 0mA) > > > U-Boot XHCI Host Controller > > > > > > 1 Hub (5 Gb/s, 0mA) > > > U-Boot XHCI Host Controller > > > > > > Regulators were probed correctly according to 'dm tree': > > > > > > regulator14 [ + ] fixed regulator |-- vcc12v-dcin > > > regulator15 [ + ] fixed regulator |-- vcc1v8-s3 > > > regulator16 [ + ] fixed regulator |-- vcc3v3-pcie-regulator > > > regulator17 [ + ] fixed regulator |-- vcc3v3-sys > > > regulator18 [ + ] fixed regulator |-- vcc5v0-host-regulator > > > regulator19 [ + ] fixed regulator |-- vcc5v0-typec-regulator > > > regulator20 [ + ] fixed regulator |-- vcc5v0-sys > > > regulator21 [ + ] fixed regulator |-- vcc5v0-usb > > > regulator22 [ + ] pwm_regulator `-- vdd-log > > > > > > Any ideas what can be wrong? Have it worked before? > > > > I remember my last checking, give me sometime will check it on master > > and update you. > > Looks like gpio clock is not enabled anywhere in u-boot for rk3399, so > gpios just don't work. I was wrong about clock, it appears that set bin in CRU is disabled clock. Yet GPIOs don't work in u-boot, e.g. => gpio set 154 gpio: pin 154 (gpio 154) value is 1 Warning: value of pin is still 0 154 is vcc5v0-host-regulator.gpio. > rk3399 clock driver is very rudimentary and doesn't touch clock gates at all. > > Can anyone explain how it's supposed to work? > > > > > Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] USB doesn't work on Rockpro64 in u-boot
On Wed, Nov 6, 2019 at 8:50 AM Jagan Teki wrote: > > Hi Vasily, > > On Wed, Nov 6, 2019 at 9:17 AM Vasily Khoruzhick wrote: > > > > Hi Akash, Jagan, > > > > Looks like USB is not functional in u-boot on Rockpro64. u-boot is > > from git, commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0. > > > > I'm using u-boot SPL and mainline ATF > > (19adcb415c313d656324d54e7608cdc7d7a5c414 is ATF commit) > > > > 'usb start' doesn't detect anything but hubs and looks like there's no > > power on USB ports: > > > > => usb start > > starting USB... > > Bus usb@fe38: USB EHCI 1.00 > > Bus usb@fe3c: USB EHCI 1.00 > > Bus dwc3: Register 2000140 NbrPorts 2 > > Starting the controller > > USB XHCI 1.10 > > Bus dwc3: Register 2000140 NbrPorts 2 > > Starting the controller > > USB XHCI 1.10 > > scanning bus usb@fe38 for devices... 1 USB Device(s) found > > scanning bus usb@fe3c for devices... 1 USB Device(s) found > > scanning bus dwc3 for devices... 1 USB Device(s) found > > scanning bus dwc3 for devices... 1 USB Device(s) found > >scanning usb for storage devices... 0 Storage Device(s) found > > > > => usb tree > > USB device tree: > > 1 Hub (480 Mb/s, 0mA) > > u-boot EHCI Host Controller > > > > 1 Hub (480 Mb/s, 0mA) > > u-boot EHCI Host Controller > > > > 1 Hub (5 Gb/s, 0mA) > > U-Boot XHCI Host Controller > > > > 1 Hub (5 Gb/s, 0mA) > > U-Boot XHCI Host Controller > > > > Regulators were probed correctly according to 'dm tree': > > > > regulator14 [ + ] fixed regulator |-- vcc12v-dcin > > regulator15 [ + ] fixed regulator |-- vcc1v8-s3 > > regulator16 [ + ] fixed regulator |-- vcc3v3-pcie-regulator > > regulator17 [ + ] fixed regulator |-- vcc3v3-sys > > regulator18 [ + ] fixed regulator |-- vcc5v0-host-regulator > > regulator19 [ + ] fixed regulator |-- vcc5v0-typec-regulator > > regulator20 [ + ] fixed regulator |-- vcc5v0-sys > > regulator21 [ + ] fixed regulator |-- vcc5v0-usb > > regulator22 [ + ] pwm_regulator `-- vdd-log > > > > Any ideas what can be wrong? Have it worked before? > > I remember my last checking, give me sometime will check it on master > and update you. Looks like gpio clock is not enabled anywhere in u-boot for rk3399, so gpios just don't work. rk3399 clock driver is very rudimentary and doesn't touch clock gates at all. Can anyone explain how it's supposed to work? > > Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] USB doesn't work on Rockpro64 in u-boot
Hi Akash, Jagan, Looks like USB is not functional in u-boot on Rockpro64. u-boot is from git, commit 680023c5fab6b1777c0c6f2e76e5d2effb7903a0. I'm using u-boot SPL and mainline ATF (19adcb415c313d656324d54e7608cdc7d7a5c414 is ATF commit) 'usb start' doesn't detect anything but hubs and looks like there's no power on USB ports: => usb start starting USB... Bus usb@fe38: USB EHCI 1.00 Bus usb@fe3c: USB EHCI 1.00 Bus dwc3: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus dwc3: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe38 for devices... 1 USB Device(s) found scanning bus usb@fe3c for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller Regulators were probed correctly according to 'dm tree': regulator14 [ + ] fixed regulator |-- vcc12v-dcin regulator15 [ + ] fixed regulator |-- vcc1v8-s3 regulator16 [ + ] fixed regulator |-- vcc3v3-pcie-regulator regulator17 [ + ] fixed regulator |-- vcc3v3-sys regulator18 [ + ] fixed regulator |-- vcc5v0-host-regulator regulator19 [ + ] fixed regulator |-- vcc5v0-typec-regulator regulator20 [ + ] fixed regulator |-- vcc5v0-sys regulator21 [ + ] fixed regulator |-- vcc5v0-usb regulator22 [ + ] pwm_regulator `-- vdd-log Any ideas what can be wrong? Have it worked before? Regards, Vasily ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] configs: sopine-baseboard: Enable SPI-FLASH
On Wed, Oct 16, 2019 at 9:23 AM Jagan Teki wrote:
>
> SoPine has winbond SPI-FLASH, so enable the same in defconfig
> and add aliases for spi0 in -u-boot.dtsi
>
> Signed-off-by: Jagan Teki
> ---
> Changes for v3:
> - none
>
> arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi | 12
> configs/sopine_baseboard_defconfig | 1 +
> 2 files changed, 13 insertions(+)
> create mode 100644 arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi
>
> diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi
> b/arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi
> new file mode 100644
> index 00..02b1ae046e
> --- /dev/null
> +++ b/arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi
> @@ -0,0 +1,12 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Jagan Teki
> + */
> +
> +#include "sunxi-u-boot.dtsi"
> +
> +/ {
> + aliases {
> + spi0 =
> + };
> +};
> diff --git a/configs/sopine_baseboard_defconfig
> b/configs/sopine_baseboard_defconfig
> index 5833234b63..c9123fd7ee 100644
> --- a/configs/sopine_baseboard_defconfig
> +++ b/configs/sopine_baseboard_defconfig
> @@ -10,6 +10,7 @@ CONFIG_DRAM_ZQ=3881949
> CONFIG_MMC0_CD_PIN=""
> CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> CONFIG_SPL_SPI_SUNXI=y
> +CONFIG_SPI_FLASH_WINBOND=y
You also need to set CONFIG_SPI_FLASH since it's not set by default
and CONFIG_SPI_FLASH_WINBOND depends on CONFIG_SPI_FLASH.
> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> CONFIG_USE_PREBOOT=y
> CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
> --
> 2.18.0.321.gffc6fa0e3
>
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Re: [U-Boot] [PATCH v2 00/99] ram: rk3399: Add LPDDR4 support
On Mon, Jun 17, 2019 at 12:37 AM Jagan Teki wrote: > > This is the v2 set for supporting LPDDR4 with associated > features, wrt to previous series[1]. > > Thanks to > - YouMin Chen > - Akash Gajjar > - Kever Yang > for supporting all the help on this work. > > On summary this series support > - Code warning and fixes > - rank detection, this would required to probe single channel > sdram configured in NanoPI-NEO4 > - LPDDR4 support, tested in Rockpro64 and Rock-PI-4 > > Changes for v2: > - handle LPDDR4 code as part of CONFIG_RAM_RK3399_LPDDR4 > - support data_training and set_rate via sdram_rk3399_ops > - add proper sys_reg_enc macros > - add new patch to rename variable sdram_params with params > - fix few commit messages > > patch 0001 - 0034: fix code warnings, prints, new macros > > patch 0035 - 0052: rank detection, sdram debug code > > patch 0053: use DDR3-1800 on NanoPI-NEO4 > > patch 0054 - 0094: lpddr4 support > > patch 0095: enable lpddr4 in Rockpro64 > > patch 0096: enable lpddr4 in Rock-PI-4 > > patch 0097: LPDDR4-100 timings > > patch 0098: Use LPDDR4-100 on Rockpro64 > > patch 0099: Use LPDDR4-100 on Rock-PI 4 > > Size (increased to ~3KiB ): > - Puma RK3399 (u-boot-spl-dtb.bin): > before: 115644 after: 118744 > - NanoPI M4 (u-boot-tpl-dtb.bin) > before: 41873 after: 44909 > > Travis-CI: > https://travis-ci.org/openedev/u-boot-amarula/builds/546597944 > > Repo: > https://github.com/openedev/u-boot-amarula/tree/rk3399-lpddr4 > > [1] https://patchwork.ozlabs.org/cover/1113893/ > > Any inputs? Was it absolutely necessary to split these changes into 99 commits? I believe at least some of them can be squashed. Reviewing 99 patches isn't feasible. > Jagan. > > Jagan Teki (99): > ram: rk3399: Fix code warnings > ram: rk3399: Add space between string with format specifier > ram: rk3399: Add proper spaces in code > ram: rk3399: s/sdram_params/params > ram: rk3399: Handle data training return types > ram: rk3399: Order include files > ram: rk3399: Move macro after include files > ram: rk3399: Clear PI_175 interrupts in data training > ram: rk3399: Use rank mask in ca data training > ram: rk3399: Use rank mask in wdql data training > ram: rk3399: Add ddrtype enc macro > ram: rk3399: Add channel number encoder macro > ram: rk3399: Add row_3_4 enc macro > ram: rk3399: Add chipinfo macro > ram: rk3399: Add rank enc macro > ram: rk3399: Add column enc macro > ram: rk3399: Add bk enc macro > ram: rk3399: Add dbw enc macro > ram: rk3399: Add cs0_rw macro > ram: rk3399: Add cs1_rw macro > ram: rk3399: Add bw enc macro > ram: rk3399: Rename sys_reg with sys_reg2 > ram: rk3399: Update cs0_row to use sys_reg3 > ram: rk3399: Update cs1_row to use sys_reg3 > ram: rk3399: Add cs1_col enc macro > ram: rk3399: Add ddr version enc macro > ram: rk3399: Add ddrtimingC0 > ram: rk3399: Add DdrMode > ram: rk3399: Handle pctl_cfg return type > ram: rk3399: s/tsel_wr_select_n/tsel_wr_select_dq_n > ram: rk3399: s/tsel_wr_select_p/tsel_wr_select_dq_p > ram: rk3399: s/ca_tsel_wr_select_n/tsel_wr_select_ca_n > ram: rk3399: s/ca_tsel_wr_select_p/tsel_wr_select_ca_p > ram: rk3399: Order tsel variables > ram: rk3399: Add phy pctrl reset support > ram: rk3399: Move pwrup_srefresh_exit to dram_info > ram: rk3399: Add pctl start support > ram: rockchip: rk3399: Add cap_info structure > ram: rk3399: s/rk3399_base_params/sdram_base_params > ram: rk3399: Move common sdram structures in common header > arm: include: rockchip: Move dramtypes to common header > arm: include: rockchip: Add DDR4 enum > ram: rockchip: Add initial Kconfig > debug_uart: Add printdec > ram: rockchip: Add debug sdram driver > ram: rockchip: debug: Add sdram_print_ddr_info > ram: rockchip: debug: Get the cs capacity > ram: rk3399: debug: Add sdram_print_stride > ram: rk3399: Compute stride for 2 channels > ram: rk3399: Compute stride for 1 channel a > ram: rk3399: Add rank detection support > ram: rk3399: Enable sdram debug functions > rockchip: dts: rk3399: nanopi-neo4: Use DDR3-1866 dtsi > clk: rockchip: rk3399: Fix check patch warnings and checks > clk: rockchip: rk3399: Set 50MHz ddr clock > clk: rockchip: rk3399: Set 400MHz ddr clock > ram: rk3399: Add spaces in pctl_cfg > ram: rk3399: Configure phy IO in ds odt > ram: rockchip: Kconfig: Add RK3399 LPDDR4 entry > ram: rk3399: Add lpddr4 rank mask for ca training > ram: rk3399: Add lpddr4 rank mask for wdql training > ram: rk3399: Move mode_sel assignment > ram: rk3399: Don't wait for PLL lock in lpddr4 > ram: rk3399: Avoid two channel ZQ Cal Start at the same time > ram: rk3399: Configure PHY_898, PHY_919 for lpddr4 > ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4 > ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4 > ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4 > ram: rk3399: Map chipselect for lpddr4 > ram: rk3399: Configure tsel write ca for
Re: [U-Boot] [PATCHv3 01/10] arm: Remove zipitz2 board
On Wed, May 29, 2019 at 2:01 PM Tom Rini wrote:
>
> Per discussion on the list, drop this board again.
>
> Cc: Vasily Khoruzhick
> Signed-off-by: Tom Rini
Acked-by: Vasily Khoruzhick
Thanks for submitting this patch!
> ---
> arch/arm/Kconfig | 5 --
> board/zipitz2/Kconfig | 9 --
> board/zipitz2/MAINTAINERS | 6 --
> board/zipitz2/Makefile| 8 --
> board/zipitz2/zipitz2.c | 219
> --
> configs/zipitz2_defconfig | 34 ---
> include/configs/zipitz2.h | 186 ---
> 7 files changed, 467 deletions(-)
> delete mode 100644 board/zipitz2/Kconfig
> delete mode 100644 board/zipitz2/MAINTAINERS
> delete mode 100644 board/zipitz2/Makefile
> delete mode 100644 board/zipitz2/zipitz2.c
> delete mode 100644 configs/zipitz2_defconfig
> delete mode 100644 include/configs/zipitz2.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 01ff57cf1bec..0e82cf1583f7 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1410,10 +1410,6 @@ config TARGET_H2200
> bool "Support h2200"
> select CPU_PXA
>
> -config TARGET_ZIPITZ2
> - bool "Support zipitz2"
> - select CPU_PXA
> -
> config TARGET_COLIBRI_PXA270
> bool "Support colibri_pxa270"
> select CPU_PXA
> @@ -1727,7 +1723,6 @@ source "board/woodburn/Kconfig"
> source "board/xilinx/Kconfig"
> source "board/xilinx/zynq/Kconfig"
> source "board/xilinx/zynqmp/Kconfig"
> -source "board/zipitz2/Kconfig"
>
> source "arch/arm/Kconfig.debug"
>
> diff --git a/board/zipitz2/Kconfig b/board/zipitz2/Kconfig
> deleted file mode 100644
> index c6635040a37f..
> --- a/board/zipitz2/Kconfig
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -if TARGET_ZIPITZ2
> -
> -config SYS_BOARD
> - default "zipitz2"
> -
> -config SYS_CONFIG_NAME
> - default "zipitz2"
> -
> -endif
> diff --git a/board/zipitz2/MAINTAINERS b/board/zipitz2/MAINTAINERS
> deleted file mode 100644
> index e027cd361aae..
> --- a/board/zipitz2/MAINTAINERS
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -ZIPITZ2 BOARD
> -M: Vasily Khoruzhick
> -S: Maintained
> -F: board/zipitz2/
> -F: include/configs/zipitz2.h
> -F: configs/zipitz2_defconfig
> diff --git a/board/zipitz2/Makefile b/board/zipitz2/Makefile
> deleted file mode 100644
> index 2bbe4364e8f7..
> --- a/board/zipitz2/Makefile
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -# Copyright (C) 2009
> -# Marek Vasut
> -#
> -# Heavily based on pxa255_idp platform
> -
> -obj-y := zipitz2.o
> diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c
> deleted file mode 100644
> index 9208c882c272..
> --- a/board/zipitz2/zipitz2.c
> +++ /dev/null
> @@ -1,219 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Copyright (C) 2009
> - * Marek Vasut
> - *
> - * Heavily based on pxa255_idp platform
> - */
> -
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -
> -DECLARE_GLOBAL_DATA_PTR;
> -
> -#ifdef CONFIG_CMD_SPI
> -void lcd_start(void);
> -#else
> -inline void lcd_start(void) {};
> -#endif
> -
> -/*
> - * Miscelaneous platform dependent initialisations
> - */
> -int board_init(void)
> -{
> - /* arch number of Z2 */
> - gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
> -
> - /* adress of boot parameters */
> - gd->bd->bi_boot_params = 0xa100;
> -
> - /* Enable LCD */
> - lcd_start();
> -
> - return 0;
> -}
> -
> -int dram_init(void)
> -{
> - pxa2xx_dram_init();
> - gd->ram_size = PHYS_SDRAM_1_SIZE;
> - return 0;
> -}
> -
> -#ifdef CONFIG_CMD_USB
> -int board_usb_init(int index, enum usb_init_type init)
> -{
> - /* enable port 2 */
> - writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
> - UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
> -
> - return 0;
> -}
> -
> -int board_usb_cleanup(int index, enum usb_init_type init)
> -{
> - return 0;
> -}
> -
> -void usb_board_stop(void)
> -{
> -}
> -#endif
> -
> -int dram_init_banksize(void)
> -{
> - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> -
> - return 0;
> -}
> -
> -#ifdef
Re: [U-Boot] [linux-sunxi] [PATCH 0/2] sunxi: A64: enable first USB port on Pine64 boards
On Wed, May 15, 2019 at 5:46 PM Andre Przywara wrote: > > Since the beginning the upper USB port on Pine64 boards (Pine64+, SoPine > baseboard, Pine64-LTS, Pinebook) was not working under U-Boot. > This is due to the PHY for those pins being shared with the OTG > controller, which we didn't even enable for those boards. Also the PHY > code was always connecting the port pins to the OTG controller. > > These two patches fix this, so the upper USB port on said boards can > be used within U-Boot. This allows to use an USB keyboard alongside > an USB flash drive, for instance to install operating systems using > UEFI. Can you also add Pinebook here? It has the same issue. > Cheers, > Andre. > > Andre Przywara (2): > sunxi: USB PHY: Support shared PHY 0 > sunxi: Pine64: DTS: enable USB PHY 0 for HCI0 > > arch/arm/dts/sun50i-a64-pine64.dts | 5 - > arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 5 - > drivers/phy/allwinner/phy-sun4i-usb.c| 8 +++- > 3 files changed, 15 insertions(+), 3 deletions(-) > > -- > 2.14.5 > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to linux-sunxi+unsubscr...@googlegroups.com. > To view this discussion on the web, visit > https://groups.google.com/d/msgid/linux-sunxi/20190516004609.25304-1-andre.przywara%40arm.com. > For more options, visit https://groups.google.com/d/optout. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] U-Boot PXA support
On Thu, May 9, 2019 at 7:56 AM Marek Vasut wrote:
>
> On 5/9/19 4:02 PM, Tom Rini wrote:
> > On Mon, May 06, 2019 at 09:26:04AM -0400, Tom Rini wrote:
> >
> >> Hey folks,
> >>
> >> I'm attempting, again, to see what we need to do in order to use gcc-8.x
> >> for U-Boot and ran into, again:
> >> https://patchwork.ozlabs.org/patch/920329/ which in short is that when
> >> using -mcpu=xscale gcc-8.x throws an odd error:
> >> cc1: error: switch -mcpu=xscale conflicts with -march=armv5te switch
> >> [-Werror]
> >>
> >> Now note, U-Boot isn't passing -march= at all, just -mcpu=xscale which
> >> suggests perhaps something broke in upstream gcc. Looking at the
> >> kernel, it's not used -mcpu=xscale ever, just -mtune=xscale but that
> >> leads to different failures (seen here with gcc-7.3):
> >> CC drivers/usb/gadget/pxa25x_udc.o
> >> {standard input}: Assembler messages:
> >> {standard input}:779: Error: selected processor does not support `pld
> >> [lr]' in ARM mode
> >> {standard input}:1201: Error: selected processor does not support `pld
> >> [r7]' in ARM mode
> >> {standard input}:2519: Error: selected processor does not support `pld
> >> [r3]' in ARM mode
> >> {standard input}:2796: Error: selected processor does not support `pld
> >> [r3]' in ARM mode
> >>
> >> So, what should we do about this? Is there still active interest in
> >> supporting the PXA platforms? Thanks folks!
> >
> > ping? Thanks!
>
> Maybe we should just remove it.
+1, almost no one uses it nowadays.
> --
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH] sunxi: A64: pinebook-u-boot: Include sunxi-u-boot.dtsi
On Fri, Jan 25, 2019 at 12:47 AM Jagan Teki wrote:
>
> Like other Allwinner A64 boards, pinebook also need altering
> auto-numbering of mmc2 to mmc1 which is available in common
> sunxi dsti file, sunxi-u-boot.dtsi
>
> Pinebook has a separate sun50i-a64-pinebook-u-boot.dtsi which
> takes more precedence for u-boot.dtsi inclusion and it eventually
> failed to include the sunxi-u-boot.dtsi.
>
> So, this patch add support to include the sunxi-u-boot.dtsi in the
> sun50i-a64-pinebook-u-boot.dtsi
>
> Signed-off-by: Jagan Teki
Thanks! Now it works fine.
This patch and whole DM_MMC series:
Tested-by: Vasily Khoruzhick # Tested on Pinebook
> ---
> arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
> b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
> index a99b7171d0..650ab97ec9 100644
> --- a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
> +++ b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
> @@ -4,6 +4,8 @@
> *
> */
>
> +#include "sunxi-u-boot.dtsi"
> +
> /* The ANX6345 eDP-bridge is on r_i2c */
> _i2c {
> anx6345: edp-bridge@38 {
> --
> 2.18.0.321.gffc6fa0e3
>
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Re: [U-Boot] [PATCH v3 9/9] arm: dts: sunxi: Enumerate MMC2 as MMC1
On Mon, Jan 21, 2019 at 8:24 PM Vasily Khoruzhick wrote: > > For me it shows: > > => mmc list > mmc@1c0f000: 0 (SD) > mmc@1c1: 1 > mmc@1c11000: 2 > > I'm testing this patches applied onto u-boot-sunxi/master on Pinebook. > I tried 'distclean', and it doesn't help. Looks like eMMC is here but it doesn't get renumbered: => mmc dev 2 switch to partitions #0, OK mmc2(part 0) is current device => mmc info Device: mmc@1c11000 Manufacturer ID: 15 OEM: 100 Name: AJTD4 Bus Speed: 5200 Mode : MMC High Speed (52MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 14.6 GiB Bus Width: 8-bit Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 14.6 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH => mmc list mmc@1c0f000: 0 mmc@1c1: 1 mmc@1c11000: 2 (eMMC) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 9/9] arm: dts: sunxi: Enumerate MMC2 as MMC1
On Mon, Jan 21, 2019 at 7:46 AM Jagan Teki wrote: > > On Mon, Jan 21, 2019 at 9:08 PM Vasily Khoruzhick wrote: >scanning usb for storage devices... 0 Storage Device(s) found > Hit any key to stop autoboot: 0 > => > => > => mmc list > mmc@1c0f000: 0 > mmc@1c1: 2 > mmc@1c11000: 1 (eMMC) > => mmc dev 0 > switch to partitions #0, OK > mmc0 is current device > => mmc list > mmc@1c0f000: 0 (SD) > mmc@1c1: 2 > mmc@1c11000: 1 (eMMC) For me it shows: => mmc list mmc@1c0f000: 0 (SD) mmc@1c1: 1 mmc@1c11000: 2 I'm testing this patches applied onto u-boot-sunxi/master on Pinebook. I tried 'distclean', and it doesn't help. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 9/9] arm: dts: sunxi: Enumerate MMC2 as MMC1
On Mon, Jan 21, 2019 at 2:32 AM Jagan Teki wrote:
>
> Environment and fastboot MMC devices are configured based number
> of mmc slots defined on particular board in sunxi platform.
>
> If number of slots are not more than 1, it assigns 0 which usually mmc
> device on SD slot. With DM_MMC it is detected as 0 since mmc0 node always
> be an mmc device.
>
> If number of slots are more than 1, it assigns 1 which assumes 0 is mmc
> device and 1 is emmc device. But with DM_MMC there is chance of detecting
> emmc as device 2 since mmc1 is SDIO as per devicetree definition.
>
> So override mmc2 to mmc1 in sunxi dtsi, this will eventually detect mmc2
> as mmc 1 device even if the board dts has mmc0, mmc1, mmc2.
It doesn't work on Pinebook - where we have mmc0 (SD card), mmc1
(SDIO), mmc2 (eMMC). It still enumerates mmc2 as mmc2.
> Some platforms like A20 has mmc0...mmc3, but there is no usecases now for
> enabling all mmc controllers in any of A20 board dts files.
>
> Signed-off-by: Jagan Teki
> ---
> arch/arm/dts/sunxi-u-boot.dtsi | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
> index 8a9f2a6417..fdd4c80aa4 100644
> --- a/arch/arm/dts/sunxi-u-boot.dtsi
> +++ b/arch/arm/dts/sunxi-u-boot.dtsi
> @@ -1,6 +1,10 @@
> #include
>
> / {
> + aliases {
> + mmc1 =
> + };
> +
> binman {
> filename = "u-boot-sunxi-with-spl.bin";
> pad-byte = <0xff>;
> --
> 2.18.0.321.gffc6fa0e3
>
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Re: [U-Boot] [PATCH 0/9] sunxi: enable DM_MMC
On Sat, Jan 19, 2019 at 12:35 PM André Przywara wrote: > Thanks for the report! So is this with this U-Boot on an SD card or on > the eMMC? This is with u-boot on eMMC and no SD card present in the slot. > Can you try to add the mmc1 = alias that Jagan suggested: > https://lists.denx.de/pipermail/u-boot/2019-January/354367.html It didn't help. > Thanks, > Andre. > > > Regards, > > Vasily > > > >> This replaces Jagan's v2 series "mmc: sunxi: Enable DM_MMC" in a more > >> driver model compliant way, borrowing two patches from him. > >> > >> Cheers, > >> Andre. > >> > >> Andre Przywara (7): > >> sunxi: clk: add MMC gates/resets > >> sunxi: clk: A80: add MMC clock support > >> mmc: sunxi: Add DM clk and reset support > >> mmc: sunxi: Add H6 support > >> mmc: sunxi: Add A80 support > >> mmc: sunxi: Honour non-removable property in DT > >> mmc: sunxi: Mark end of DM_MMC #ifdefs > >> > >> Jagan Teki (2): > >> mmc: sunxi: Add missing compatible strings > >> arm: sunxi: Enable DM_MMC > >> > >> arch/arm/Kconfig | 1 + > >> arch/arm/mach-sunxi/Kconfig | 1 - > >> configs/Linksprite_pcDuino3_defconfig | 1 - > >> drivers/clk/sunxi/clk_a10.c | 4 +++ > >> drivers/clk/sunxi/clk_a10s.c | 3 ++ > >> drivers/clk/sunxi/clk_a23.c | 6 > >> drivers/clk/sunxi/clk_a31.c | 8 + > >> drivers/clk/sunxi/clk_a64.c | 6 > >> drivers/clk/sunxi/clk_a80.c | 28 - > >> drivers/clk/sunxi/clk_a83t.c | 6 > >> drivers/clk/sunxi/clk_h3.c| 6 > >> drivers/clk/sunxi/clk_h6.c| 6 > >> drivers/clk/sunxi/clk_r40.c | 8 + > >> drivers/mmc/sunxi_mmc.c | 59 > >> +-- > >> 14 files changed, 131 insertions(+), 12 deletions(-) > >> > >> -- > >> 2.14.5 > >> > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/9] sunxi: enable DM_MMC
On Fri, Jan 18, 2019 at 5:32 PM Andre Przywara wrote: > > This series enables the Allwinner MMC driver to drive all SoCs with its > DM_MMC variant. We use the gates clock and reset support from the new > clock driver, but keep the actual mod clock in its somewhat hackish > state. Properly supporting this via the clock driver is a bit more work. > The per-compatible variant struct for now only holds the mod clock > address (which will go away), but we will need the struct later again > for the various timing modes. > > This allows us to eventually enable DM_MMC for all SoCs, and get rid of > the nasty deprecation warning. > > The first patch adds the MMC clock gates and resets to the clock driver. > Patch 2/9 adds support for the A80 MMC config clock, which is a bit > special. I can't test this, so please give this a try if you have a board. > > Patch 3 uses the new clocks in the MMC driver, the following three patches > add the remaining compatible strings along with their required mod clock > addresses. > > Patch 7 fixes the Pine64-LTS board, while patch 8 eventually enables > everything. Patch 9 is some comment fix to make it easier to reason > about what part of the driver is for DM_MMC and which is not. > > I successfully compiled the HEAD for all 142 Allwinner boards, also > compiled all patches for selected boards. > > This was briefly tested on Pine-H64 (H6), Pine64-LTS (A64), OrangePi PC 2 > (H5), OrangePi Zero (H2+) and BananaPi-M1 (A20). > > Please run it on every board that you can get hold of to give this series > a good shake. > > This goes on top of current sunxi/master (543049ab5906) and is available > on https://github.com/apritzel/u-boot/commits/sunxi-dm. It breaks autoboot for eMMC on Pinebook. It complains: Card did not respond to voltage select! MMC: no card present Card itself is present, i.e. if I do these command I see card info: mmc dev 2 mmc info Regards, Vasily > This replaces Jagan's v2 series "mmc: sunxi: Enable DM_MMC" in a more > driver model compliant way, borrowing two patches from him. > > Cheers, > Andre. > > Andre Przywara (7): > sunxi: clk: add MMC gates/resets > sunxi: clk: A80: add MMC clock support > mmc: sunxi: Add DM clk and reset support > mmc: sunxi: Add H6 support > mmc: sunxi: Add A80 support > mmc: sunxi: Honour non-removable property in DT > mmc: sunxi: Mark end of DM_MMC #ifdefs > > Jagan Teki (2): > mmc: sunxi: Add missing compatible strings > arm: sunxi: Enable DM_MMC > > arch/arm/Kconfig | 1 + > arch/arm/mach-sunxi/Kconfig | 1 - > configs/Linksprite_pcDuino3_defconfig | 1 - > drivers/clk/sunxi/clk_a10.c | 4 +++ > drivers/clk/sunxi/clk_a10s.c | 3 ++ > drivers/clk/sunxi/clk_a23.c | 6 > drivers/clk/sunxi/clk_a31.c | 8 + > drivers/clk/sunxi/clk_a64.c | 6 > drivers/clk/sunxi/clk_a80.c | 28 - > drivers/clk/sunxi/clk_a83t.c | 6 > drivers/clk/sunxi/clk_h3.c| 6 > drivers/clk/sunxi/clk_h6.c| 6 > drivers/clk/sunxi/clk_r40.c | 8 + > drivers/mmc/sunxi_mmc.c | 59 > +-- > 14 files changed, 131 insertions(+), 12 deletions(-) > > -- > 2.14.5 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/7] mmc: sunxi: Enable DM_MMC
On Fri, Jan 11, 2019 at 10:04 AM Jagan Teki wrote: > > I thought of waiting this till CLK framework gets Mainline, > but migration deadline for DM_MMC and BLK seems expiring in > next release. So instead of doing so huddle and make some last > minute changes, I have managed to add CLK, Reset code for mmc > driver via driver data. > > Add for all Allwinner SoC's and enable at arch/arm/Kconfig. > > I shall merge this in comming MW, so early test feel better > to go for the release. Request to test respective board takers. Hi Jagan, Do you have a branch with all the patches (including clk and reset) that I can use to test the changes on Pine64 and Pinebook? Regards, Vasily > > Any inputs, > Jagan. > > Jagan Teki (7): > mmc: sunxi: Configure reset support for DM_MMC > mmc: sunxi: Add A83T emmc compatible > mmc: sunxi: Add mmc, emmc H5/A64 compatible > mmc: sunxi: Add DM_MMC support for H6 > mmc: sunxi: Add DM_MMC support for A80 > arm: sunxi: Enable DM_MMC > arm: dts: sunxi: Enumerate MMC2 as MMC1 > > arch/arm/Kconfig | 1 + > arch/arm/dts/sunxi-u-boot.dtsi| 4 + > .../include/asm/arch-sunxi/clock_sun50i_h6.h | 3 + > arch/arm/mach-sunxi/Kconfig | 1 - > configs/Linksprite_pcDuino3_defconfig | 1 - > drivers/mmc/sunxi_mmc.c | 73 ++- > 6 files changed, 79 insertions(+), 4 deletions(-) > > -- > 2.18.0.321.gffc6fa0e3 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] sunxi-mmc: enable new clock mode on A64
On Thu, Nov 15, 2018 at 11:20 AM Vasily Khoruzhick wrote: > > On Fri, Nov 9, 2018 at 8:41 PM Vasily Khoruzhick wrote: > > > > A64 requires new clock mode on SD and eMMC controllers. Not using > > new clock mode causes stability issues of the driver - SPL may > > occasionally fail to load u-boot from SD for some particular SD card > > on some particular devices. > > > > This series depends on "sunxi: add support for automatic delay calibration" > > from my Pinebook series. > > > > Tested on Pinebook and Pine64-LTS. Fixes eMMC failures on Olinuxino-A64 [1] > > Ping? I've got reports from several users that it fixes issues with > different SD cards on Pinebook and Sopine. It would be nice to have it > merged. Another gentle reminder - patches has been sitting in ML for almost 2 weeks with no review. > > [1] > > https://github.com/armbian/build/commit/03199b3879af24c94029460b8cdf0d41048afc92#commitcomment-31028421 > > > > Vasily Khoruzhick (3): > > sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option > > sunxi-mmc: don't double clock for new mode unconditionally > > sunxi-mmc: use new mode on both controllers on A64 > > > > arch/arm/mach-sunxi/Kconfig | 2 ++ > > drivers/mmc/Kconfig | 4 > > drivers/mmc/sunxi_mmc.c | 19 +-- > > 3 files changed, 15 insertions(+), 10 deletions(-) > > > > -- > > 2.19.1 > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] sunxi-mmc: enable new clock mode on A64
On Fri, Nov 9, 2018 at 8:41 PM Vasily Khoruzhick wrote: > > A64 requires new clock mode on SD and eMMC controllers. Not using > new clock mode causes stability issues of the driver - SPL may > occasionally fail to load u-boot from SD for some particular SD card > on some particular devices. > > This series depends on "sunxi: add support for automatic delay calibration" > from my Pinebook series. > > Tested on Pinebook and Pine64-LTS. Fixes eMMC failures on Olinuxino-A64 [1] Ping? I've got reports from several users that it fixes issues with different SD cards on Pinebook and Sopine. It would be nice to have it merged. > [1] > https://github.com/armbian/build/commit/03199b3879af24c94029460b8cdf0d41048afc92#commitcomment-31028421 > > Vasily Khoruzhick (3): > sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option > sunxi-mmc: don't double clock for new mode unconditionally > sunxi-mmc: use new mode on both controllers on A64 > > arch/arm/mach-sunxi/Kconfig | 2 ++ > drivers/mmc/Kconfig | 4 > drivers/mmc/sunxi_mmc.c | 19 +-- > 3 files changed, 15 insertions(+), 10 deletions(-) > > -- > 2.19.1 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: use 6MHz PLL_VIDEO step for DE2 for higher resolution LCD
On Tue, Nov 13, 2018 at 8:32 AM Jagan Teki wrote: > > On Mon, Oct 29, 2018 at 2:08 PM Maxime Ripard > wrote: > > > > On Sun, Oct 28, 2018 at 02:26:12PM -0700, Vasily Khoruzhick wrote: > > > From: Icenowy Zheng > > > > > > DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't > > > let PLL_VIDEO be high enough for them. > > > > > > Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD. > > > > > > Signed-off-by: Icenowy Zheng > > > Signed-off-by: Vasily Khoruzhick > > > Tested-by: Vasily Khoruzhick > > > > I wonder if this will cause any issues with panels and lower > > resolutions that will have a smaller tolerancy. > > Does it impact lower resolution panels? is it tested? It works fine with 1366x768 panel, and I don't have any other panels that work in u-boot to test. And correct me if I'm wrong but I don't think that we have any boards with DE2 and low-res panel supported in u-boot. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] sunxi-mmc: use new mode on both controllers on A64
Using new mode improves stability of eMMC and SD cards. Without
it SPL fails to load u-boot from SD on Pinebook.
Signed-off-by: Vasily Khoruzhick
Reviewed-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/mmc/sunxi_mmc.c | 10 +++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 66fff6c6d3..3c54f5106d 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -282,6 +282,7 @@ config MACH_SUN50I
select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
+ select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index e50b2c3343..2b6f3c2234 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -98,12 +98,16 @@ static int mmc_resource_init(int sdc_no)
static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
{
unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
- bool new_mode = false;
+ bool new_mode = true;
bool calibrate = false;
u32 val = 0;
- if (IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && (priv->mmc_no == 2))
- new_mode = true;
+ if (!IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE))
+ new_mode = false;
+
+ /* A83 support new mode only on eMMC */
+ if (IS_ENABLED(CONFIG_MACH_SUN8I_A83T) && priv->mmc_no != 2)
+ new_mode = false;
#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
calibrate = true;
--
2.19.1
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[U-Boot] [PATCH v2 2/3] sunxi-mmc: don't double clock for new mode unconditionally
Comment in Linux driver says that clock needs to be doubled only
if we use DDR modes, moreover divider has to be set accordingly.
U-boot driver doesn't declare support for any DDR modes and doesn't
set internal clock divider in CLKCR, so it doubles clock
unconditionally when new mode is used.
Some cards can't handle that and as result SPL fails to load u-boot.
Fixes: de9b1771c3b ("mmc: sunxi: Support new mode")
Signed-off-by: Vasily Khoruzhick
---
drivers/mmc/sunxi_mmc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index b3526f5e3f..e50b2c3343 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -109,13 +109,6 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
calibrate = true;
#endif
- /*
-* The MMC clock has an extra /2 post-divider when operating in the new
-* mode.
-*/
- if (new_mode)
- hz = hz * 2;
-
if (hz <= 2400) {
pll = CCM_MMC_CTRL_OSCM24;
pll_hz = 2400;
--
2.19.1
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[U-Boot] [PATCH v2 1/3] sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option
A64 doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW
is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled
Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage
of CCM_MMC_CTRL_MODE_SEL_NEW
Signed-off-by: Vasily Khoruzhick
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/mmc/Kconfig | 4
drivers/mmc/sunxi_mmc.c | 2 ++
3 files changed, 7 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 560dc9b25d..66fff6c6d3 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -230,6 +230,7 @@ config MACH_SUN8I_A83T
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
+ select MMC_SUNXI_HAS_MODE_SWITCH
select SUPPORT_SPL
config MACH_SUN8I_H3
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 27246ee465..3f7458d409 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -569,6 +569,10 @@ config MMC_SUNXI_HAS_NEW_MODE
bool
depends on MMC_SUNXI
+config MMC_SUNXI_HAS_MODE_SWITCH
+ bool
+ depends on MMC_SUNXI
+
config GENERIC_ATMEL_MCI
bool "Atmel Multimedia Card Interface support"
depends on DM_MMC && BLK && ARCH_AT91
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 147eb9b4d5..b3526f5e3f 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -176,7 +176,9 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
if (new_mode) {
#ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
+#ifdef CONFIG_MMC_SUNXI_HAS_MODE_SWITCH
val = CCM_MMC_CTRL_MODE_SEL_NEW;
+#endif
setbits_le32(>reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
#endif
} else if (!calibrate) {
--
2.19.1
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[U-Boot] [PATCH v2 0/3] sunxi-mmc: enable new clock mode on A64
A64 requires new clock mode on SD and eMMC controllers. Not using new clock mode causes stability issues of the driver - SPL may occasionally fail to load u-boot from SD for some particular SD card on some particular devices. This series depends on "sunxi: add support for automatic delay calibration" from my Pinebook series. Tested on Pinebook and Pine64-LTS. Fixes eMMC failures on Olinuxino-A64 [1] [1] https://github.com/armbian/build/commit/03199b3879af24c94029460b8cdf0d41048afc92#commitcomment-31028421 Vasily Khoruzhick (3): sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option sunxi-mmc: don't double clock for new mode unconditionally sunxi-mmc: use new mode on both controllers on A64 arch/arm/mach-sunxi/Kconfig | 2 ++ drivers/mmc/Kconfig | 4 drivers/mmc/sunxi_mmc.c | 19 +-- 3 files changed, 15 insertions(+), 10 deletions(-) -- 2.19.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] sunxi-mmc: introduce new MMC_SUNXI_HAS_NEW_MODE_SWITCH option
On Tue, Nov 6, 2018 at 8:13 PM Chen-Yu Tsai wrote: > > On Wed, Nov 7, 2018 at 11:59 AM Vasily Khoruzhick wrote: > > > > A64 doesn't have a mode switch in CCM, so introduce new > > MMC_SUNXI_HAS_NEW_MODE_SWITCH option to support new clock mode on A64 > > > > Signed-off-by: Vasily Khoruzhick > > Tested-by: Zhaofeng Li > > This patch isn't strictly necessary. See > > > https://elixir.bootlin.com/linux/v4.20-rc1/source/drivers/mmc/host/sunxi-mmc.c#L831 > > If the switch doesn't exist, changes to that bit are ignored. CCM_MMC_CTRL_MODE_SEL_NEW is not defined on A64, so it won't compile unless we define it on A64 which seems to be redundant. > > ChenYu ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/3] sunxi-mmc: use new mode on both controllers on A64
Using new mode improves stability of eMMC and SD cards. Without
it SPl fails to load u-boot from SD on Pinebook.
Signed-off-by: Vasily Khoruzhick
Tested-by: Zhaofeng Li
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/mmc/sunxi_mmc.c | 10 +++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 66fff6c6d3..3c54f5106d 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -282,6 +282,7 @@ config MACH_SUN50I
select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
+ select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index e50b2c3343..2b6f3c2234 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -98,12 +98,16 @@ static int mmc_resource_init(int sdc_no)
static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
{
unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
- bool new_mode = false;
+ bool new_mode = true;
bool calibrate = false;
u32 val = 0;
- if (IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && (priv->mmc_no == 2))
- new_mode = true;
+ if (!IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE))
+ new_mode = false;
+
+ /* A83 support new mode only on eMMC */
+ if (IS_ENABLED(CONFIG_MACH_SUN8I_A83T) && priv->mmc_no != 2)
+ new_mode = false;
#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
calibrate = true;
--
2.19.1
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[U-Boot] [PATCH 1/3] sunxi-mmc: introduce new MMC_SUNXI_HAS_NEW_MODE_SWITCH option
A64 doesn't have a mode switch in CCM, so introduce new
MMC_SUNXI_HAS_NEW_MODE_SWITCH option to support new clock mode on A64
Signed-off-by: Vasily Khoruzhick
Tested-by: Zhaofeng Li
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/mmc/Kconfig | 4
drivers/mmc/sunxi_mmc.c | 2 ++
3 files changed, 7 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 560dc9b25d..66fff6c6d3 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -230,6 +230,7 @@ config MACH_SUN8I_A83T
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
+ select MMC_SUNXI_HAS_MODE_SWITCH
select SUPPORT_SPL
config MACH_SUN8I_H3
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 27246ee465..3f7458d409 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -569,6 +569,10 @@ config MMC_SUNXI_HAS_NEW_MODE
bool
depends on MMC_SUNXI
+config MMC_SUNXI_HAS_MODE_SWITCH
+ bool
+ depends on MMC_SUNXI
+
config GENERIC_ATMEL_MCI
bool "Atmel Multimedia Card Interface support"
depends on DM_MMC && BLK && ARCH_AT91
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 147eb9b4d5..b3526f5e3f 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -176,7 +176,9 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
if (new_mode) {
#ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
+#ifdef CONFIG_MMC_SUNXI_HAS_MODE_SWITCH
val = CCM_MMC_CTRL_MODE_SEL_NEW;
+#endif
setbits_le32(>reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
#endif
} else if (!calibrate) {
--
2.19.1
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[U-Boot] [PATCH 2/3] sunxi-mmc: don't double clock for new mode unconditionally
Comment in Linux driver says that clock needs to be doubled only
if we use DDR modes, moreover divider has to be set accordingly.
U-boot driver doesn't declare support for any DDR modes and doesn't
set divider, so it doubles clock unconditionally when new mode
is used.
Some cards can't handle that and as result SPL fails to load u-boot.
Fixes: de9b1771c3b ("mmc: sunxi: Support new mode")
Signed-off-by: Vasily Khoruzhick
Tested-by: Zhaofeng Li
---
drivers/mmc/sunxi_mmc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index b3526f5e3f..e50b2c3343 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -109,13 +109,6 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
calibrate = true;
#endif
- /*
-* The MMC clock has an extra /2 post-divider when operating in the new
-* mode.
-*/
- if (new_mode)
- hz = hz * 2;
-
if (hz <= 2400) {
pll = CCM_MMC_CTRL_OSCM24;
pll_hz = 2400;
--
2.19.1
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[U-Boot] [PATCH 0/3] sunxi-mmc: enable new clock mode on A64
A64 requires new clock mode on SD and eMMC controllers. Not using new clock mode causes stability issues of the driver - SPL may occasionally fail to load u-boot from SD for some particular SD card on some particular devices. This series depends on "sunxi: add support for automatic delay calibration" from my Pinebook series. Tested on Pinebook and Pine64-LTS. Vasily Khoruzhick (3): sunxi-mmc: introduce new MMC_SUNXI_HAS_NEW_MODE_SWITCH option sunxi-mmc: don't double clock for new mode unconditionally sunxi-mmc: use new mode on both controllers on A64 arch/arm/mach-sunxi/Kconfig | 2 ++ drivers/mmc/Kconfig | 4 drivers/mmc/sunxi_mmc.c | 19 +-- 3 files changed, 15 insertions(+), 10 deletions(-) -- 2.19.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] sunxi: A64/H3/H5 DT updates
On Sun, Nov 4, 2018 at 10:55 PM Jagan Teki wrote: > Marked as "Waiting for Upstream" in patchwork, will push it MW, just > send your series on top it. I've just sent v5, see https://patchwork.ozlabs.org/project/uboot/list/?series=74203 Please note that my series depends on this series. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 3/4] sun50i: A64: add support for R_I2C controller
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/Kconfig| 1 +
board/sunxi/board.c| 6 ++
3 files changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 6a5eafc3d3..2daf23f6f5 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -211,6 +211,7 @@ enum sunxi_gpio_number {
#define SUN8I_H3_GPL_R_TWI 2
#define SUN8I_A23_GPL_R_TWI3
#define SUN8I_GPL_R_UART 2
+#define SUN50I_GPL_R_TWI 2
#define SUN9I_GPN_R_RSB3
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 6277abc3cc..560dc9b25d 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -278,6 +278,7 @@ config MACH_SUN50I
select ARM64
select DM_I2C
select PHY_SUN4I_USB
+ select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b196d48674..64ccbc7245 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -168,10 +168,16 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_R_I2C_ENABLE
+#ifdef CONFIG_MACH_SUN50I
+ clock_twi_onoff(5, 1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
+#else
clock_twi_onoff(5, 1);
sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
#endif
+#endif
}
#if defined(CONFIG_ENV_IS_IN_MMC) && defined(CONFIG_ENV_IS_IN_FAT)
--
2.19.1
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[U-Boot] [PATCH v5 4/4] sunxi: DT: add support for Pinebook
Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
bridge from Analogix.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 +
arch/arm/dts/sun50i-a64-pinebook.dts | 294 +++
configs/pinebook_defconfig | 22 ++
4 files changed, 332 insertions(+)
create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts
create mode 100644 configs/pinebook_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d36447d18d..7778f15091 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -405,6 +405,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb \
+ sun50i-a64-pinebook.dtb \
sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
diff --git a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
new file mode 100644
index 00..a99b7171d0
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Vasily Khoruzhick
+ *
+ */
+
+/* The ANX6345 eDP-bridge is on r_i2c */
+_i2c {
+ anx6345: edp-bridge@38 {
+ compatible = "analogix,anx6345";
+ reg = <0x38>;
+ reset-gpios = < 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+ status = "okay";
+ };
+};
diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
b/arch/arm/dts/sun50i-a64-pinebook.dts
new file mode 100644
index 00..ec537c5297
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2017 Icenowy Zheng
+ * Copyright (C) 2018 Vasily Khoruzhick
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include
+#include
+#include
+
+/ {
+ model = "Pinebook";
+ compatible = "pine64,pinebook", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 =
+ ethernet0 =
+ };
+
+ vdd_bl: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "bl-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ gpio = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ enable-active-high;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = < 0 5 0>;
+ brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
+ default-brightness-level = <2>;
+ enable-gpios = < 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+ power-supply = <_bl>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+
+ framebuffer-lcd {
+ panel-supply = <_dc1sw>;
+ dvdd25-supply = <_dldo2>;
+ dvdd12-supply = <_fldo1>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ lid_switch {
+ label = "Lid Switch";
+ gpios = <_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
+ linux,input-type = ;
+ linux,code = ;
+ linux,can-disable;
+ wakeup-source;
+ };
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+ {
+ phys = < 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dcdc1>;
+ cd-gpios = < 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dldo4>;
+ vqmmc-suppl
[U-Boot] [PATCH v5 2/4] dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
Both GPIOs are optional, so we shouldn't fail if any is missing.
Without this fix reset is not deasserted if sleep GPIO is missing.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Reviewed-by: Andre Przywara
Cc: Vagrant Cascadian
---
drivers/video/bridge/video-bridge-uclass.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/video/bridge/video-bridge-uclass.c
b/drivers/video/bridge/video-bridge-uclass.c
index cd4959cc71..5fecb4cfd5 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -106,13 +106,19 @@ static int video_bridge_pre_probe(struct udevice *dev)
int video_bridge_set_active(struct udevice *dev, bool active)
{
struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
- int ret;
+ int ret = 0;
debug("%s: %d\n", __func__, active);
- ret = dm_gpio_set_value(_priv->sleep, !active);
- if (ret)
- return ret;
- if (active) {
+ if (uc_priv->sleep.dev) {
+ ret = dm_gpio_set_value(_priv->sleep, !active);
+ if (ret)
+ return ret;
+ }
+
+ if (!active)
+ return 0;
+
+ if (uc_priv->reset.dev) {
ret = dm_gpio_set_value(_priv->reset, true);
if (ret)
return ret;
--
2.19.1
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[U-Boot] [PATCH v5 1/4] mmc: sunxi: add support for automatic delay calibration
A64 and H6 support automatic delay calibration and Linux driver uses it
instead of hardcoded delays. Add support for it to u-boot driver.
Fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Reviewed-by: Andre Przywara
Cc: Vagrant Cascadian
---
arch/arm/include/asm/arch-sunxi/mmc.h | 6 +-
drivers/mmc/sunxi_mmc.c | 21 -
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index d98c53faaa..f2deafddd2 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -46,7 +46,9 @@ struct sunxi_mmc {
u32 cbda; /* 0x94 */
u32 res2[26];
#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
- u32 res3[64];
+ u32 res3[17];
+ u32 samp_dl;
+ u32 res4[46];
#endif
u32 fifo; /* 0x100 / 0x200 FIFO access address */
};
@@ -130,5 +132,7 @@ struct sunxi_mmc {
#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16)
#define SUNXI_MMC_COMMON_RESET (1 << 18)
+#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7)
+
struct mmc *sunxi_mmc_init(int sdc_no);
#endif /* _SUNXI_MMC_H */
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 39f15eb423..147eb9b4d5 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -99,11 +99,16 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
{
unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
bool new_mode = false;
+ bool calibrate = false;
u32 val = 0;
if (IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && (priv->mmc_no == 2))
new_mode = true;
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
+ calibrate = true;
+#endif
+
/*
* The MMC clock has an extra /2 post-divider when operating in the new
* mode.
@@ -174,7 +179,11 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
val = CCM_MMC_CTRL_MODE_SEL_NEW;
setbits_le32(>reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
#endif
- } else {
+ } else if (!calibrate) {
+ /*
+* Use hardcoded delay values if controller doesn't support
+* calibration
+*/
val = CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
CCM_MMC_CTRL_SCLK_DLY(sclk_dly);
}
@@ -228,6 +237,16 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv,
struct mmc *mmc)
rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
writel(rval, >reg->clkcr);
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
+ /* A64 supports calibration of delays on MMC controller and we
+* have to set delay of zero before starting calibration.
+* Allwinner BSP driver sets a delay only in the case of
+* using HS400 which is not supported by mainline U-Boot or
+* Linux at the moment
+*/
+ writel(SUNXI_MMC_CAL_DL_SW_EN, >reg->samp_dl);
+#endif
+
/* Re-enable Clock */
rval |= SUNXI_MMC_CLK_ENABLE;
writel(rval, >reg->clkcr);
--
2.19.1
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[U-Boot] [PATCH v5 0/4] Add support for Pinebook
This series adds support for the Pinebook, an allwinner A64 laptop produced by Pine64. It also adds support for mmc delay calibration, R_I2C controller, and addresses the issue with activating video bridge when any of GPIOs is missing. This series depends on André's "sunxi: A64/H3/H5 DT updates" v2: - sync sun50i-a64.dtsi with linux instead of adding missing nodes - take sun50i-a64-pinebook.dts from linux - don't introduce new Kconfig for A64 MMC calibration - improve code in video bridge uclass to check for presensce of GPIO instead of ingoring EINVAL errors v3: - enable calibration for H6 as well - init ret variable in video_bridge_set_active() - fix order of dts files Makefile - split anx6345 binding into sun50i-a64-pinebook-u-boot.dts - drop speaker_amp node from pinebook dts - drop unnecessary options from defconfig v4: - sync device tree files with linux-next v5: - drop patch to sync device tree files with linux-next Vasily Khoruzhick (4): mmc: sunxi: add support for automatic delay calibration dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing sun50i: A64: add support for R_I2C controller sunxi: DT: add support for Pinebook arch/arm/dts/Makefile| 1 + arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 + arch/arm/dts/sun50i-a64-pinebook.dts | 294 +++ arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/mmc.h| 6 +- arch/arm/mach-sunxi/Kconfig | 1 + board/sunxi/board.c | 6 + configs/pinebook_defconfig | 22 ++ drivers/mmc/sunxi_mmc.c | 21 +- drivers/video/bridge/video-bridge-uclass.c | 16 +- 10 files changed, 376 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts create mode 100644 configs/pinebook_defconfig -- 2.19.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] sunxi: A64/H3/H5 DT updates
On Sun, Nov 4, 2018 at 9:13 PM Jagan Teki wrote: > > On Mon, Oct 29, 2018 at 6:27 AM Andre Przywara wrote: > > > > This updates the .dts and .dtsi files used in U-Boot to what will become > > the new DTs in Linux 4.20 (anytime soon). > > Those updates are not too useful for U-Boot itself, but keep the DTs > > consistent and allow to directly pass U-Boot's copy to any kernel, by using > > $fdtcontroladdr. > > There is a small change in the A64 .dtsi, which breaks compatibility with > > older kernels (stable releases and those found on distro installer images), > > so the second patch fixes this by re-adding the missing compatible > > string to the system controller node. > > The updates include the H5 and also H3, as they are very close and need to > > be updated together. > > > > I ran into issues with the H6, so will post an update for that later. > > > > I see that this somewhat overlaps with Vasily's Pinebook series, I am > > happy to arrange something here. Originally I wanted to wait for the files > > to hit Linus' tree (to get stable commit IDs), but I sending this now > > to not block Vasily. > > So, does this sync is on top of pinebook dts sync patch[1]? if ie case > then we can squash 1/4 with [1] so all sync changes in one commit. Just merge Andre's patches, I'll rebase mine on top of his and resend. > [1] https://patchwork.ozlabs.org/patch/990012/ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/5] Add support for Pinebook
On Sat, Nov 3, 2018 at 2:15 PM André Przywara wrote: > > On 11/3/18 8:19 PM, Vasily Khoruzhick wrote: > > > > You need "allwinner" branch from this repo. > > I deliberately switched the standard branch away, since everything is > merged in mainline ATF now (including PMIC support). I will post U-Boot > patches to change the instructions soon, but just use the master branch > from the official repo (and report back any issues!): > https://github.com/ARM-Software/arm-trusted-firmware.git > > You might need the latest DT in U-Boot (patches are queued, AFAIK) to > let ATF know about your PMIC requirements. Thanks, I just tested it - and my patches work fine with ATF from official repo. > Cheers, > Andre > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/5] Add support for Pinebook
On Sat, Nov 3, 2018 at 1:18 PM Vasily Khoruzhick wrote: > > Video is supposed to work, but you need ATF from Andre to enable LCD power: > > https://github.com/apritzel/arm-trusted-firmware/ You need "allwinner" branch from this repo. > On Sat, Nov 3, 2018 at 11:53 AM Dennis Gilmore wrote: > > > > I have tested the series on my pinebook on top of git commit > > 99431c1c21685fe63d46b6eac995b78ce9adce0a > > > > I am not sure if video is expected to work or not, in my case it does > > not work. > > > > U-Boot SPL 2018.11-rc3-00027-g77a46c3a3c (Nov 03 2018 - 13:42:47 -0500) > > DRAM: 2048 MiB > > Trying to boot from MMC1 > > NOTICE: BL31: v1.6(release): > > NOTICE: BL31: Built : 09:10:17, Sep 23 2018 > > NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689) > > NOTICE: BL31: STUB PMIC setup code called > > > > > > U-Boot 2018.11-rc3-00027-g77a46c3a3c (Nov 03 2018 - 13:42:47 -0500) > > Allwinner Technology > > > > CPU: Allwinner A64 (SUN50I) > > Model: Pinebook > > DRAM: 2 GiB > > MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1 > > Loading Environment from FAT... *** Warning - bad CRC, using default > > environment > > > > Warning: HDMI PHY init timeout! > > Warning: HDMI PHY init timeout! > > In:serial > > Out: serial > > Err: serial > > > > u-boot however works fine and the system is able to boot and the > > correct dtb is loaded. > > > > Tested-by: Dennis Gilmore > > > > El mar, 30-10-2018 a las 14:36 -0700, Vagrant Cascadian escribió: > > > Tested series applied to u-boot 2018.11-rc3 on pinebook, both with > > > reboot and cold boot. > > > > > > Thanks for all the work on it! > > > > > > Tested-by: Vagrant Cascadian > > > > > > On 2018-10-28, Vasily Khoruzhick wrote: > > > > This series adds support for the Pinebook, an allwinner A64 laptop > > > > produced by Pine64. It also syncs sun50i-a64.dtsi with linux, > > > > adds support for mmc delay calibration, R_I2C controller, > > > > and addresses the issue with activating video bridge when any of > > > > GPIOs is missing. > > > > > > > > v2: - sync sun50i-a64.dtsi with linux instead of adding missing > > > > nodes > > > > - take sun50i-a64-pinebook.dts from linux > > > > - don't introduce new Kconfig for A64 MMC calibration > > > > - improve code in video bridge uclass to check for presensce of > > > > GPIO instead of ingoring EINVAL errors > > > > v3: - enable calibration for H6 as well > > > > - init ret variable in video_bridge_set_active() > > > > - fix order of dts files Makefile > > > > - split anx6345 binding into sun50i-a64-pinebook-u-boot.dts > > > > - drop speaker_amp node from pinebook dts > > > > - drop unnecessary options from defconfig > > > > v4: - sync device tree files with linux-next > > > > > > > > Vasily Khoruzhick (5): > > > > mmc: sunxi: add support for automatic delay calibration > > > > dm: video: bridge: don't fail to activate bridge if reset or > > > > sleep > > > > GPIO is missing > > > > sunxi: DT: A64: update device tree files for Allwinner A64 SoC > > > > sun50i: A64: add support for R_I2C controller > > > > sunxi: DT: add support for Pinebook > > > > > > > > arch/arm/dts/Makefile| 1 + > > > > arch/arm/dts/sun50i-a64-amarula-relic.dts| 168 +- > > > > arch/arm/dts/sun50i-a64-bananapi-m64.dts | 34 +- > > > > arch/arm/dts/sun50i-a64-nanopi-a64.dts | 89 +- > > > > arch/arm/dts/sun50i-a64-olinuxino.dts| 103 +- > > > > arch/arm/dts/sun50i-a64-orangepi-win.dts | 179 ++- > > > > arch/arm/dts/sun50i-a64-pine64.dts | 32 +- > > > > arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 + > > > > arch/arm/dts/sun50i-a64-pinebook.dts | 294 > > > > + > > > > arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 32 +- > > > > arch/arm/dts/sun50i-a64-sopine.dtsi | 15 + > > > > arch/arm/dts/sun50i-a64.dtsi | 313 > > > > +-- > > > > arch/arm/include/asm/arch-sunxi/gpio.h | 1 + > > > > arch/arm/include/asm/arch-sunxi/mmc.h| 6 +- > > > > arch/arm/mach-sunxi/Kconfig | 1 + > > > > board/sunxi/board.c | 6 + > > > > configs/pinebook_defconfig | 22 ++ > > > > drivers/mmc/sunxi_mmc.c | 21 +- > > > > drivers/video/bridge/video-bridge-uclass.c | 16 +- > > > > 19 files changed, 1296 insertions(+), 52 deletions(-) > > > > create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi > > > > create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts > > > > create mode 100644 configs/pinebook_defconfig > > > > > > > > -- > > > > 2.19.1 > > > > > > ___ > > > U-Boot mailing list > > > U-Boot@lists.denx.de > > > https://lists.denx.de/listinfo/u-boot > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/5] Add support for Pinebook
Video is supposed to work, but you need ATF from Andre to enable LCD power: https://github.com/apritzel/arm-trusted-firmware/ On Sat, Nov 3, 2018 at 11:53 AM Dennis Gilmore wrote: > > I have tested the series on my pinebook on top of git commit > 99431c1c21685fe63d46b6eac995b78ce9adce0a > > I am not sure if video is expected to work or not, in my case it does > not work. > > U-Boot SPL 2018.11-rc3-00027-g77a46c3a3c (Nov 03 2018 - 13:42:47 -0500) > DRAM: 2048 MiB > Trying to boot from MMC1 > NOTICE: BL31: v1.6(release): > NOTICE: BL31: Built : 09:10:17, Sep 23 2018 > NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689) > NOTICE: BL31: STUB PMIC setup code called > > > U-Boot 2018.11-rc3-00027-g77a46c3a3c (Nov 03 2018 - 13:42:47 -0500) > Allwinner Technology > > CPU: Allwinner A64 (SUN50I) > Model: Pinebook > DRAM: 2 GiB > MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1 > Loading Environment from FAT... *** Warning - bad CRC, using default > environment > > Warning: HDMI PHY init timeout! > Warning: HDMI PHY init timeout! > In:serial > Out: serial > Err: serial > > u-boot however works fine and the system is able to boot and the > correct dtb is loaded. > > Tested-by: Dennis Gilmore > > El mar, 30-10-2018 a las 14:36 -0700, Vagrant Cascadian escribió: > > Tested series applied to u-boot 2018.11-rc3 on pinebook, both with > > reboot and cold boot. > > > > Thanks for all the work on it! > > > > Tested-by: Vagrant Cascadian > > > > On 2018-10-28, Vasily Khoruzhick wrote: > > > This series adds support for the Pinebook, an allwinner A64 laptop > > > produced by Pine64. It also syncs sun50i-a64.dtsi with linux, > > > adds support for mmc delay calibration, R_I2C controller, > > > and addresses the issue with activating video bridge when any of > > > GPIOs is missing. > > > > > > v2: - sync sun50i-a64.dtsi with linux instead of adding missing > > > nodes > > > - take sun50i-a64-pinebook.dts from linux > > > - don't introduce new Kconfig for A64 MMC calibration > > > - improve code in video bridge uclass to check for presensce of > > > GPIO instead of ingoring EINVAL errors > > > v3: - enable calibration for H6 as well > > > - init ret variable in video_bridge_set_active() > > > - fix order of dts files Makefile > > > - split anx6345 binding into sun50i-a64-pinebook-u-boot.dts > > > - drop speaker_amp node from pinebook dts > > > - drop unnecessary options from defconfig > > > v4: - sync device tree files with linux-next > > > > > > Vasily Khoruzhick (5): > > > mmc: sunxi: add support for automatic delay calibration > > > dm: video: bridge: don't fail to activate bridge if reset or > > > sleep > > > GPIO is missing > > > sunxi: DT: A64: update device tree files for Allwinner A64 SoC > > > sun50i: A64: add support for R_I2C controller > > > sunxi: DT: add support for Pinebook > > > > > > arch/arm/dts/Makefile| 1 + > > > arch/arm/dts/sun50i-a64-amarula-relic.dts| 168 +- > > > arch/arm/dts/sun50i-a64-bananapi-m64.dts | 34 +- > > > arch/arm/dts/sun50i-a64-nanopi-a64.dts | 89 +- > > > arch/arm/dts/sun50i-a64-olinuxino.dts| 103 +- > > > arch/arm/dts/sun50i-a64-orangepi-win.dts | 179 ++- > > > arch/arm/dts/sun50i-a64-pine64.dts | 32 +- > > > arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 + > > > arch/arm/dts/sun50i-a64-pinebook.dts | 294 > > > + > > > arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 32 +- > > > arch/arm/dts/sun50i-a64-sopine.dtsi | 15 + > > > arch/arm/dts/sun50i-a64.dtsi | 313 > > > +-- > > > arch/arm/include/asm/arch-sunxi/gpio.h | 1 + > > > arch/arm/include/asm/arch-sunxi/mmc.h| 6 +- > > > arch/arm/mach-sunxi/Kconfig | 1 + > > > board/sunxi/board.c | 6 + > > > configs/pinebook_defconfig | 22 ++ > > > drivers/mmc/sunxi_mmc.c | 21 +- > > > drivers/video/bridge/video-bridge-uclass.c | 16 +- > > > 19 files changed, 1296 insertions(+), 52 deletions(-) > > > create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi > > > create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts > > > create mode 100644 configs/pinebook_defconfig > > > > > > -- > > > 2.19.1 > > > > ___ > > U-Boot mailing list > > U-Boot@lists.denx.de > > https://lists.denx.de/listinfo/u-boot > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] sunxi: use 6MHz PLL_VIDEO step for DE2 for higher resolution LCD
From: Icenowy Zheng
DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't
let PLL_VIDEO be high enough for them.
Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD.
Signed-off-by: Icenowy Zheng
Signed-off-by: Vasily Khoruzhick
Tested-by: Vasily Khoruzhick
---
arch/arm/mach-sunxi/clock_sun6i.c | 4
drivers/video/sunxi/lcdc.c| 22 ++
2 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c
b/arch/arm/mach-sunxi/clock_sun6i.c
index 82f6f7f8e3..1628f3a7b6 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -149,7 +149,11 @@ void clock_set_pll3(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+#ifdef CONFIG_SUNXI_DE2
+ const int m = 4; /* 6 MHz steps to allow higher frequency for DE2 */
+#else
const int m = 8; /* 3 MHz steps just like sun4i, sun5i and sun7i */
+#endif
if (clk == 0) {
clrbits_le32(>pll3_cfg, CCM_PLL3_CTRL_EN);
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
index 63c47bf1bc..4cf3a0eb75 100644
--- a/drivers/video/sunxi/lcdc.c
+++ b/drivers/video/sunxi/lcdc.c
@@ -211,11 +211,17 @@ void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const
lcdc,
void lcdc_pll_set(struct sunxi_ccm_reg *ccm, int tcon, int dotclock,
int *clk_div, int *clk_double, bool is_composite)
{
- int value, n, m, min_m, max_m, diff;
+ int value, n, m, min_m, max_m, diff, step;
int best_n = 0, best_m = 0, best_diff = 0x0FFF;
int best_double = 0;
bool use_mipi_pll = false;
+#ifdef CONFIG_SUNXI_DE2
+ step = 6000;
+#else
+ step = 3000;
+#endif
+
if (tcon == 0) {
#if defined(CONFIG_VIDEO_LCD_IF_PARALLEL) || defined(CONFIG_SUNXI_DE2)
min_m = 6;
@@ -237,10 +243,10 @@ void lcdc_pll_set(struct sunxi_ccm_reg *ccm, int tcon,
int dotclock,
*/
for (m = min_m; m <= max_m; m++) {
#ifndef CONFIG_SUNXI_DE2
- n = (m * dotclock) / 3000;
+ n = (m * dotclock) / step;
if ((n >= 9) && (n <= 127)) {
- value = (3000 * n) / m;
+ value = (step * n) / m;
diff = dotclock - value;
if (diff < best_diff) {
best_diff = diff;
@@ -256,9 +262,9 @@ void lcdc_pll_set(struct sunxi_ccm_reg *ccm, int tcon, int
dotclock,
#endif
/* No double clock on DE2 */
- n = (m * dotclock) / 6000;
+ n = (m * dotclock) / (step * 2);
if ((n >= 9) && (n <= 127)) {
- value = (6000 * n) / m;
+ value = (step * 2 * n) / m;
diff = dotclock - value;
if (diff < best_diff) {
best_diff = diff;
@@ -287,11 +293,11 @@ void lcdc_pll_set(struct sunxi_ccm_reg *ccm, int tcon,
int dotclock,
} else
#endif
{
- clock_set_pll3(best_n * 300);
- debug("dotclock: %dkHz = %dkHz: (%d * 3MHz * %d) / %d\n",
+ clock_set_pll3(best_n * step * 1000);
+ debug("dotclock: %dkHz = %dkHz: (%d * %dkHz * %d) / %d\n",
dotclock,
(best_double + 1) * clock_get_pll3() / best_m / 1000,
- best_double + 1, best_n, best_m);
+ best_double + 1, step, best_n, best_m);
}
if (tcon == 0) {
--
2.19.1
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[U-Boot] [PATCH v4 4/5] sun50i: A64: add support for R_I2C controller
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/Kconfig| 1 +
board/sunxi/board.c| 6 ++
3 files changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 6a5eafc3d3..2daf23f6f5 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -211,6 +211,7 @@ enum sunxi_gpio_number {
#define SUN8I_H3_GPL_R_TWI 2
#define SUN8I_A23_GPL_R_TWI3
#define SUN8I_GPL_R_UART 2
+#define SUN50I_GPL_R_TWI 2
#define SUN9I_GPN_R_RSB3
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 686f38fec4..7ba429c744 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -272,6 +272,7 @@ config MACH_SUN50I
select ARM64
select DM_I2C
select PHY_SUN4I_USB
+ select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index d1d7f9f400..90f8bc0a6e 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -168,10 +168,16 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_R_I2C_ENABLE
+#ifdef CONFIG_MACH_SUN50I
+ clock_twi_onoff(5, 1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
+#else
clock_twi_onoff(5, 1);
sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
#endif
+#endif
}
#if defined(CONFIG_ENV_IS_IN_MMC) && defined(CONFIG_ENV_IS_IN_FAT)
--
2.19.1
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[U-Boot] [PATCH v4 5/5] sunxi: DT: add support for Pinebook
Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
bridge from Analogix.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 +
arch/arm/dts/sun50i-a64-pinebook.dts | 294 +++
configs/pinebook_defconfig | 22 ++
4 files changed, 332 insertions(+)
create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts
create mode 100644 configs/pinebook_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0de6234eec..94ec15a8ac 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -405,6 +405,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb \
+ sun50i-a64-pinebook.dtb \
sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
diff --git a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
new file mode 100644
index 00..a99b7171d0
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Vasily Khoruzhick
+ *
+ */
+
+/* The ANX6345 eDP-bridge is on r_i2c */
+_i2c {
+ anx6345: edp-bridge@38 {
+ compatible = "analogix,anx6345";
+ reg = <0x38>;
+ reset-gpios = < 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+ status = "okay";
+ };
+};
diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
b/arch/arm/dts/sun50i-a64-pinebook.dts
new file mode 100644
index 00..ec537c5297
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2017 Icenowy Zheng
+ * Copyright (C) 2018 Vasily Khoruzhick
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include
+#include
+#include
+
+/ {
+ model = "Pinebook";
+ compatible = "pine64,pinebook", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 =
+ ethernet0 =
+ };
+
+ vdd_bl: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "bl-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ gpio = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ enable-active-high;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = < 0 5 0>;
+ brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
+ default-brightness-level = <2>;
+ enable-gpios = < 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+ power-supply = <_bl>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+
+ framebuffer-lcd {
+ panel-supply = <_dc1sw>;
+ dvdd25-supply = <_dldo2>;
+ dvdd12-supply = <_fldo1>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ lid_switch {
+ label = "Lid Switch";
+ gpios = <_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
+ linux,input-type = ;
+ linux,code = ;
+ linux,can-disable;
+ wakeup-source;
+ };
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+ {
+ phys = < 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dcdc1>;
+ cd-gpios = < 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dldo4>;
+ vqmmc-suppl
[U-Boot] [PATCH v4 3/5] sunxi: DT: A64: update device tree files for Allwinner A64 SoC
Updates the device tree files from the linux-next tree,
exactly Linux commit:
commit 8c60c36d0b8c (tag: next-20181019)
Author: Stephen Rothwell
Date: Fri Oct 19 18:13:43 2018 +1100
Add linux-next specific files for 20181019
Signed-off-by: Stephen Rothwell
Signed-off-by: Vasily Khoruzhick
Cc: Vagrant Cascadian
---
arch/arm/dts/sun50i-a64-amarula-relic.dts| 168 +-
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 34 +-
arch/arm/dts/sun50i-a64-nanopi-a64.dts | 89 +-
arch/arm/dts/sun50i-a64-olinuxino.dts| 103 +-
arch/arm/dts/sun50i-a64-orangepi-win.dts | 179 ++-
arch/arm/dts/sun50i-a64-pine64.dts | 32 +-
arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 32 +-
arch/arm/dts/sun50i-a64-sopine.dtsi | 15 +
arch/arm/dts/sun50i-a64.dtsi | 313 +--
9 files changed, 920 insertions(+), 45 deletions(-)
diff --git a/arch/arm/dts/sun50i-a64-amarula-relic.dts
b/arch/arm/dts/sun50i-a64-amarula-relic.dts
index f3b4e93ece..6cb2b7f0c8 100644
--- a/arch/arm/dts/sun50i-a64-amarula-relic.dts
+++ b/arch/arm/dts/sun50i-a64-amarula-relic.dts
@@ -22,11 +22,11 @@
stdout-path = "serial0:115200n8";
};
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
};
};
@@ -34,10 +34,34 @@
status = "okay";
};
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dcdc1>;
+ /*
+* Schematic shows both dldo4 and eldo1 connected for vcc-io-wifi, but
+* dldo4 connection shows DNP(Do Not Populate) and eldo1 connected with
+* 0Ohm register to vcc-io-wifi so eldo1 is used.
+*/
+ vqmmc-supply = <_eldo1>;
+ mmc-pwrseq = <_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins>;
- vmmc-supply = <_vcc3v3>;
+ vmmc-supply = <_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
@@ -48,9 +72,138 @@
status = "okay";
};
+_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <280>;
+ regulator-max-microvolt = <280>;
+ regulator-name = "avdd-csi";
+};
+
+_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-name = "vcc-pl";
+};
+
+_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <300>;
+ regulator-max-microvolt = <300>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-name = "vcc-3v3";
+};
+
+_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <104>;
+ regulator-max-microvolt = <130>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <150>;
+ regulator-name = "vcc-dram";
+};
+
+_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <110>;
+ regulator-name = "vdd-sys";
+};
+
+_dldo1 {
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-name = "vcc-hdmi-dsi-sensor";
+};
+
+_dl
[U-Boot] [PATCH v4 1/5] mmc: sunxi: add support for automatic delay calibration
A64 and H6 support automatic delay calibration and Linux driver uses it
instead of hardcoded delays. Add support for it to u-boot driver.
Fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Reviewed-by: Andre Przywara
Cc: Vagrant Cascadian
---
arch/arm/include/asm/arch-sunxi/mmc.h | 6 +-
drivers/mmc/sunxi_mmc.c | 21 -
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index d98c53faaa..f2deafddd2 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -46,7 +46,9 @@ struct sunxi_mmc {
u32 cbda; /* 0x94 */
u32 res2[26];
#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
- u32 res3[64];
+ u32 res3[17];
+ u32 samp_dl;
+ u32 res4[46];
#endif
u32 fifo; /* 0x100 / 0x200 FIFO access address */
};
@@ -130,5 +132,7 @@ struct sunxi_mmc {
#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16)
#define SUNXI_MMC_COMMON_RESET (1 << 18)
+#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7)
+
struct mmc *sunxi_mmc_init(int sdc_no);
#endif /* _SUNXI_MMC_H */
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 39f15eb423..147eb9b4d5 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -99,11 +99,16 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
{
unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
bool new_mode = false;
+ bool calibrate = false;
u32 val = 0;
if (IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && (priv->mmc_no == 2))
new_mode = true;
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
+ calibrate = true;
+#endif
+
/*
* The MMC clock has an extra /2 post-divider when operating in the new
* mode.
@@ -174,7 +179,11 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
val = CCM_MMC_CTRL_MODE_SEL_NEW;
setbits_le32(>reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
#endif
- } else {
+ } else if (!calibrate) {
+ /*
+* Use hardcoded delay values if controller doesn't support
+* calibration
+*/
val = CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
CCM_MMC_CTRL_SCLK_DLY(sclk_dly);
}
@@ -228,6 +237,16 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv,
struct mmc *mmc)
rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
writel(rval, >reg->clkcr);
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
+ /* A64 supports calibration of delays on MMC controller and we
+* have to set delay of zero before starting calibration.
+* Allwinner BSP driver sets a delay only in the case of
+* using HS400 which is not supported by mainline U-Boot or
+* Linux at the moment
+*/
+ writel(SUNXI_MMC_CAL_DL_SW_EN, >reg->samp_dl);
+#endif
+
/* Re-enable Clock */
rval |= SUNXI_MMC_CLK_ENABLE;
writel(rval, >reg->clkcr);
--
2.19.1
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[U-Boot] [PATCH v4 2/5] dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
Both GPIOs are optional, so we shouldn't fail if any is missing.
Without this fix reset is not deasserted if sleep GPIO is missing.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Reviewed-by: Andre Przywara
Cc: Vagrant Cascadian
---
drivers/video/bridge/video-bridge-uclass.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/video/bridge/video-bridge-uclass.c
b/drivers/video/bridge/video-bridge-uclass.c
index cd4959cc71..5fecb4cfd5 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -106,13 +106,19 @@ static int video_bridge_pre_probe(struct udevice *dev)
int video_bridge_set_active(struct udevice *dev, bool active)
{
struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
- int ret;
+ int ret = 0;
debug("%s: %d\n", __func__, active);
- ret = dm_gpio_set_value(_priv->sleep, !active);
- if (ret)
- return ret;
- if (active) {
+ if (uc_priv->sleep.dev) {
+ ret = dm_gpio_set_value(_priv->sleep, !active);
+ if (ret)
+ return ret;
+ }
+
+ if (!active)
+ return 0;
+
+ if (uc_priv->reset.dev) {
ret = dm_gpio_set_value(_priv->reset, true);
if (ret)
return ret;
--
2.19.1
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[U-Boot] [PATCH v4 0/5] Add support for Pinebook
This series adds support for the Pinebook, an allwinner A64 laptop produced by Pine64. It also syncs sun50i-a64.dtsi with linux, adds support for mmc delay calibration, R_I2C controller, and addresses the issue with activating video bridge when any of GPIOs is missing. v2: - sync sun50i-a64.dtsi with linux instead of adding missing nodes - take sun50i-a64-pinebook.dts from linux - don't introduce new Kconfig for A64 MMC calibration - improve code in video bridge uclass to check for presensce of GPIO instead of ingoring EINVAL errors v3: - enable calibration for H6 as well - init ret variable in video_bridge_set_active() - fix order of dts files Makefile - split anx6345 binding into sun50i-a64-pinebook-u-boot.dts - drop speaker_amp node from pinebook dts - drop unnecessary options from defconfig v4: - sync device tree files with linux-next Vasily Khoruzhick (5): mmc: sunxi: add support for automatic delay calibration dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing sunxi: DT: A64: update device tree files for Allwinner A64 SoC sun50i: A64: add support for R_I2C controller sunxi: DT: add support for Pinebook arch/arm/dts/Makefile| 1 + arch/arm/dts/sun50i-a64-amarula-relic.dts| 168 +- arch/arm/dts/sun50i-a64-bananapi-m64.dts | 34 +- arch/arm/dts/sun50i-a64-nanopi-a64.dts | 89 +- arch/arm/dts/sun50i-a64-olinuxino.dts| 103 +- arch/arm/dts/sun50i-a64-orangepi-win.dts | 179 ++- arch/arm/dts/sun50i-a64-pine64.dts | 32 +- arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 + arch/arm/dts/sun50i-a64-pinebook.dts | 294 + arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 32 +- arch/arm/dts/sun50i-a64-sopine.dtsi | 15 + arch/arm/dts/sun50i-a64.dtsi | 313 +-- arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/mmc.h| 6 +- arch/arm/mach-sunxi/Kconfig | 1 + board/sunxi/board.c | 6 + configs/pinebook_defconfig | 22 ++ drivers/mmc/sunxi_mmc.c | 21 +- drivers/video/bridge/video-bridge-uclass.c | 16 +- 19 files changed, 1296 insertions(+), 52 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts create mode 100644 configs/pinebook_defconfig -- 2.19.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] pwm: sunxi: choose best prescaler to improve PWM resolution
I think this series already went into Anatolij's u-boot-staging/ag...@denx.de, please make sure that you don't introduce any conflicts.On Wed, Oct 24, 2018 at 9:28 AM Jagan Teki wrote: > > On Wed, Oct 17, 2018 at 10:28 AM Vasily Khoruzhick wrote: > > > > Choose best prescaler to improve PWM resolution. Without this change > > driver chooses first prescaler that gives us period value within > > range, but it could be not the best one. > > > > Signed-off-by: Vasily Khoruzhick > > --- > > Applied to all to u-boot-sunxi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] pwm: sunxi: choose best prescaler to improve PWM resolution
On Mon, Oct 22, 2018 at 11:29 AM Jagan Teki wrote: > > On Wed, Oct 17, 2018 at 10:28 AM Vasily Khoruzhick wrote: > > > > Choose best prescaler to improve PWM resolution. Without this change > > driver chooses first prescaler that gives us period value within > > range, but it could be not the best one. > > This commit need to elaborate about the real issue, ie got fixed. > Understand it has chosen best prescaler but why and how it. If PWM resolution is low then close backlight levels can result in the same PWM settings, i.e. 0% and 10% can be the same (and thus backlight remains powered off). Basically the patch does what comment says - it improves PWM resolution. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 3/5] sunxi: DT: A64: update device tree file for Allwinner A64 SoC
Updates the device tree file from the the Linux tree as of v4.19-rc4,
exactly Linux commit:
commit 7876320f8880 (tag: v4.19-rc4)
Author: Linus Torvalds
Date: Sun Sep 16 11:52:37 2018 -0700
Linux 4.19-rc4
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/dts/sun50i-a64.dtsi | 122 +--
1 file changed, 103 insertions(+), 19 deletions(-)
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 7a083637c4..d3daf90a87 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -43,9 +43,12 @@
*/
#include
+#include
#include
#include
#include
+#include
+#include
/ {
interrupt-parent = <>;
@@ -57,17 +60,21 @@
#size-cells = <1>;
ranges;
-/*
- * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU.
- * However there is no support for this clock on A64 yet, so we depend
- * on the upstream clocks here to keep them (and thus CLK_MIXER0) up.
- */
simplefb_lcd: framebuffer-lcd {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "mixer0-lcd0";
clocks = < CLK_TCON0>,
-< CLK_DE>, < CLK_BUS_DE>;
+<_clocks CLK_MIXER0>;
+ status = "disabled";
+ };
+
+ simplefb_hdmi: framebuffer-hdmi {
+ compatible = "allwinner,simple-framebuffer",
+"simple-framebuffer";
+ allwinner,pipeline = "mixer1-lcd1-hdmi";
+ clocks = <_clocks CLK_MIXER1>,
+< CLK_TCON1>, < CLK_HDMI>;
status = "disabled";
};
};
@@ -168,10 +175,46 @@
#size-cells = <1>;
ranges;
+ de2@100 {
+ compatible = "allwinner,sun50i-a64-de2";
+ reg = <0x100 0x40>;
+ allwinner,sram = <_sram 1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x100 0x40>;
+
+ display_clocks: clock@0 {
+ compatible = "allwinner,sun50i-a64-de2-clk";
+ reg = <0x0 0x10>;
+ clocks = < CLK_DE>,
+< CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = < RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+ };
+
syscon: syscon@1c0 {
- compatible = "allwinner,sun50i-a64-system-controller",
- "syscon";
+ compatible = "allwinner,sun50i-a64-system-control";
reg = <0x01c0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c: sram@18000 {
+ compatible = "mmio-sram";
+ reg = <0x00018000 0x28000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00018000 0x28000>;
+
+ de2_sram: sram-section@0 {
+ compatible =
"allwinner,sun50i-a64-sram-c";
+ reg = <0x 0x28000>;
+ };
+ };
};
dma: dma-controller@1c02000 {
@@ -364,6 +407,11 @@
bias-pull-up;
};
+ pwm_pin: pwm_pin {
+ pins = "PD22";
+ function = "pwm";
+ };
+
rmii_pins: rmii_pins {
pins = "PD10", "PD11", "PD13", "PD14", "PD17",
"PD18", "PD19", "PD20
[U-Boot] [PATCH v3 2/5] dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
Both GPIOs are optional, so we shouldn't fail if any is missing.
Without this fix reset is not deasserted if sleep GPIO is missing.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
drivers/video/bridge/video-bridge-uclass.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/video/bridge/video-bridge-uclass.c
b/drivers/video/bridge/video-bridge-uclass.c
index cd4959cc71..5fecb4cfd5 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -106,13 +106,19 @@ static int video_bridge_pre_probe(struct udevice *dev)
int video_bridge_set_active(struct udevice *dev, bool active)
{
struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
- int ret;
+ int ret = 0;
debug("%s: %d\n", __func__, active);
- ret = dm_gpio_set_value(_priv->sleep, !active);
- if (ret)
- return ret;
- if (active) {
+ if (uc_priv->sleep.dev) {
+ ret = dm_gpio_set_value(_priv->sleep, !active);
+ if (ret)
+ return ret;
+ }
+
+ if (!active)
+ return 0;
+
+ if (uc_priv->reset.dev) {
ret = dm_gpio_set_value(_priv->reset, true);
if (ret)
return ret;
--
2.19.0
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[U-Boot] [PATCH v3 4/5] sun50i: A64: add support for R_I2C controller
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/Kconfig| 1 +
board/sunxi/board.c| 6 ++
3 files changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 6a5eafc3d3..2daf23f6f5 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -211,6 +211,7 @@ enum sunxi_gpio_number {
#define SUN8I_H3_GPL_R_TWI 2
#define SUN8I_A23_GPL_R_TWI3
#define SUN8I_GPL_R_UART 2
+#define SUN50I_GPL_R_TWI 2
#define SUN9I_GPN_R_RSB3
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 686f38fec4..7ba429c744 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -272,6 +272,7 @@ config MACH_SUN50I
select ARM64
select DM_I2C
select PHY_SUN4I_USB
+ select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index d1d7f9f400..90f8bc0a6e 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -168,10 +168,16 @@ void i2c_init_board(void)
#endif
#ifdef CONFIG_R_I2C_ENABLE
+#ifdef CONFIG_MACH_SUN50I
+ clock_twi_onoff(5, 1);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
+#else
clock_twi_onoff(5, 1);
sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
#endif
+#endif
}
#if defined(CONFIG_ENV_IS_IN_MMC) && defined(CONFIG_ENV_IS_IN_FAT)
--
2.19.0
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[U-Boot] [PATCH v3 5/5] sunxi: DT: add support for Pinebook
Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
bridge from Analogix.
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 +
arch/arm/dts/sun50i-a64-pinebook.dts | 294 +++
configs/pinebook_defconfig | 22 ++
4 files changed, 332 insertions(+)
create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts
create mode 100644 configs/pinebook_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dfe9335a04..6b8ee81059 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -404,6 +404,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb \
+ sun50i-a64-pinebook.dtb \
sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
diff --git a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
new file mode 100644
index 00..a99b7171d0
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Vasily Khoruzhick
+ *
+ */
+
+/* The ANX6345 eDP-bridge is on r_i2c */
+_i2c {
+ anx6345: edp-bridge@38 {
+ compatible = "analogix,anx6345";
+ reg = <0x38>;
+ reset-gpios = < 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+ status = "okay";
+ };
+};
diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
b/arch/arm/dts/sun50i-a64-pinebook.dts
new file mode 100644
index 00..a3b0526ef6
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2017 Icenowy Zheng
+ * Copyright (C) 2018 Vasily Khoruzhick
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include
+#include
+#include
+
+/ {
+ model = "Pinebook";
+ compatible = "pine64,pinebook", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 =
+ ethernet0 =
+ };
+
+ vdd_bl: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "bl-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ gpio = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ enable-active-high;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = < 0 5 0>;
+ brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
+ default-brightness-level = <2>;
+ enable-gpios = < 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+ power-supply = <_bl>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+
+ framebuffer-lcd {
+ panel-supply = <_dc1sw>;
+ dvdd25-supply = <_dldo2>;
+ dvdd12-supply = <_fldo1>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ lid_switch {
+ label = "Lid Switch";
+ gpios = <_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
+ linux,input-type = ;
+ linux,code = ;
+ linux,can-disable;
+ wakeup-source;
+ };
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+ {
+ phys = < 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dcdc1>;
+ cd-gpios = < 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dldo4>;
+ vqmmc
[U-Boot] [PATCH v3 1/5] mmc: sunxi: add support for automatic delay calibration
A64 and H6 support automatic delay calibration and Linux driver uses it
instead of hardcoded delays. Add support for it to u-boot driver.
Fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick
Acked-by: Maxime Ripard
Tested-by: Maxime Ripard
Cc: Vagrant Cascadian
---
arch/arm/include/asm/arch-sunxi/mmc.h | 6 +-
drivers/mmc/sunxi_mmc.c | 21 -
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index d98c53faaa..f2deafddd2 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -46,7 +46,9 @@ struct sunxi_mmc {
u32 cbda; /* 0x94 */
u32 res2[26];
#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
- u32 res3[64];
+ u32 res3[17];
+ u32 samp_dl;
+ u32 res4[46];
#endif
u32 fifo; /* 0x100 / 0x200 FIFO access address */
};
@@ -130,5 +132,7 @@ struct sunxi_mmc {
#define SUNXI_MMC_COMMON_CLK_GATE (1 << 16)
#define SUNXI_MMC_COMMON_RESET (1 << 18)
+#define SUNXI_MMC_CAL_DL_SW_EN (0x1 << 7)
+
struct mmc *sunxi_mmc_init(int sdc_no);
#endif /* _SUNXI_MMC_H */
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 39f15eb423..147eb9b4d5 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -99,11 +99,16 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
{
unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
bool new_mode = false;
+ bool calibrate = false;
u32 val = 0;
if (IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && (priv->mmc_no == 2))
new_mode = true;
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
+ calibrate = true;
+#endif
+
/*
* The MMC clock has an extra /2 post-divider when operating in the new
* mode.
@@ -174,7 +179,11 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv,
unsigned int hz)
val = CCM_MMC_CTRL_MODE_SEL_NEW;
setbits_le32(>reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
#endif
- } else {
+ } else if (!calibrate) {
+ /*
+* Use hardcoded delay values if controller doesn't support
+* calibration
+*/
val = CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
CCM_MMC_CTRL_SCLK_DLY(sclk_dly);
}
@@ -228,6 +237,16 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv,
struct mmc *mmc)
rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
writel(rval, >reg->clkcr);
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H6)
+ /* A64 supports calibration of delays on MMC controller and we
+* have to set delay of zero before starting calibration.
+* Allwinner BSP driver sets a delay only in the case of
+* using HS400 which is not supported by mainline U-Boot or
+* Linux at the moment
+*/
+ writel(SUNXI_MMC_CAL_DL_SW_EN, >reg->samp_dl);
+#endif
+
/* Re-enable Clock */
rval |= SUNXI_MMC_CLK_ENABLE;
writel(rval, >reg->clkcr);
--
2.19.0
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 0/5] Add support for Pinebook
This series adds support for the Pinebook, an allwinner A64 laptop produced by Pine64. It also syncs sun50i-a64.dtsi with linux, adds support for mmc delay calibration, R_I2C controller, and addresses the issue with activating video bridge when any of GPIOs is missing. v2: - sync sun50i-a64.dtsi with linux instead of adding missing nodes - take sun50i-a64-pinebook.dts from linux - don't introduce new Kconfig for A64 MMC calibration - improve code in video bridge uclass to check for presensce of GPIO instead of ingoring EINVAL errors v3: - enable calibration for H6 as well - init ret variable in video_bridge_set_active() - fix order of dts files Makefile - split anx6345 binding into sun50i-a64-pinebook-u-boot.dts - drop speaker_amp node from pinebook dts - drop unnecessary options from defconfig Vasily Khoruzhick (5): mmc: sunxi: add support for automatic delay calibration dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing sunxi: DT: A64: update device tree file for Allwinner A64 SoC sun50i: A64: add support for R_I2C controller sunxi: DT: add support for Pinebook arch/arm/dts/Makefile| 1 + arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi | 15 + arch/arm/dts/sun50i-a64-pinebook.dts | 294 +++ arch/arm/dts/sun50i-a64.dtsi | 122 ++-- arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/mmc.h| 6 +- arch/arm/mach-sunxi/Kconfig | 1 + board/sunxi/board.c | 6 + configs/pinebook_defconfig | 22 ++ drivers/mmc/sunxi_mmc.c | 21 +- drivers/video/bridge/video-bridge-uclass.c | 16 +- 11 files changed, 479 insertions(+), 26 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts create mode 100644 configs/pinebook_defconfig -- 2.19.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/5] sunxi: DT: add support for Pinebook
On Wednesday, October 17, 2018 5:23:04 PM PDT André Przywara wrote:
> On 10/17/18 6:09 AM, Vasily Khoruzhick wrote:
>
> Hi,
>
> > Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
> > USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
> > bridge from Analogix.
> >
> > Signed-off-by: Vasily Khoruzhick
> > ---
> >
> > arch/arm/dts/Makefile| 3 +-
> > arch/arm/dts/sun50i-a64-pinebook.dts | 306 +++
> > configs/pinebook_defconfig | 27 +++
> > 3 files changed, 335 insertions(+), 1 deletion(-)
> > create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts
> > create mode 100644 configs/pinebook_defconfig
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index dfe9335a04..ccb93f1e46 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -404,7 +404,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
> >
> > sun50i-a64-orangepi-win.dtb \
> > sun50i-a64-pine64-plus.dtb \
> > sun50i-a64-pine64.dtb \
> >
> > - sun50i-a64-sopine-baseboard.dtb
> > + sun50i-a64-sopine-baseboard.dtb \
> > + sun50i-a64-pinebook.dtb
> >
> > dtb-$(CONFIG_MACH_SUN9I) += \
> >
> > sun9i-a80-optimus.dtb \
> > sun9i-a80-cubieboard4.dtb \
> >
> > diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
> > b/arch/arm/dts/sun50i-a64-pinebook.dts new file mode 100644
> > index 00..5d111fab64
> > --- /dev/null
> > +++ b/arch/arm/dts/sun50i-a64-pinebook.dts
> > @@ -0,0 +1,306 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (C) 2017 Icenowy Zheng
> > + * Copyright (C) 2018 Vasily Khoruzhick
> > + *
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "sun50i-a64.dtsi"
> > +
> > +#include
> > +#include
> > +#include
> > +
> > +/ {
> > + model = "Pinebook";
> > + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
> > +
> > + aliases {
> > + serial0 =
> > + ethernet0 =
> > + };
> > +
> > + vdd_bl: regulator@0 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "bl-3v3";
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + gpio = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
> > + enable-active-high;
> > + };
> > +
> > + backlight: backlight {
> > + compatible = "pwm-backlight";
> > + pwms = < 0 5 0>;
> > + brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
> > + default-brightness-level = <2>;
> > + enable-gpios = < 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
> > + power-supply = <_bl>;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > +
> > + framebuffer-lcd {
> > + panel-supply = <_dc1sw>;
> > + dvdd25-supply = <_dldo2>;
> > + dvdd12-supply = <_fldo1>;
> > + };
> > + };
> > +
> > + gpio_keys {
> > + compatible = "gpio-keys";
> > +
> > + lid_switch {
> > + label = "Lid Switch";
> > + gpios = <_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
> > + linux,input-type = ;
> > + linux,code = ;
> > + linux,can-disable;
> > + wakeup-source;
> > + };
> > + };
> > +
> > + reg_vcc3v3: vcc3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc3v3";
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + };
> > +
> > + wifi_pwrseq: wifi_pwrseq {
> > + compatible = "mmc-pwrseq-simple";
> > + reset-gpios = <_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
> > + };
> > +
> > + speaker_amp: speaker_amp {
> > + compatible = "simple-audio-amplifier";
> > + enable-gpios = < 7 7 GPIO_ACTIVE_HIGH>;
> > + };
>
> I see that this is the only sound related node not
Re: [U-Boot] [PATCH v2 3/5] sunxi: DT: A64: update device tree file for Allwinner A64 SoC
On Wed, Oct 17, 2018 at 9:54 AM Andre Przywara wrote: > > On Wed, 17 Oct 2018 17:29:58 +0200 > Maxime Ripard wrote: > > Hi, > > > On Wed, Oct 17, 2018 at 04:18:41PM +0100, Andre Przywara wrote: > > > On Tue, 16 Oct 2018 22:09:30 -0700 > > > Vasily Khoruzhick wrote: > > > > > > Hi, > > > > > > > Updates the device tree file from the the Linux tree as of > > > > v4.19-rc4, exactly Linux commit: > > > > > > Does this work easily without syncing the .dts files as well? > > > > > > > commit 7876320f8880 (tag: v4.19-rc4) > > > > Author: Linus Torvalds > > > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > > > > > Linux 4.19-rc4 > > > > > > So this sounds like the right thing to do, but in this particular > > > case breaks Ethernet with UEFI booting in all distribution > > > installers or kernels out there (except >= Linux 4.19-rc1). > > > I consider this a major use case of U-Boot's DTB, so what do we do > > > about this? > > > The reason is that we dropped the "syscon" compatible string at the > > > end of the system-controller node, which older kernels rely on to > > > find the syscon node. > > > I suggested to re-add this[1], but didn't have much success, > > > unfortunately. > > > The easiest would be to re-add (or not remove) "syscon" for U-Boot's > > > copy, but this would mean a deviation from the Linux DT's. I am fine > > > with this, but would like to hear more opinions. > > > > tl; dr: You want to build something robust on top of assumptions that > > have never been guaranteed. > > I just find it sad that "we do not guarantee" translates into "we > actually don't even try". My understanding of your concern is that you > can't rule this breakage out forever, which I can understand. > But if it is possible to avoid breaking compatibility, I believe we > should try this, on a case-by-case base. > We have been pretty good so far (leaving alone the MMC regulator > breakage in v4.15, but A64 support was quite basic before that anyway). > > > I'm fine with having it as a U-Boot > > addition, if it's what it takes. > > Sounds good to me! Thanks! > > I will check what's the easiest path to get the 4.20 DTs into U-Boot, > considering a stopover at the Pinebook DTs, and send patches ASAP. So do you want me to wait for you to submit a patch that syncs sun50i-a64.dtsi? > > Cheers, > Andre. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/5] sunxi: DT: A64: update device tree file for Allwinner A64 SoC
On Wednesday, October 17, 2018 8:18:41 AM PDT Andre Przywara wrote:
> On Tue, 16 Oct 2018 22:09:30 -0700
> Vasily Khoruzhick wrote:
>
> Hi,
>
> > Updates the device tree file from the the Linux tree as of v4.19-rc4,
>
> > exactly Linux commit:
> Does this work easily without syncing the .dts files as well?
Well, we need r_i2c node from upstream. Jernej also wants HDMI nodes.
Easiest way to do that is to sync this file.
>
> > commit 7876320f8880 (tag: v4.19-rc4)
> > Author: Linus Torvalds
> > Date: Sun Sep 16 11:52:37 2018 -0700
> >
> > Linux 4.19-rc4
>
> So this sounds like the right thing to do, but in this particular case
> breaks Ethernet with UEFI booting in all distribution installers or
> kernels out there (except >= Linux 4.19-rc1).
> I consider this a major use case of U-Boot's DTB, so what do we do
> about this?
> The reason is that we dropped the "syscon" compatible string at the end
> of the system-controller node, which older kernels rely on to find the
> syscon node.
> I suggested to re-add this[1], but didn't have much success,
> unfortunately.
> The easiest would be to re-add (or not remove) "syscon" for U-Boot's
> copy, but this would mean a deviation from the Linux DT's. I am fine
> with this, but would like to hear more opinions.
Can you do it with a separate patch once this one merges? I have no way to
test UEFI and updating sun50i-a64.dtsi doesn't break anything for me.
> Cheers,
> Andre.
>
> [1]
> http://lists.infradead.org/pipermail/linux-arm-kernel/2018-September/602153.
> html
> > Signed-off-by: Vasily Khoruzhick
> > ---
> >
> > arch/arm/dts/sun50i-a64.dtsi | 122
> >
> > +-- 1 file changed, 103
> > insertions(+), 19 deletions(-)
> >
> > diff --git a/arch/arm/dts/sun50i-a64.dtsi
> > b/arch/arm/dts/sun50i-a64.dtsi index 7a083637c4..d3daf90a87 100644
> > --- a/arch/arm/dts/sun50i-a64.dtsi
> > +++ b/arch/arm/dts/sun50i-a64.dtsi
> > @@ -43,9 +43,12 @@
> >
> > */
> >
> > #include
> >
> > +#include
> >
> > #include
> > #include
> > #include
> >
> > +#include
> > +#include
> >
> > / {
> >
> > interrupt-parent = <>;
> >
> > @@ -57,17 +60,21 @@
> >
> > #size-cells = <1>;
> > ranges;
> >
> > -/*
> > - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU.
> > - * However there is no support for this clock on A64 yet, so we
> > depend
> > - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up.
> > - */
> >
> > simplefb_lcd: framebuffer-lcd {
> >
> > compatible = "allwinner,simple-framebuffer",
> >
> > "simple-framebuffer";
> >
> > allwinner,pipeline = "mixer0-lcd0";
> > clocks = < CLK_TCON0>,
> >
> > -< CLK_DE>, < CLK_BUS_DE>;
> > +<_clocks CLK_MIXER0>;
> > + status = "disabled";
> > + };
> > +
> > + simplefb_hdmi: framebuffer-hdmi {
> > + compatible = "allwinner,simple-framebuffer",
> > +"simple-framebuffer";
> > + allwinner,pipeline = "mixer1-lcd1-hdmi";
> > + clocks = <_clocks CLK_MIXER1>,
> > +< CLK_TCON1>, < CLK_HDMI>;
> >
> > status = "disabled";
> >
> > };
> >
> > };
> >
> > @@ -168,10 +175,46 @@
> >
> > #size-cells = <1>;
> > ranges;
> >
> > + de2@100 {
> > + compatible = "allwinner,sun50i-a64-de2";
> > + reg = <0x100 0x40>;
> > + allwinner,sram = <_sram 1>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0x100 0x40>;
> > +
> > + display_clocks: clock@0 {
> > + compatible =
> > "allwinner,sun50i-a64-de2-clk";
> > +
Re: [U-Boot] [PATCH v2 5/5] sunxi: DT: add support for Pinebook
On Wednesday, October 17, 2018 8:22:51 AM PDT Jernej Škrabec wrote:
> Hi!
>
> Dne sreda, 17. oktober 2018 ob 17:13:42 CEST je Vasily Khoruzhick
napisal(a):
> > On Tuesday, October 16, 2018 10:09:32 PM PDT Vasily Khoruzhick wrote:
> > > Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
> > > USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
> > > bridge from Analogix.
> > >
> > > Signed-off-by: Vasily Khoruzhick
> >
> > +CC Jernej
> >
> > > ---
> > >
> > > arch/arm/dts/Makefile| 3 +-
> > > arch/arm/dts/sun50i-a64-pinebook.dts | 306 +++
> > > configs/pinebook_defconfig | 27 +++
> > > 3 files changed, 335 insertions(+), 1 deletion(-)
> > > create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts
> > > create mode 100644 configs/pinebook_defconfig
> > >
> > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > > index dfe9335a04..ccb93f1e46 100644
> > > --- a/arch/arm/dts/Makefile
> > > +++ b/arch/arm/dts/Makefile
> > > @@ -404,7 +404,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
> > >
> > > sun50i-a64-orangepi-win.dtb \
> > > sun50i-a64-pine64-plus.dtb \
> > > sun50i-a64-pine64.dtb \
> > >
> > > - sun50i-a64-sopine-baseboard.dtb
> > > + sun50i-a64-sopine-baseboard.dtb \
> > > + sun50i-a64-pinebook.dtb
> > >
> > > dtb-$(CONFIG_MACH_SUN9I) += \
> > >
> > > sun9i-a80-optimus.dtb \
> > > sun9i-a80-cubieboard4.dtb \
> > >
> > > diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
> > > b/arch/arm/dts/sun50i-a64-pinebook.dts new file mode 100644
> > > index 00..5d111fab64
> > > --- /dev/null
> > > +++ b/arch/arm/dts/sun50i-a64-pinebook.dts
> > > @@ -0,0 +1,306 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright (C) 2017 Icenowy Zheng
> > > + * Copyright (C) 2018 Vasily Khoruzhick
> > > + *
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "sun50i-a64.dtsi"
> > > +
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +/ {
> > > + model = "Pinebook";
> > > + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
> > > +
> > > + aliases {
> > > + serial0 =
> > > + ethernet0 =
> > > + };
> > > +
> > > + vdd_bl: regulator@0 {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "bl-3v3";
> > > + regulator-min-microvolt = <330>;
> > > + regulator-max-microvolt = <330>;
> > > + gpio = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
> > > + enable-active-high;
> > > + };
> > > +
> > > + backlight: backlight {
> > > + compatible = "pwm-backlight";
> > > + pwms = < 0 5 0>;
> > > + brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
> > > + default-brightness-level = <2>;
> > > + enable-gpios = < 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
> > > + power-supply = <_bl>;
> > > + };
> > > +
> > > + chosen {
> > > + stdout-path = "serial0:115200n8";
> > > +
> > > + framebuffer-lcd {
> > > + panel-supply = <_dc1sw>;
> > > + dvdd25-supply = <_dldo2>;
> > > + dvdd12-supply = <_fldo1>;
> > > + };
> > > + };
> > > +
> > > + gpio_keys {
> > > + compatible = "gpio-keys";
> > > +
> > > + lid_switch {
> > > + label = "Lid Switch";
> > > + gpios = <_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
> > > + linux,input-type = ;
> > > + linux,code = ;
> > > + linux,can-disable;
> > > + wakeup-source;
> > > + };
> > > + };
> > > +
> > > + reg_vcc3v3: vcc3v3 {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "vcc3v3";
&
Re: [U-Boot] [PATCH v2 5/5] sunxi: DT: add support for Pinebook
On Tuesday, October 16, 2018 10:09:32 PM PDT Vasily Khoruzhick wrote:
> Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
> USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
> bridge from Analogix.
>
> Signed-off-by: Vasily Khoruzhick
+CC Jernej
> ---
> arch/arm/dts/Makefile| 3 +-
> arch/arm/dts/sun50i-a64-pinebook.dts | 306 +++
> configs/pinebook_defconfig | 27 +++
> 3 files changed, 335 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/sun50i-a64-pinebook.dts
> create mode 100644 configs/pinebook_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index dfe9335a04..ccb93f1e46 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -404,7 +404,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
> sun50i-a64-orangepi-win.dtb \
> sun50i-a64-pine64-plus.dtb \
> sun50i-a64-pine64.dtb \
> - sun50i-a64-sopine-baseboard.dtb
> + sun50i-a64-sopine-baseboard.dtb \
> + sun50i-a64-pinebook.dtb
> dtb-$(CONFIG_MACH_SUN9I) += \
> sun9i-a80-optimus.dtb \
> sun9i-a80-cubieboard4.dtb \
> diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
> b/arch/arm/dts/sun50i-a64-pinebook.dts new file mode 100644
> index 00..5d111fab64
> --- /dev/null
> +++ b/arch/arm/dts/sun50i-a64-pinebook.dts
> @@ -0,0 +1,306 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2017 Icenowy Zheng
> + * Copyright (C) 2018 Vasily Khoruzhick
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-a64.dtsi"
> +
> +#include
> +#include
> +#include
> +
> +/ {
> + model = "Pinebook";
> + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
> +
> + aliases {
> + serial0 =
> + ethernet0 =
> + };
> +
> + vdd_bl: regulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "bl-3v3";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + gpio = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
> + enable-active-high;
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = < 0 5 0>;
> + brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
> + default-brightness-level = <2>;
> + enable-gpios = < 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
> + power-supply = <_bl>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> +
> + framebuffer-lcd {
> + panel-supply = <_dc1sw>;
> + dvdd25-supply = <_dldo2>;
> + dvdd12-supply = <_fldo1>;
> + };
> + };
> +
> + gpio_keys {
> + compatible = "gpio-keys";
> +
> + lid_switch {
> + label = "Lid Switch";
> + gpios = <_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
> + linux,input-type = ;
> + linux,code = ;
> + linux,can-disable;
> + wakeup-source;
> + };
> + };
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
> + };
> +
> + speaker_amp: speaker_amp {
> + compatible = "simple-audio-amplifier";
> + enable-gpios = < 7 7 GPIO_ACTIVE_HIGH>;
> + };
> +};
> +
> + {
> + phys = < 0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins>;
> + vmmc-supply = <_dcdc1>;
> + cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> + disable-wp;
> + bus-width = <4>;
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins&g
