[U-Boot] [PATCH] video: bmp: check coordinates of bitmap
If the coordinates are bigger than the size of
the panel then errors appear when calculating axis alignment
and the copy of bitmap is done outside of framebuffer.
Signed-off-by: Yannick Fertré
---
drivers/video/video_bmp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
index 4af1fb4..74267f7 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
@@ -256,6 +256,19 @@ int video_bmp_display(struct udevice *dev, ulong
bmp_image, int x, int y,
return -EINVAL;
}
+ /* check if coordinates exceeds panel size */
+ if (pwidth < x && x != BMP_ALIGN_CENTER) {
+ printf("Error: Coordinate x %d is bigger than panel width %d\n",
+ (int)x, (int)pwidth);
+ return -EINVAL;
+ }
+
+ if (priv->ysize < y && y != BMP_ALIGN_CENTER) {
+ printf("Error: Coordinate y %d is bigger than panel height %d\n"
+ , (int)y, (int)priv->ysize);
+ return -EINVAL;
+ }
+
if (align) {
video_splash_align_axis(&x, priv->xsize, width);
video_splash_align_axis(&y, priv->ysize, height);
--
2.7.4
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[U-Boot] [PATCH v5 11/15] ARM: dts: stm32f769: add display for STM32F769 disco board
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f769-disco-u-boot.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 209a82c..c1d7d6b 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -28,10 +28,72 @@
button-gpio = <&gpioa 0 0>;
};
+ dsi_host: dsi_host {
+ compatible = "synopsys,dw-mipi-dsi";
+ status = "okay";
+ };
+
led1 {
compatible = "st,led1";
led-gpio = <&gpioj 5 0>;
};
+
+ panel: panel {
+ compatible = "orisetech,otm8009a";
+ reset-gpios = <&gpioj 15 1>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
+
+ soc {
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016C00 0x800>;
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+ u-boot,dm-pre-reloc;
+ status = "okay";
+
+ ports {
+ port@0 {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ port@1 {
+ dsi_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
+ };
+
+ ltdc: display-controller@40016800 {
+ compatible = "st,stm32-ltdc";
+ reg = <0x40016800 0x200>;
+ resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
+
+ status = "okay";
+ u-boot,dm-pre-reloc;
+
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+ };
+ };
};
&fmc {
--
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[U-Boot] [PATCH v5 14/15] stm32mp1: configs: update video
Update video configs to support bitmap 16bpp, 24bpp, 32bpp & RLE8. Signed-off-by: Yannick Fertré --- include/configs/stm32mp1.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 92660fe..988992b 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -83,6 +83,13 @@ #define CONFIG_SYS_MTDPARTS_RUNTIME #endif +#ifdef CONFIG_DM_VIDEO +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_BMP_16BPP +#define CONFIG_BMP_24BPP +#define CONFIG_BMP_32BPP +#endif + /*/ #ifdef CONFIG_DISTRO_DEFAULTS /*/ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 09/15] video: add support of panel RM68200
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 ++
drivers/video/Makefile | 1 +
drivers/video/raydium-rm68200.c | 351
3 files changed, 361 insertions(+)
create mode 100644 drivers/video/raydium-rm68200.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 5cc2d9f..805713c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -337,6 +337,15 @@ config VIDEO_LCD_ORISETECH_OTM8009A
Say Y here if you want to enable support for Orise Technology
otm8009a 480x800 dsi 2dl panel.
+config VIDEO_LCD_RAYDIUM_RM68200
+ bool "RM68200 DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Say Y here if you want to enable support for Raydium RM68200
+ 720x1280 DSI video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0dd8ea0..df7119d 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..91555e2
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,351 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This rm68200 panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR 0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1 0x00
+#define GOA_VSTV2 0x07
+#define GOA_VCLK1 0x0E
+#define GOA_VCLK2 0x17
+#define GOA_VCLK_OPT1 0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1 0x6D
+#define MCS_GOA_GPO2 0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP 0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN 0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+ struct udevice *reg;
+ struc
[U-Boot] [PATCH v5 10/15] board: Add STM32F769 SoC, discovery board support
Signed-off-by: Yannick Fertré --- configs/stm32f769-disco_defconfig | 63 +++ 1 file changed, 63 insertions(+) create mode 100644 configs/stm32f769-disco_defconfig diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig new file mode 100644 index 000..887e2d5 --- /dev/null +++ b/configs/stm32f769-disco_defconfig @@ -0,0 +1,63 @@ +CONFIG_ARM=y +CONFIG_STM32=y +CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_MALLOC_F_LEN=0xE00 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_STM32F7=y +CONFIG_TARGET_STM32F746_DISCO=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +# CONFIG_USE_BOOTCOMMAND is not set +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_TEXT_BASE=0x800 +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM_MMC=y +# CONFIG_SPL_DM_MMC is not set +CONFIG_ARM_PL180_MMCI=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_STM32_QSPI=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 15/15] stm32mp1: configs: add display devices
Add support of panels otm8009A, RM68200 & DSI controller. Limit resolution to 1280x800. Signed-off-by: Yannick Fertré --- configs/stm32mp15_basic_defconfig | 6 ++ configs/stm32mp15_optee_defconfig | 6 ++ configs/stm32mp15_trusted_defconfig | 6 ++ 3 files changed, 18 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index f6c68fe..c54feb0 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -124,4 +124,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=1280 +CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 177cbc7..491174f 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -109,4 +109,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=1280 +CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 71ad115..a8a7eec 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -108,4 +108,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=1280 +CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 12/15] ARM: dts: stm32mp1: add dsi host for stm32mp157c-ev1 board
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
index ec60486..af5945d 100644
--- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
@@ -14,6 +14,11 @@
spi0 = &qspi;
usb0 = &usbotg_hs;
};
+
+ dsi_host: dsi_host {
+ compatible = "synopsys,dw-mipi-dsi";
+ status = "okay";
+ };
};
&flash0 {
--
2.7.4
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[U-Boot] [PATCH v5 13/15] ARM: dts: stm32mp1: add dsi host for stm32mp157c-dk2 board
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
index 18ac1e3..cd9947f 100644
--- a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
@@ -5,6 +5,13 @@
#include "stm32mp157a-dk1-u-boot.dtsi"
+/ {
+ dsi_host: dsi_host {
+ compatible = "synopsys,dw-mipi-dsi";
+ status = "okay";
+ };
+};
+
&i2c1 {
hdmi-transmitter@39 {
reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
--
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[U-Boot] [PATCH v5 06/15] video: add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host bridge driver, based on the Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. Signed-off-by: Yannick Fertré --- drivers/video/Kconfig | 10 + drivers/video/Makefile | 1 + drivers/video/dw_mipi_dsi.c | 838 3 files changed, 849 insertions(+) create mode 100644 drivers/video/dw_mipi_dsi.c diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index cdaf616..fdcb03c 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -697,6 +697,16 @@ config VIDEO_DSI_HOST_SANDBOX a communication protocol between the host and the device (panel, bridge). +config VIDEO_DW_MIPI_DSI + bool + select VIDEO_MIPI_DSI + help + Enables the common driver code for the Synopsis Designware + MIPI DSI block found in SoCs from various vendors. + As this does not provide any functionality by itself (but + rather requires a SoC-specific glue driver to call it), it + can not be enabled from the configuration menu. + config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" help diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 07aaca9..0d35470 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o +obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o obj-$(CONFIG_VIDEO_EFI) += efi.o obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o obj-$(CONFIG_VIDEO_IPUV3) += imx/ diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c new file mode 100644 index 000..04b07e3 --- /dev/null +++ b/drivers/video/dw_mipi_dsi.c @@ -0,0 +1,838 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd + * Copyright (C) 2019, STMicroelectronics - All Rights Reserved + * Author(s): Philippe Cornu for STMicroelectronics. + *Yannick Fertre for STMicroelectronics. + * + * This generic Synopsys DesignWare MIPI DSI host driver is inspired from + * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HWVER_131 0x31333100 /* IP version 1.31 */ + +#define DSI_VERSION0x00 +#define VERSIONGENMASK(31, 8) + +#define DSI_PWR_UP 0x04 +#define RESET 0 +#define POWERUPBIT(0) + +#define DSI_CLKMGR_CFG 0x08 +#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8) +#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff) + +#define DSI_DPI_VCID 0x0c +#define DPI_VCID(vcid) ((vcid) & 0x3) + +#define DSI_DPI_COLOR_CODING 0x10 +#define LOOSELY18_EN BIT(8) +#define DPI_COLOR_CODING_16BIT_1 0x0 +#define DPI_COLOR_CODING_16BIT_2 0x1 +#define DPI_COLOR_CODING_16BIT_3 0x2 +#define DPI_COLOR_CODING_18BIT_1 0x3 +#define DPI_COLOR_CODING_18BIT_2 0x4 +#define DPI_COLOR_CODING_24BIT 0x5 + +#define DSI_DPI_CFG_POL0x14 +#define COLORM_ACTIVE_LOW BIT(4) +#define SHUTD_ACTIVE_LOW BIT(3) +#define HSYNC_ACTIVE_LOW BIT(2) +#define VSYNC_ACTIVE_LOW BIT(1) +#define DATAEN_ACTIVE_LOW BIT(0) + +#define DSI_DPI_LP_CMD_TIM 0x18 +#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16) +#define INVACT_LPCMD_TIME(p) ((p) & 0xff) + +#define DSI_DBI_VCID 0x1c +#define DSI_DBI_CFG0x20 +#define DSI_DBI_PARTITIONING_EN0x24 +#define DSI_DBI_CMDSIZE0x28 + +#define DSI_PCKHDL_CFG 0x2c +#define CRC_RX_EN BIT(4) +#define ECC_RX_EN BIT(3) +#define BTA_EN BIT(2) +#define EOTP_RX_EN BIT(1) +#define EOTP_TX_EN BIT(0) + +#define DSI_GEN_VCID 0x30 + +#define DSI_MODE_CFG 0x34 +#define ENABLE_VIDEO_MODE 0 +#define ENABLE_CMD_MODEBIT(0) + +#define DSI_VID_MODE_CFG 0x38 +#define ENABLE_LOW_POWER (0x3f << 8) +#define ENABLE_LOW_POWER_MASK (0x3f << 8) +#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0 +#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1 +#define VID_MODE_TYPE_BURST0x2 +#define VID_MODE_TYPE_MASK 0
[U-Boot] [PATCH v5 07/15] video: add support of STM32 MIPI DSI controller driver
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/Kconfig | 9 +
drivers/video/stm32/Makefile| 1 +
drivers/video/stm32/stm32_dsi.c | 490
3 files changed, 500 insertions(+)
create mode 100644 drivers/video/stm32/stm32_dsi.c
diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 78b1fac..95d51bb 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -13,6 +13,15 @@ menuconfig VIDEO_STM32
DSI. This option enables these supports which can be used on
devices which have RGB TFT or DSI display connected.
+config VIDEO_STM32_DSI
+ bool "Enable STM32 DSI video support"
+ depends on VIDEO_STM32
+ select VIDEO_BRIDGE
+ select VIDEO_DW_MIPI_DSI
+ help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI devices connected.
+
config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 7297e5f..f8b42d1 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -6,3 +6,4 @@
# Yannick Fertre
obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..cb89576
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,490 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ * Yannick Fertre for STMicroelectronics.
+ *
+ * This MIPI DSI controller driver is based on the Linux Kernel driver from
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_130 0x31333000 /* IP version 1.30 */
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0) /* DSI Mode */
+#define WCFGR_COLMUX GENMASK(3, 1) /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404 /* Wrapper Control Reg */
+#define WCR_DSIEN BIT(3) /* DSI ENable */
+
+#define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8) /* PLL Lock Status */
+#define WISR_RRS BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0) /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0) /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2) /* pll loop DIVision Factor */
+#define WRPCR_IDF GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN 10
+#define NDIV_MAX 125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+ DSI_RGB565_CONF1,
+ DSI_RGB565_CONF2,
+ DSI_RGB565_CONF3,
+ DSI_RGB666_CONF1,
+ DSI_RGB666_CONF2,
+ DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS 31250
+#define LANE_MAX_KBPS 50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+ struct mipi_dsi_device device;
+ void __iomem *base;
+ struct udevice *panel;
+ u32 pllref_clk;
+ u32 hw_version;
+ int lane_min_kbps;
+ int lane_max_kbps;
+ struct udevice *vdd_reg;
+ struct udevice *dsi_host;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+ writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+ return readl(dsi->base + reg
[U-Boot] [PATCH v5 05/15] dm: Add a dsi host uclass
Display Serial Interface (DSI) host can usefully be modelled
as their own uclass.
DSI defines a serial bus and a communication protocol
between the host and the device (panel, bridge).
Signed-off-by: Yannick Fertré
---
arch/sandbox/dts/sandbox.dts | 6 ++-
configs/sandbox_defconfig| 1 +
drivers/video/Kconfig| 11 +
drivers/video/Makefile | 2 +
drivers/video/dsi-host-uclass.c | 39 +
drivers/video/sandbox_dsi_host.c | 90
include/dm/uclass-id.h | 1 +
include/dsi_host.h | 73
test/dm/Makefile | 1 +
test/dm/dsi_host.c | 58 ++
10 files changed, 281 insertions(+), 1 deletion(-)
create mode 100644 drivers/video/dsi-host-uclass.c
create mode 100644 drivers/video/sandbox_dsi_host.c
create mode 100644 include/dsi_host.h
create mode 100644 test/dm/dsi_host.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 16a33db..f1637c8 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -25,6 +25,11 @@
compatible = "google,cros-ec-sandbox";
};
+ dsi_host: dsi_host {
+ compatible = "sandbox,dsi-host";
+ status = "okay";
+ };
+
ethrawbus {
compatible = "sandbox,eth-raw-bus";
skip-localhost = <0>;
@@ -63,7 +68,6 @@
compatible = "sandbox,spi";
cs-gpios = <0>, <&gpio_a 0>;
};
-
};
#include "sandbox.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index f77b9e8..3f2dc99 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -206,6 +206,7 @@ CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_VIDEO_DSI_HOST_SANDBOX=y
CONFIG_OSD=y
CONFIG_SANDBOX_OSD=y
CONFIG_W1=y
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 36f666e..cdaf616 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -686,6 +686,17 @@ config VIDEO_DW_HDMI
rather requires a SoC-specific glue driver to call it), it
can not be enabled from the configuration menu.
+config VIDEO_DSI_HOST_SANDBOX
+ bool "Enable sandbox for dsi host"
+ depends on SANDBOX
+ select VIDEO_MIPI_DSI
+ help
+ Enable support for sandbox dsi host device used for testing
+ purposes.
+ Display Serial Interface (DSI) defines a serial bus and
+ a communication protocol between the host and the device
+ (panel, bridge).
+
config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7df9b0b..07aaca9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/
obj-$(CONFIG_DISPLAY) += display-uclass.o
obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o
+obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o
obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o
obj-$(CONFIG_DM_VIDEO) += video_bmp.o
@@ -58,6 +59,7 @@ obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
+obj-$(CONFIG_VIDEO_DSI_HOST_SANDBOX) += sandbox_dsi_host.o
obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
diff --git a/drivers/video/dsi-host-uclass.c b/drivers/video/dsi-host-uclass.c
new file mode 100644
index 000..1db1f88
--- /dev/null
+++ b/drivers/video/dsi-host-uclass.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *
+ */
+
+#include
+#include
+#include
+
+int dsi_host_init(struct udevice *dev,
+ struct mipi_dsi_device *device,
+ struct display_timing *timings,
+ unsigned int max_data_lanes,
+ const struct mipi_dsi_phy_ops *phy_ops)
+{
+ struct dsi_host_ops *ops = dsi_host_get_ops(dev);
+
+ if (!ops->init)
+ return -ENOSYS;
+
+ return ops->init(dev, device, timings, max_data_lanes, phy_ops);
+}
+
+int dsi_host_enable(struct udevice *dev)
+{
+ struct dsi_host_ops *ops = dsi_host_get_ops(dev);
+
+ if (!ops->enable)
+ return -ENOSYS;
+
+ return ops->enable(dev);
+}
+
+UCLASS_DRIVER(dsi_host) = {
+ .id
[U-Boot] [PATCH v5 04/15] video: add support of MIPI DSI interface
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig| 8 +
drivers/video/Makefile | 1 +
drivers/video/mipi_dsi.c | 828 +++
include/mipi_dsi.h | 466 ++
4 files changed, 1303 insertions(+)
create mode 100644 drivers/video/mipi_dsi.c
create mode 100644 include/mipi_dsi.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 261fa98..36f666e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -73,6 +73,14 @@ config VIDEO_ANSI
Enable ANSI escape sequence decoding for a more fully functional
console.
+config VIDEO_MIPI_DSI
+ bool "Support MIPI DSI interface"
+ depends on DM_VIDEO
+ help
+ Support MIPI DSI interface for driving a MIPI compatible device.
+ The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
+ serial interface between a host processor and a display module.
+
config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 349a207..7df9b0b 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) +=
hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
diff --git a/drivers/video/mipi_dsi.c b/drivers/video/mipi_dsi.c
new file mode 100644
index 000..cdc3ef5
--- /dev/null
+++ b/drivers/video/mipi_dsi.c
@@ -0,0 +1,828 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Mipi_dsi.c contains a set of dsi helpers.
+ * This file is inspired from the drm helper file
drivers/gpu/drm/drm_mipi_dsi.c
+ * (kernel linux).
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->attach)
+ return -ENOSYS;
+
+ return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->detach)
+ return -ENOSYS;
+
+ return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+/**
+ * mipi_dsi_device_transfer - transfer message to a DSI device
+ * @dsi: DSI peripheral
+ * @msg: message
+ */
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+ struct mipi_dsi_msg *msg)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->transfer)
+ return -ENOSYS;
+
+ if (dsi->mode_flags & MIPI_
[U-Boot] [PATCH v5 08/15] video: add support of panel OTM8009A
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 +
drivers/video/Makefile | 1 +
drivers/video/orisetech_otm8009a.c | 379 +
3 files changed, 389 insertions(+)
create mode 100644 drivers/video/orisetech_otm8009a.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index fdcb03c..5cc2d9f 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -328,6 +328,15 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
+config VIDEO_LCD_ORISETECH_OTM8009A
+ bool "OTM8009A DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Say Y here if you want to enable support for Orise Technology
+ otm8009a 480x800 dsi 2dl panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0d35470..0dd8ea0 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_VIDEO_IPUV3) += imx/
obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/
diff --git a/drivers/video/orisetech_otm8009a.c
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..89d9cfd
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,379 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This otm8009a panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x /* Address Shift Function */
+#define MCS_PANSET 0xB3A6 /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2 /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4 /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181 /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1 /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480 /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A /* Command not documented */
+#define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80 /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90 /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0 /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0 /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0 /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0 /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0 /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0 /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80 /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90 /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0 /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0 /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0 /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0 /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80 /* GOA VST Setting */
+#define MCS_GOACLKA1 0xCEA0 /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3 0xCEB0 /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0 /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0 /* Command not documented */
+#define MCS_GVDDSET0xD800 /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900 /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P 0xE100 /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N 0xE200 /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6 /* Command not documented */
+#define MCS_CMD2_ENA1 0xFF00 /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2 0xFF80 /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+ struct udevice *reg;
+ struct gpio_desc reset;
+ unsigned int lanes;
+ enum mipi_dsi_pixel_format format;
+ unsigned long m
[U-Boot] [PATCH v5 03/15] include: Add new DCS commands in the enum list
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
Signed-off-by: Yannick Fertré
---
include/mipi_display.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/mipi_display.h b/include/mipi_display.h
index ddcc8ca..19aa65a 100644
--- a/include/mipi_display.h
+++ b/include/mipi_display.h
@@ -115,6 +115,14 @@ enum {
MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
MIPI_DCS_GET_SCANLINE = 0x45,
+ MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CONTROL_DISPLAY= 0x54, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
+ MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,/* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,/* MIPI DCS 1.3 */
MIPI_DCS_READ_DDB_START = 0xA1,
MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
};
--
2.7.4
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[U-Boot] [PATCH v5 02/15] video: stm32: stm32_ltdc: add bridge to display controller
Manage a bridge insert between the display controller & a panel.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/stm32_ltdc.c | 143 +++
1 file changed, 83 insertions(+), 60 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc6c889..59ff692 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -7,19 +7,18 @@
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
struct stm32_ltdc_priv {
void __iomem *regs;
- struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -174,8 +173,8 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp
l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
+ __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
@@ -209,23 +208,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
}
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+ struct display_timing *timings)
{
void __iomem *regs = priv->regs;
- struct display_timing *timing = &priv->timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
/* Convert video timings to ltdc timings */
- hsync = timing->hsync_len.typ - 1;
- vsync = timing->vsync_len.typ - 1;
- acc_hbp = hsync + timing->hback_porch.typ;
- acc_vbp = vsync + timing->vback_porch.typ;
- acc_act_w = acc_hbp + timing->hactive.typ;
- acc_act_h = acc_vbp + timing->vactive.typ;
- total_w = acc_act_w + timing->hfront_porch.typ;
- total_h = acc_act_h + timing->vfront_porch.typ;
+ hsync = timings->hsync_len.typ - 1;
+ vsync = timings->vsync_len.typ - 1;
+ acc_hbp = hsync + timings->hback_porch.typ;
+ acc_vbp = vsync + timings->vback_porch.typ;
+ acc_act_w = acc_hbp + timings->hactive.typ;
+ acc_act_h = acc_vbp + timings->vactive.typ;
+ total_w = acc_act_w + timings->hfront_porch.typ;
+ total_h = acc_act_h + timings->vfront_porch.typ;
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -247,14 +246,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv
*priv)
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
- if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
- if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
- if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
- if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -330,96 +329,120 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
- struct udevice *panel;
+ struct udevice *bridge = NULL;
+ struct udevice *panel = NULL;
+ struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
- int rate, ret;
+ int ret;
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
- debug("%s: ltdc dt register address error\n", __func__);
+ dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
ret = clk_get_by_index(dev, 0, &pclk);
if (ret) {
- debug("%s: peripheral clock get error %d\n", __func__, ret);
+ dev_err(dev, "peripheral clock get error %d\n&q
[U-Boot] [PATCH v5 01/15] video: bmp: check resolutions of panel/bitmap
If the size of the bitmap is bigger than the size of
the panel then errors appear when calculating axis alignment
and the copy of bitmap is done outside of framebuffer.
Signed-off-by: Yannick Fertré
---
drivers/video/video_bmp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
index 193f37d..4af1fb4 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
@@ -249,6 +249,13 @@ int video_bmp_display(struct udevice *dev, ulong
bmp_image, int x, int y,
padded_width = (width & 0x3 ? (width & ~0x3) + 4 : width);
+ /* check if picture size exceeds panel size */
+ if ((pwidth < width) || (priv->ysize < height)) {
+ printf("Error: BMP size %d x %d is bigger than panel size %d x
%d\n",
+ (int)width, (int)height, priv->xsize, priv->ysize);
+ return -EINVAL;
+ }
+
if (align) {
video_splash_align_axis(&x, priv->xsize, width);
video_splash_align_axis(&y, priv->ysize, height);
--
2.7.4
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[U-Boot] [PATCH v5 00/15] splash screen on the stm32f769 & stm32mp1 boards
Version 1: - Initial commit. Version 2: - swap patches to avoid compilation issue. - remove panel timings from device tree. Version 3: - Share same include file mipi_display.h with kernel linux. - Rework ltdc driver with last comments of Anatolij Gustshin. - Check ordering (file dw_mipi_dsi.c). - Rename mipi_display.c to mipi_dsi.c. Version 4: - Add physical set mode operation - Improve debug trace (display controller ltdc) - Refresh timings of panels - Add regulator (dsi controller) - Add new class DSI_HOST - Support of panels OTM800A & RM68200 Version 5: - Rework dsi host patch with last comments of Simon Glass. This serie contains all patchsets needed for displaying a splash screen on the stm32f769 & stm32mp1 boards. A new config has been created configs/stm32f769-disco_defconfig. This is necessary due to the difference of panels between stm32f769-disco, stm32f746-disco boards & stm32mp1 boards. A new class DSI_HOST have been created to manage a dsi host between the dsi controller & display controller. Yannick Fertré (15): video: bmp: check resolutions of panel/bitmap video: stm32: stm32_ltdc: add bridge to display controller include: Add new DCS commands in the enum list video: add support of MIPI DSI interface dm: Add a dsi host uclass video: add MIPI DSI host controller bridge video: add support of STM32 MIPI DSI controller driver video: add support of panel OTM8009A video: add support of panel RM68200 board: Add STM32F769 SoC, discovery board support ARM: dts: stm32f769: add display for STM32F769 disco board ARM: dts: stm32mp1: add dsi host for stm32mp157c-ev1 board ARM: dts: stm32mp1: add dsi host for stm32mp157c-dk2 board stm32mp1: configs: update video stm32mp1: configs: add display devices arch/arm/dts/stm32f769-disco-u-boot.dtsi | 62 +++ arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 + arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 5 + arch/sandbox/dts/sandbox.dts | 6 +- configs/sandbox_defconfig| 1 + configs/stm32f769-disco_defconfig| 63 +++ configs/stm32mp15_basic_defconfig| 6 + configs/stm32mp15_optee_defconfig| 6 + configs/stm32mp15_trusted_defconfig | 6 + drivers/video/Kconfig| 47 ++ drivers/video/Makefile | 6 + drivers/video/dsi-host-uclass.c | 39 ++ drivers/video/dw_mipi_dsi.c | 838 +++ drivers/video/mipi_dsi.c | 828 ++ drivers/video/orisetech_otm8009a.c | 379 ++ drivers/video/raydium-rm68200.c | 351 + drivers/video/sandbox_dsi_host.c | 90 drivers/video/stm32/Kconfig | 9 + drivers/video/stm32/Makefile | 1 + drivers/video/stm32/stm32_dsi.c | 490 ++ drivers/video/stm32/stm32_ltdc.c | 143 +++--- drivers/video/video_bmp.c| 7 + include/configs/stm32mp1.h | 7 + include/dm/uclass-id.h | 1 + include/dsi_host.h | 73 +++ include/mipi_display.h | 8 + include/mipi_dsi.h | 466 + test/dm/Makefile | 1 + test/dm/dsi_host.c | 58 +++ 29 files changed, 3943 insertions(+), 61 deletions(-) create mode 100644 configs/stm32f769-disco_defconfig create mode 100644 drivers/video/dsi-host-uclass.c create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 drivers/video/mipi_dsi.c create mode 100644 drivers/video/orisetech_otm8009a.c create mode 100644 drivers/video/raydium-rm68200.c create mode 100644 drivers/video/sandbox_dsi_host.c create mode 100644 drivers/video/stm32/stm32_dsi.c create mode 100644 include/dsi_host.h create mode 100644 include/mipi_dsi.h create mode 100644 test/dm/dsi_host.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 10/15] board: Add STM32F769 SoC, discovery board support
Signed-off-by: Yannick Fertré --- configs/stm32f769-disco_defconfig | 63 +++ 1 file changed, 63 insertions(+) create mode 100644 configs/stm32f769-disco_defconfig diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig new file mode 100644 index 000..887e2d5 --- /dev/null +++ b/configs/stm32f769-disco_defconfig @@ -0,0 +1,63 @@ +CONFIG_ARM=y +CONFIG_STM32=y +CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_MALLOC_F_LEN=0xE00 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_STM32F7=y +CONFIG_TARGET_STM32F746_DISCO=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +# CONFIG_USE_BOOTCOMMAND is not set +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_TEXT_BASE=0x800 +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM_MMC=y +# CONFIG_SPL_DM_MMC is not set +CONFIG_ARM_PL180_MMCI=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_STM32_QSPI=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 14/15] stm32mp1: configs: update video
Update video configs to support bitmap 16bpp, 24bpp, 32bpp & RLE8. Signed-off-by: Yannick Fertré --- include/configs/stm32mp1.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 92660fe..988992b 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -83,6 +83,13 @@ #define CONFIG_SYS_MTDPARTS_RUNTIME #endif +#ifdef CONFIG_DM_VIDEO +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_BMP_16BPP +#define CONFIG_BMP_24BPP +#define CONFIG_BMP_32BPP +#endif + /*/ #ifdef CONFIG_DISTRO_DEFAULTS /*/ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 12/15] ARM: dts: stm32mp1: add dsi host for stm32mp157c-ev1 board
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
index ec60486..af5945d 100644
--- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
@@ -14,6 +14,11 @@
spi0 = &qspi;
usb0 = &usbotg_hs;
};
+
+ dsi_host: dsi_host {
+ compatible = "synopsys,dw-mipi-dsi";
+ status = "okay";
+ };
};
&flash0 {
--
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[U-Boot] [PATCH v4 08/15] video: add support of panel OTM8009A
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 +
drivers/video/Makefile | 1 +
drivers/video/orisetech_otm8009a.c | 379 +
3 files changed, 389 insertions(+)
create mode 100644 drivers/video/orisetech_otm8009a.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index a55cdc6..0bcadd9 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -328,6 +328,15 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
+config VIDEO_LCD_ORISETECH_OTM8009A
+ bool "OTM8009A DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Say Y here if you want to enable support for Orise Technology
+ otm8009a 480x800 dsi 2dl panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 58210ec..f8785cb 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_VIDEO_IPUV3) += imx/
obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/
diff --git a/drivers/video/orisetech_otm8009a.c
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..89d9cfd
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,379 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This otm8009a panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x /* Address Shift Function */
+#define MCS_PANSET 0xB3A6 /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2 /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4 /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181 /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1 /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480 /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A /* Command not documented */
+#define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80 /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90 /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0 /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0 /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0 /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0 /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0 /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0 /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80 /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90 /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0 /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0 /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0 /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0 /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80 /* GOA VST Setting */
+#define MCS_GOACLKA1 0xCEA0 /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3 0xCEB0 /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0 /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0 /* Command not documented */
+#define MCS_GVDDSET0xD800 /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900 /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P 0xE100 /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N 0xE200 /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6 /* Command not documented */
+#define MCS_CMD2_ENA1 0xFF00 /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2 0xFF80 /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+ struct udevice *reg;
+ struct gpio_desc reset;
+ unsigned int lanes;
+ enum mipi_dsi_pixel_format format;
+ unsigned long m
[U-Boot] [PATCH v4 11/15] ARM: dts: stm32f769: add display for STM32F769 disco board
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f769-disco-u-boot.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 209a82c..c1d7d6b 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -28,10 +28,72 @@
button-gpio = <&gpioa 0 0>;
};
+ dsi_host: dsi_host {
+ compatible = "synopsys,dw-mipi-dsi";
+ status = "okay";
+ };
+
led1 {
compatible = "st,led1";
led-gpio = <&gpioj 5 0>;
};
+
+ panel: panel {
+ compatible = "orisetech,otm8009a";
+ reset-gpios = <&gpioj 15 1>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
+
+ soc {
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016C00 0x800>;
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+ u-boot,dm-pre-reloc;
+ status = "okay";
+
+ ports {
+ port@0 {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ port@1 {
+ dsi_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
+ };
+
+ ltdc: display-controller@40016800 {
+ compatible = "st,stm32-ltdc";
+ reg = <0x40016800 0x200>;
+ resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
+
+ status = "okay";
+ u-boot,dm-pre-reloc;
+
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+ };
+ };
};
&fmc {
--
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[U-Boot] [PATCH v4 15/15] stm32mp1: configs: add display devices
Add support of panels otm8009A, RM68200 & DSI controller. Limit resolution to 1280x800. Signed-off-by: Yannick Fertré --- configs/stm32mp15_basic_defconfig | 6 ++ configs/stm32mp15_optee_defconfig | 6 ++ configs/stm32mp15_trusted_defconfig | 6 ++ 3 files changed, 18 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 09785b5..6d1e208 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -124,4 +124,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=1280 +CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 177cbc7..491174f 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -109,4 +109,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=1280 +CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 71ad115..a8a7eec 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -108,4 +108,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=1280 +CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 13/15] ARM: dts: stm32mp1: add dsi host for stm32mp157c-dk2 board
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
index 18ac1e3..cd9947f 100644
--- a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
@@ -5,6 +5,13 @@
#include "stm32mp157a-dk1-u-boot.dtsi"
+/ {
+ dsi_host: dsi_host {
+ compatible = "synopsys,dw-mipi-dsi";
+ status = "okay";
+ };
+};
+
&i2c1 {
hdmi-transmitter@39 {
reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
--
2.7.4
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[U-Boot] [PATCH v4 02/15] video: stm32: stm32_ltdc: add bridge to display controller
Manage a bridge insert between the display controller & a panel.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/stm32_ltdc.c | 143 +++
1 file changed, 83 insertions(+), 60 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc6c889..59ff692 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -7,19 +7,18 @@
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
struct stm32_ltdc_priv {
void __iomem *regs;
- struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -174,8 +173,8 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp
l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
+ __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
@@ -209,23 +208,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
}
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+ struct display_timing *timings)
{
void __iomem *regs = priv->regs;
- struct display_timing *timing = &priv->timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
/* Convert video timings to ltdc timings */
- hsync = timing->hsync_len.typ - 1;
- vsync = timing->vsync_len.typ - 1;
- acc_hbp = hsync + timing->hback_porch.typ;
- acc_vbp = vsync + timing->vback_porch.typ;
- acc_act_w = acc_hbp + timing->hactive.typ;
- acc_act_h = acc_vbp + timing->vactive.typ;
- total_w = acc_act_w + timing->hfront_porch.typ;
- total_h = acc_act_h + timing->vfront_porch.typ;
+ hsync = timings->hsync_len.typ - 1;
+ vsync = timings->vsync_len.typ - 1;
+ acc_hbp = hsync + timings->hback_porch.typ;
+ acc_vbp = vsync + timings->vback_porch.typ;
+ acc_act_w = acc_hbp + timings->hactive.typ;
+ acc_act_h = acc_vbp + timings->vactive.typ;
+ total_w = acc_act_w + timings->hfront_porch.typ;
+ total_h = acc_act_h + timings->vfront_porch.typ;
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -247,14 +246,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv
*priv)
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
- if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
- if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
- if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
- if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -330,96 +329,120 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
- struct udevice *panel;
+ struct udevice *bridge = NULL;
+ struct udevice *panel = NULL;
+ struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
- int rate, ret;
+ int ret;
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
- debug("%s: ltdc dt register address error\n", __func__);
+ dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
ret = clk_get_by_index(dev, 0, &pclk);
if (ret) {
- debug("%s: peripheral clock get error %d\n", __func__, ret);
+ dev_err(dev, "peripheral clock get error %d\n&q
[U-Boot] [PATCH v4 09/15] video: add support of panel RM68200
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 ++
drivers/video/Makefile | 1 +
drivers/video/raydium-rm68200.c | 351
3 files changed, 361 insertions(+)
create mode 100644 drivers/video/raydium-rm68200.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 0bcadd9..aafb3b4 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -337,6 +337,15 @@ config VIDEO_LCD_ORISETECH_OTM8009A
Say Y here if you want to enable support for Orise Technology
otm8009a 480x800 dsi 2dl panel.
+config VIDEO_LCD_RAYDIUM_RM68200
+ bool "RM68200 DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Say Y here if you want to enable support for Raydium RM68200
+ 720x1280 DSI video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index f8785cb..eea59e4 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..91555e2
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,351 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This rm68200 panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR 0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1 0x00
+#define GOA_VSTV2 0x07
+#define GOA_VCLK1 0x0E
+#define GOA_VCLK2 0x17
+#define GOA_VCLK_OPT1 0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1 0x6D
+#define MCS_GOA_GPO2 0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP 0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN 0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+ struct udevice *reg;
+ struc
[U-Boot] [PATCH v4 04/15] video: add support of MIPI DSI interface
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig| 8 +
drivers/video/Makefile | 1 +
drivers/video/mipi_dsi.c | 828 +++
include/mipi_dsi.h | 466 ++
4 files changed, 1303 insertions(+)
create mode 100644 drivers/video/mipi_dsi.c
create mode 100644 include/mipi_dsi.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 261fa98..36f666e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -73,6 +73,14 @@ config VIDEO_ANSI
Enable ANSI escape sequence decoding for a more fully functional
console.
+config VIDEO_MIPI_DSI
+ bool "Support MIPI DSI interface"
+ depends on DM_VIDEO
+ help
+ Support MIPI DSI interface for driving a MIPI compatible device.
+ The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
+ serial interface between a host processor and a display module.
+
config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 349a207..7df9b0b 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) +=
hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
diff --git a/drivers/video/mipi_dsi.c b/drivers/video/mipi_dsi.c
new file mode 100644
index 000..cdc3ef5
--- /dev/null
+++ b/drivers/video/mipi_dsi.c
@@ -0,0 +1,828 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Mipi_dsi.c contains a set of dsi helpers.
+ * This file is inspired from the drm helper file
drivers/gpu/drm/drm_mipi_dsi.c
+ * (kernel linux).
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->attach)
+ return -ENOSYS;
+
+ return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->detach)
+ return -ENOSYS;
+
+ return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+/**
+ * mipi_dsi_device_transfer - transfer message to a DSI device
+ * @dsi: DSI peripheral
+ * @msg: message
+ */
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+ struct mipi_dsi_msg *msg)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->transfer)
+ return -ENOSYS;
+
+ if (dsi->mode_flags & MIPI_
[U-Boot] [PATCH v4 05/15] dm: Add a dsi host uclass
DSI host can usefully be modelled as their own uclass.
Signed-off-by: Yannick Fertré
---
arch/sandbox/dts/sandbox.dts | 6 ++-
configs/sandbox_defconfig| 1 +
drivers/video/Kconfig| 7
drivers/video/Makefile | 2 +
drivers/video/dsi-host-uclass.c | 39 +++
drivers/video/sandbox_dsi_host.c | 83
include/dm/uclass-id.h | 1 +
include/dsi_host.h | 57 +++
test/dm/Makefile | 1 +
test/dm/dsi_host.c | 58
10 files changed, 254 insertions(+), 1 deletion(-)
create mode 100644 drivers/video/dsi-host-uclass.c
create mode 100644 drivers/video/sandbox_dsi_host.c
create mode 100644 include/dsi_host.h
create mode 100644 test/dm/dsi_host.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 16a33db..f1637c8 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -25,6 +25,11 @@
compatible = "google,cros-ec-sandbox";
};
+ dsi_host: dsi_host {
+ compatible = "sandbox,dsi-host";
+ status = "okay";
+ };
+
ethrawbus {
compatible = "sandbox,eth-raw-bus";
skip-localhost = <0>;
@@ -63,7 +68,6 @@
compatible = "sandbox,spi";
cs-gpios = <0>, <&gpio_a 0>;
};
-
};
#include "sandbox.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7355e3a..90f3e26 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -205,6 +205,7 @@ CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_VIDEO_DSI_HOST_SANDBOX=y
CONFIG_OSD=y
CONFIG_SANDBOX_OSD=y
CONFIG_W1=y
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 36f666e..554b7db 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -686,6 +686,13 @@ config VIDEO_DW_HDMI
rather requires a SoC-specific glue driver to call it), it
can not be enabled from the configuration menu.
+config VIDEO_DSI_HOST_SANDBOX
+ bool "Enable sandbox for dsi host"
+ depends on SANDBOX
+ help
+ Enable support for sandbox dsi host device used for testing
+ purposes.
+
config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7df9b0b..5ed3590 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/
obj-$(CONFIG_DISPLAY) += display-uclass.o
obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o
+obj-$(CONFIG_DM_VIDEO) += dsi-host-uclass.o
obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o
obj-$(CONFIG_DM_VIDEO) += video_bmp.o
@@ -58,6 +59,7 @@ obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
+obj-$(CONFIG_VIDEO_DSI_HOST_SANDBOX) += sandbox_dsi_host.o
obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
diff --git a/drivers/video/dsi-host-uclass.c b/drivers/video/dsi-host-uclass.c
new file mode 100644
index 000..1db1f88
--- /dev/null
+++ b/drivers/video/dsi-host-uclass.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *
+ */
+
+#include
+#include
+#include
+
+int dsi_host_init(struct udevice *dev,
+ struct mipi_dsi_device *device,
+ struct display_timing *timings,
+ unsigned int max_data_lanes,
+ const struct mipi_dsi_phy_ops *phy_ops)
+{
+ struct dsi_host_ops *ops = dsi_host_get_ops(dev);
+
+ if (!ops->init)
+ return -ENOSYS;
+
+ return ops->init(dev, device, timings, max_data_lanes, phy_ops);
+}
+
+int dsi_host_enable(struct udevice *dev)
+{
+ struct dsi_host_ops *ops = dsi_host_get_ops(dev);
+
+ if (!ops->enable)
+ return -ENOSYS;
+
+ return ops->enable(dev);
+}
+
+UCLASS_DRIVER(dsi_host) = {
+ .id = UCLASS_DSI_HOST,
+ .name = "dsi_host",
+};
diff --git a/drivers/video/sandbox_dsi_host.c b/drivers/video/sandbox_dsi_host.c
new file mode 100644
index 000..ee01ed1
--- /dev/null
+++ b/drivers/video/sandbox_dsi_host.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+
[U-Boot] [PATCH v4 07/15] video: add support of STM32 MIPI DSI controller driver
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/Kconfig | 9 +
drivers/video/stm32/Makefile| 1 +
drivers/video/stm32/stm32_dsi.c | 490
3 files changed, 500 insertions(+)
create mode 100644 drivers/video/stm32/stm32_dsi.c
diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 78b1fac..95d51bb 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -13,6 +13,15 @@ menuconfig VIDEO_STM32
DSI. This option enables these supports which can be used on
devices which have RGB TFT or DSI display connected.
+config VIDEO_STM32_DSI
+ bool "Enable STM32 DSI video support"
+ depends on VIDEO_STM32
+ select VIDEO_BRIDGE
+ select VIDEO_DW_MIPI_DSI
+ help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI devices connected.
+
config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 7297e5f..f8b42d1 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -6,3 +6,4 @@
# Yannick Fertre
obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..cb89576
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,490 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ * Yannick Fertre for STMicroelectronics.
+ *
+ * This MIPI DSI controller driver is based on the Linux Kernel driver from
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_130 0x31333000 /* IP version 1.30 */
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0) /* DSI Mode */
+#define WCFGR_COLMUX GENMASK(3, 1) /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404 /* Wrapper Control Reg */
+#define WCR_DSIEN BIT(3) /* DSI ENable */
+
+#define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8) /* PLL Lock Status */
+#define WISR_RRS BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0) /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0) /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2) /* pll loop DIVision Factor */
+#define WRPCR_IDF GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN 10
+#define NDIV_MAX 125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+ DSI_RGB565_CONF1,
+ DSI_RGB565_CONF2,
+ DSI_RGB565_CONF3,
+ DSI_RGB666_CONF1,
+ DSI_RGB666_CONF2,
+ DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS 31250
+#define LANE_MAX_KBPS 50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+ struct mipi_dsi_device device;
+ void __iomem *base;
+ struct udevice *panel;
+ u32 pllref_clk;
+ u32 hw_version;
+ int lane_min_kbps;
+ int lane_max_kbps;
+ struct udevice *vdd_reg;
+ struct udevice *dsi_host;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+ writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+ return readl(dsi->base + reg
[U-Boot] [PATCH v4 06/15] video: add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host bridge driver, based on the Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. Signed-off-by: Yannick Fertré --- drivers/video/Kconfig | 10 + drivers/video/Makefile | 1 + drivers/video/dw_mipi_dsi.c | 838 3 files changed, 849 insertions(+) create mode 100644 drivers/video/dw_mipi_dsi.c diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 554b7db..a55cdc6 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -693,6 +693,16 @@ config VIDEO_DSI_HOST_SANDBOX Enable support for sandbox dsi host device used for testing purposes. +config VIDEO_DW_MIPI_DSI + bool + select VIDEO_MIPI_DSI + help + Enables the common driver code for the Synopsis Designware + MIPI DSI block found in SoCs from various vendors. + As this does not provide any functionality by itself (but + rather requires a SoC-specific glue driver to call it), it + can not be enabled from the configuration menu. + config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" help diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 5ed3590..58210ec 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o +obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o obj-$(CONFIG_VIDEO_EFI) += efi.o obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o obj-$(CONFIG_VIDEO_IPUV3) += imx/ diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c new file mode 100644 index 000..04b07e3 --- /dev/null +++ b/drivers/video/dw_mipi_dsi.c @@ -0,0 +1,838 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd + * Copyright (C) 2019, STMicroelectronics - All Rights Reserved + * Author(s): Philippe Cornu for STMicroelectronics. + *Yannick Fertre for STMicroelectronics. + * + * This generic Synopsys DesignWare MIPI DSI host driver is inspired from + * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HWVER_131 0x31333100 /* IP version 1.31 */ + +#define DSI_VERSION0x00 +#define VERSIONGENMASK(31, 8) + +#define DSI_PWR_UP 0x04 +#define RESET 0 +#define POWERUPBIT(0) + +#define DSI_CLKMGR_CFG 0x08 +#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8) +#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff) + +#define DSI_DPI_VCID 0x0c +#define DPI_VCID(vcid) ((vcid) & 0x3) + +#define DSI_DPI_COLOR_CODING 0x10 +#define LOOSELY18_EN BIT(8) +#define DPI_COLOR_CODING_16BIT_1 0x0 +#define DPI_COLOR_CODING_16BIT_2 0x1 +#define DPI_COLOR_CODING_16BIT_3 0x2 +#define DPI_COLOR_CODING_18BIT_1 0x3 +#define DPI_COLOR_CODING_18BIT_2 0x4 +#define DPI_COLOR_CODING_24BIT 0x5 + +#define DSI_DPI_CFG_POL0x14 +#define COLORM_ACTIVE_LOW BIT(4) +#define SHUTD_ACTIVE_LOW BIT(3) +#define HSYNC_ACTIVE_LOW BIT(2) +#define VSYNC_ACTIVE_LOW BIT(1) +#define DATAEN_ACTIVE_LOW BIT(0) + +#define DSI_DPI_LP_CMD_TIM 0x18 +#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16) +#define INVACT_LPCMD_TIME(p) ((p) & 0xff) + +#define DSI_DBI_VCID 0x1c +#define DSI_DBI_CFG0x20 +#define DSI_DBI_PARTITIONING_EN0x24 +#define DSI_DBI_CMDSIZE0x28 + +#define DSI_PCKHDL_CFG 0x2c +#define CRC_RX_EN BIT(4) +#define ECC_RX_EN BIT(3) +#define BTA_EN BIT(2) +#define EOTP_RX_EN BIT(1) +#define EOTP_TX_EN BIT(0) + +#define DSI_GEN_VCID 0x30 + +#define DSI_MODE_CFG 0x34 +#define ENABLE_VIDEO_MODE 0 +#define ENABLE_CMD_MODEBIT(0) + +#define DSI_VID_MODE_CFG 0x38 +#define ENABLE_LOW_POWER (0x3f << 8) +#define ENABLE_LOW_POWER_MASK (0x3f << 8) +#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0 +#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1 +#define VID_MODE_TYPE_BURST0x2 +#define VID_MODE_TYPE_MASK 0
[U-Boot] [PATCH v4 03/15] include: Add new DCS commands in the enum list
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
Signed-off-by: Yannick Fertré
---
include/mipi_display.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/mipi_display.h b/include/mipi_display.h
index ddcc8ca..19aa65a 100644
--- a/include/mipi_display.h
+++ b/include/mipi_display.h
@@ -115,6 +115,14 @@ enum {
MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
MIPI_DCS_GET_SCANLINE = 0x45,
+ MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CONTROL_DISPLAY= 0x54, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
+ MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,/* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,/* MIPI DCS 1.3 */
MIPI_DCS_READ_DDB_START = 0xA1,
MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
};
--
2.7.4
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[U-Boot] [PATCH v4 01/15] video: bmp: check resolutions of panel/bitmap
If the size of the bitmap is bigger than the size of
the panel then errors appear when calculating axis alignment
and the copy of bitmap is done outside of framebuffer.
Signed-off-by: Yannick Fertré
---
drivers/video/video_bmp.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
index 193f37d..544bd5f 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
@@ -54,6 +54,13 @@ static void video_display_rle8_bitmap(struct udevice *dev,
height = get_unaligned_le32(&bmp->header.height);
bmap = (uchar *)bmp + get_unaligned_le32(&bmp->header.data_offset);
+ /* check if picture size exceed panel size */
+ if (priv->xsize < width)
+ width = priv->xsize;
+
+ if (priv->ysize < height)
+ height = priv->ysize;
+
x = 0;
y = height - 1;
@@ -249,6 +256,13 @@ int video_bmp_display(struct udevice *dev, ulong
bmp_image, int x, int y,
padded_width = (width & 0x3 ? (width & ~0x3) + 4 : width);
+ /* check if picture size exceed panel size */
+ if (pwidth < width)
+ width = pwidth;
+
+ if (priv->ysize < height)
+ height = priv->ysize;
+
if (align) {
video_splash_align_axis(&x, priv->xsize, width);
video_splash_align_axis(&y, priv->ysize, height);
--
2.7.4
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[U-Boot] [PATCH v4 00/15] splash screen on the stm32f769 & stm32mp1 boards
Version 1: - Initial commit. Version 2: - swap patches to avoid compilation issue. - remove panel timings from device tree. Version 3: - Share same include file mipi_display.h with kernel linux. - Rework ltdc driver with last comments of Anatolij Gustshin. - Check ordering (file dw_mipi_dsi.c). - Rename mipi_display.c to mipi_dsi.c. Version 4: - Add physical set mode operation - Improve debug trace (display controller ltdc) - Refresh timings of panels - Add regulator (dsi controller) - Add new class DSI_HOST - Support of panels OTM800A & RM68200 This serie contains all patchsets needed for displaying a splash screen on the stm32f769 & stm32mp1 boards. A new config has been created configs/stm32f769-disco_defconfig. This is necessary due to the difference of panels between stm32f769-disco, stm32f746-disco boards & stm32mp1 boards. A new class DSI_HOST have been created to manage a dsi host between the dsi controller & display controller. Yannick Fertré (15): video: bmp: check resolutions of panel/bitmap video: stm32: stm32_ltdc: add bridge to display controller include: Add new DCS commands in the enum list video: add support of MIPI DSI interface dm: Add a dsi host uclass video: add MIPI DSI host controller bridge video: add support of STM32 MIPI DSI controller driver video: add support of panel OTM8009A video: add support of panel RM68200 board: Add STM32F769 SoC, discovery board support ARM: dts: stm32f769: add display for STM32F769 disco board ARM: dts: stm32mp1: add dsi host for stm32mp157c-ev1 board ARM: dts: stm32mp1: add dsi host for stm32mp157c-dk2 board stm32mp1: configs: update video stm32mp1: configs: add display devices arch/arm/dts/stm32f769-disco-u-boot.dtsi | 62 +++ arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 + arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 5 + arch/sandbox/dts/sandbox.dts | 6 +- configs/sandbox_defconfig| 1 + configs/stm32f769-disco_defconfig| 63 +++ configs/stm32mp15_basic_defconfig| 6 + configs/stm32mp15_optee_defconfig| 6 + configs/stm32mp15_trusted_defconfig | 6 + drivers/video/Kconfig| 43 ++ drivers/video/Makefile | 6 + drivers/video/dsi-host-uclass.c | 39 ++ drivers/video/dw_mipi_dsi.c | 838 +++ drivers/video/mipi_dsi.c | 828 ++ drivers/video/orisetech_otm8009a.c | 379 ++ drivers/video/raydium-rm68200.c | 351 + drivers/video/sandbox_dsi_host.c | 83 +++ drivers/video/stm32/Kconfig | 9 + drivers/video/stm32/Makefile | 1 + drivers/video/stm32/stm32_dsi.c | 490 ++ drivers/video/stm32/stm32_ltdc.c | 143 +++--- drivers/video/video_bmp.c| 14 + include/configs/stm32mp1.h | 7 + include/dm/uclass-id.h | 1 + include/dsi_host.h | 57 +++ include/mipi_display.h | 8 + include/mipi_dsi.h | 466 + test/dm/Makefile | 1 + test/dm/dsi_host.c | 58 +++ 29 files changed, 3923 insertions(+), 61 deletions(-) create mode 100644 configs/stm32f769-disco_defconfig create mode 100644 drivers/video/dsi-host-uclass.c create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 drivers/video/mipi_dsi.c create mode 100644 drivers/video/orisetech_otm8009a.c create mode 100644 drivers/video/raydium-rm68200.c create mode 100644 drivers/video/sandbox_dsi_host.c create mode 100644 drivers/video/stm32/stm32_dsi.c create mode 100644 include/dsi_host.h create mode 100644 include/mipi_dsi.h create mode 100644 test/dm/dsi_host.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 10/10] board: Add STM32F769 SoC, discovery board support
Signed-off-by: Yannick Fertré --- configs/stm32f769-disco_defconfig | 67 +++ 1 file changed, 67 insertions(+) create mode 100644 configs/stm32f769-disco_defconfig diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig new file mode 100644 index 000..7fe2d3f --- /dev/null +++ b/configs/stm32f769-disco_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARM=y +CONFIG_STM32=y +CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_MALLOC_F_LEN=0xC00 +CONFIG_STM32F7=y +CONFIG_TARGET_STM32F746_DISCO=y +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM_MMC=y +# CONFIG_SPL_DM_MMC is not set +CONFIG_ARM_PL180_MMCI=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_STM32_QSPI=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_VIDEO_BRIDGE=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 09/10] arm: dts: stm32: add display for STM32F769 disco board
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f769-disco.dts | 41
1 file changed, 41 insertions(+)
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 1e8ef74..6903e66 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -85,6 +85,18 @@
compatible = "st,button1";
button-gpio = <&gpioa 0 0>;
};
+
+ panel: panel {
+ compatible = "orisetech,otm8009a";
+ reset-gpios = <&gpioj 15 1>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
};
&clk_hse {
@@ -264,3 +276,32 @@
bus-width = <4>;
max-frequency = <2500>;
};
+
+<dc {
+ status = "okay";
+
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ port@0 {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ port@1 {
+ dsi_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
+};
--
2.7.4
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[U-Boot] [PATCH v3 06/10] video: add support of panel OTM8009A
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 8 +
drivers/video/Makefile | 1 +
drivers/video/orisetech_otm8009a.c | 367 +
3 files changed, 376 insertions(+)
create mode 100644 drivers/video/orisetech_otm8009a.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ede351d..f54f97e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -328,6 +328,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
+config VIDEO_LCD_ORISETECH_OTM8009A
+ bool "OTM8009A DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ae143dc..67f5ca7 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o
ipu_disp.o
obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
diff --git a/drivers/video/orisetech_otm8009a.c
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..fd7fc7c
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,367 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This otm8009a panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x /* Address Shift Function */
+#define MCS_PANSET 0xB3A6 /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2 /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4 /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181 /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1 /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480 /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A /* Command not documented */
+#define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80 /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90 /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0 /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0 /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0 /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0 /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0 /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0 /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80 /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90 /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0 /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0 /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0 /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0 /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80 /* GOA VST Setting */
+#define MCS_GOACLKA1 0xCEA0 /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3 0xCEB0 /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0 /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0 /* Command not documented */
+#define MCS_GVDDSET0xD800 /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900 /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P 0xE100 /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N 0xE200 /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6 /* Command not documented */
+#define MCS_CMD2_ENA1 0xFF00 /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2 0xFF80 /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+ struct udevice *reg;
+ struct gpio_desc reset;
+};
+
+static const struct display_timing default_timing = {
+ .pix
[U-Boot] [PATCH v3 05/10] video: add support of STM32 MIPI DSI controller driver
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/Kconfig | 10 +
drivers/video/stm32/Makefile| 1 +
drivers/video/stm32/stm32_dsi.c | 428
3 files changed, 439 insertions(+)
create mode 100644 drivers/video/stm32/stm32_dsi.c
diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 78b1fac..5b5e2c4 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -13,6 +13,16 @@ menuconfig VIDEO_STM32
DSI. This option enables these supports which can be used on
devices which have RGB TFT or DSI display connected.
+config VIDEO_STM32_DSI
+ bool "Enable STM32 DSI video support"
+ depends on VIDEO_STM32
+ select VIDEO_MIPI_DSI
+ select VIDEO_BRIDGE
+ select VIDEO_DW_MIPI_DSI
+ help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI devices connected.
+
config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 7297e5f..f8b42d1 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -6,3 +6,4 @@
# Yannick Fertre
obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..b7feb64
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,428 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ * Yannick Fertre for STMicroelectronics.
+ *
+ * This MIPI DSI controller driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_130 0x31333000 /* IP version 1.30 */
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0) /* DSI Mode */
+#define WCFGR_COLMUX GENMASK(3, 1) /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404 /* Wrapper Control Reg */
+#define WCR_DSIEN BIT(3) /* DSI ENable */
+
+#define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8) /* PLL Lock Status */
+#define WISR_RRS BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0) /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0) /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2) /* pll loop DIVision Factor */
+#define WRPCR_IDF GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN 10
+#define NDIV_MAX 125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+ DSI_RGB565_CONF1,
+ DSI_RGB565_CONF2,
+ DSI_RGB565_CONF3,
+ DSI_RGB666_CONF1,
+ DSI_RGB666_CONF2,
+ DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS 31250
+#define LANE_MAX_KBPS 50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+ struct mipi_dsi_device device;
+ void __iomem *base;
+ struct udevice *panel;
+ u32 pllref_clk;
+ u32 hw_version;
+ int lane_min_kbps;
+ int lane_max_kbps;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+ writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+ return readl(dsi->base + reg);
+}
+
+static inline void dsi_set(str
[U-Boot] [PATCH v3 08/10] arm: dts: stm32: add dsi for STM32F746
Add mipi dsi bridge node in device-tree.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f746.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index afa7832..005d267 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -340,6 +340,18 @@
u-boot,dm-pre-reloc;
status = "disabled";
};
+
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016C00 0x800>;
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+ u-boot,dm-pre-reloc;
+ status = "disabled";
+ };
};
};
--
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[U-Boot] [PATCH v3 07/10] video: add support of panel RM68200
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 8 +
drivers/video/Makefile | 1 +
drivers/video/raydium-rm68200.c | 339
3 files changed, 348 insertions(+)
create mode 100644 drivers/video/raydium-rm68200.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index f54f97e..1aa826d 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -336,6 +336,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A
help
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+config VIDEO_LCD_RAYDIUM_RM68200
+ bool "RM68200 DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Support for Raydium rm68200 720x1280 dsi 2dl video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 67f5ca7..d60ff9d 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..cf48331
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,339 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This rm68200 panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR 0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1 0x00
+#define GOA_VSTV2 0x07
+#define GOA_VCLK1 0x0E
+#define GOA_VCLK2 0x17
+#define GOA_VCLK_OPT1 0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1 0x6D
+#define MCS_GOA_GPO2 0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP 0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN 0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+ struct udevice *reg;
+ struct udevice *backlight;
+ struct gpio_desc reset;
[U-Boot] [PATCH v3 03/10] video: add support of MIPI DSI interface
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig| 8 +
drivers/video/Makefile | 1 +
drivers/video/mipi_dsi.c | 828 +++
include/mipi_dsi.h | 451 ++
4 files changed, 1288 insertions(+)
create mode 100644 drivers/video/mipi_dsi.c
create mode 100644 include/mipi_dsi.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ecb57d8..6048291 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -73,6 +73,14 @@ config VIDEO_ANSI
Enable ANSI escape sequence decoding for a more fully functional
console.
+config VIDEO_MIPI_DSI
+ bool "Support MIPI DSI interface"
+ depends on DM_VIDEO
+ help
+ Support MIPI DSI interface for driving a MIPI compatible device.
+ The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
+ serial interface between a host processor and a display module.
+
config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0f41a23..1e88741 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o
obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
diff --git a/drivers/video/mipi_dsi.c b/drivers/video/mipi_dsi.c
new file mode 100644
index 000..ccc5794
--- /dev/null
+++ b/drivers/video/mipi_dsi.c
@@ -0,0 +1,828 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Mipi_dsi.c contains a set of dsi helpers.
+ * This file is inspired from the drm helper file
drivers/gpu/drm/drm_mipi_dsi.c
+ * (kernel linux).
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->attach)
+ return -ENOSYS;
+
+ return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->detach)
+ return -ENOSYS;
+
+ return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+/**
+ * mipi_dsi_device_transfer - transfer message to a DSI device
+ * @dsi: DSI peripheral
+ * @msg: message
+ */
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+ struct mipi_dsi_msg *msg)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->transfer)
+ return -ENOSYS;
+
+ if (dsi->mode_flags & MIPI_
[U-Boot] [PATCH v3 01/10] video: stm32: stm32_ltdc: add bridge to display controller
Manage a bridge insert between the display controller & a panel.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/stm32_ltdc.c | 143 ++-
1 file changed, 82 insertions(+), 61 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc6c889..6d075e3 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -4,22 +4,20 @@
* Author(s): Philippe Cornu for STMicroelectronics.
* Yannick Fertre for STMicroelectronics.
*/
-
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
struct stm32_ltdc_priv {
void __iomem *regs;
- struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -174,8 +172,8 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp
l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
+ __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
@@ -209,23 +207,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
}
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+ struct display_timing *timings)
{
void __iomem *regs = priv->regs;
- struct display_timing *timing = &priv->timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
/* Convert video timings to ltdc timings */
- hsync = timing->hsync_len.typ - 1;
- vsync = timing->vsync_len.typ - 1;
- acc_hbp = hsync + timing->hback_porch.typ;
- acc_vbp = vsync + timing->vback_porch.typ;
- acc_act_w = acc_hbp + timing->hactive.typ;
- acc_act_h = acc_vbp + timing->vactive.typ;
- total_w = acc_act_w + timing->hfront_porch.typ;
- total_h = acc_act_h + timing->vfront_porch.typ;
+ hsync = timings->hsync_len.typ - 1;
+ vsync = timings->vsync_len.typ - 1;
+ acc_hbp = hsync + timings->hback_porch.typ;
+ acc_vbp = vsync + timings->vback_porch.typ;
+ acc_act_w = acc_hbp + timings->hactive.typ;
+ acc_act_h = acc_vbp + timings->vactive.typ;
+ total_w = acc_act_w + timings->hfront_porch.typ;
+ total_h = acc_act_h + timings->vfront_porch.typ;
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -247,14 +245,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv
*priv)
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
- if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
- if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
- if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
- if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -330,96 +328,119 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
- struct udevice *panel;
+ struct udevice *bridge = NULL;
+ struct udevice *panel = NULL;
+ struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
- int rate, ret;
+ int ret;
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
- debug("%s: ltdc dt register address error\n", __func__);
+ dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
ret = clk_get_by_index(dev, 0, &pclk);
if (ret) {
- debug(&quo
[U-Boot] [PATCH v3 04/10] video: add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host bridge driver, based on the Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. Signed-off-by: Yannick Fertré --- drivers/video/Kconfig | 9 + drivers/video/Makefile | 1 + drivers/video/dw_mipi_dsi.c | 827 include/dw_mipi_dsi.h | 33 ++ 4 files changed, 870 insertions(+) create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 include/dw_mipi_dsi.h diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 6048291..ede351d 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -667,6 +667,15 @@ config VIDEO_DW_HDMI rather requires a SoC-specific glue driver to call it), it can not be enabled from the configuration menu. +config VIDEO_DW_MIPI_DSI + bool + help + Enables the common driver code for the Synopsis Designware + MIPI DSI block found in SoCs from various vendors. + As this does not provide any functionality by itself (but + rather requires a SoC-specific glue driver to call it), it + can not be enabled from the configuration menu. + config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" help diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 1e88741..ae143dc 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o +obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o obj-$(CONFIG_VIDEO_EFI) += efi.o obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c new file mode 100644 index 000..0fd6687 --- /dev/null +++ b/drivers/video/dw_mipi_dsi.c @@ -0,0 +1,827 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + * Author(s): Philippe Cornu for STMicroelectronics. + *Yannick Fertre for STMicroelectronics. + * + * This generic Synopsys DesignWare MIPI DSI host driver is inspired from + * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HWVER_131 0x31333100 /* IP version 1.31 */ + +#define DSI_VERSION0x00 +#define VERSIONGENMASK(31, 8) + +#define DSI_PWR_UP 0x04 +#define RESET 0 +#define POWERUPBIT(0) + +#define DSI_CLKMGR_CFG 0x08 +#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8) +#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff) + +#define DSI_DPI_VCID 0x0c +#define DPI_VCID(vcid) ((vcid) & 0x3) + +#define DSI_DPI_COLOR_CODING 0x10 +#define LOOSELY18_EN BIT(8) +#define DPI_COLOR_CODING_16BIT_1 0x0 +#define DPI_COLOR_CODING_16BIT_2 0x1 +#define DPI_COLOR_CODING_16BIT_3 0x2 +#define DPI_COLOR_CODING_18BIT_1 0x3 +#define DPI_COLOR_CODING_18BIT_2 0x4 +#define DPI_COLOR_CODING_24BIT 0x5 + +#define DSI_DPI_CFG_POL0x14 +#define COLORM_ACTIVE_LOW BIT(4) +#define SHUTD_ACTIVE_LOW BIT(3) +#define HSYNC_ACTIVE_LOW BIT(2) +#define VSYNC_ACTIVE_LOW BIT(1) +#define DATAEN_ACTIVE_LOW BIT(0) + +#define DSI_DPI_LP_CMD_TIM 0x18 +#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16) +#define INVACT_LPCMD_TIME(p) ((p) & 0xff) + +#define DSI_DBI_VCID 0x1c +#define DSI_DBI_CFG0x20 +#define DSI_DBI_PARTITIONING_EN0x24 +#define DSI_DBI_CMDSIZE0x28 + +#define DSI_PCKHDL_CFG 0x2c +#define CRC_RX_EN BIT(4) +#define ECC_RX_EN BIT(3) +#define BTA_EN BIT(2) +#define EOTP_RX_EN BIT(1) +#define EOTP_TX_EN BIT(0) + +#define DSI_GEN_VCID 0x30 + +#define DSI_MODE_CFG 0x34 +#define ENABLE_VIDEO_MODE 0 +#define ENABLE_CMD_MODEBIT(0) + +#define DSI_VID_MODE_CFG 0x38 +#define ENABLE_LOW_POWER (0x3f << 8) +#define ENABLE_LOW_POWER_MASK (0x3f << 8) +#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0 +#define VID_MODE_TYPE
[U-Boot] [PATCH v3 02/10] include: Add new DCS commands in the enum list
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
Signed-off-by: Yannick Fertré
---
include/mipi_display.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/mipi_display.h b/include/mipi_display.h
index ddcc8ca..19aa65a 100644
--- a/include/mipi_display.h
+++ b/include/mipi_display.h
@@ -115,6 +115,14 @@ enum {
MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
MIPI_DCS_GET_SCANLINE = 0x45,
+ MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CONTROL_DISPLAY= 0x54, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
+ MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,/* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,/* MIPI DCS 1.3 */
MIPI_DCS_READ_DDB_START = 0xA1,
MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
};
--
2.7.4
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[U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board
Version 1: - Initial commit. Version 2: - swap patches to avoid compilation issue. - remove panel timings from device tree. Version 3: - Share same include file mipi_display.h with kernel linux. - Rework ltdc driver with last comments of Anatolij Gustshin. - Check ordering (file dw_mipi_dsi.c). - Rename mipi_display.c to mipi_dsi.c. This serie contains all patchsets needed for displaying a splash screen on the stm32f769 disco board. A new config has been created configs/stm32f769-disco_defconfig. This is necessary due to the difference of panels between stm32f769-disco & stm32f746-disco boards. Yannick Fertré (10): video: stm32: stm32_ltdc: add bridge to display controller include: Add new DCS commands in the enum list video: add support of MIPI DSI interface video: add MIPI DSI host controller bridge video: add support of STM32 MIPI DSI controller driver video: add support of panel OTM8009A video: add support of panel RM68200 arm: dts: stm32: add dsi for STM32F746 arm: dts: stm32: add display for STM32F769 disco board board: Add STM32F769 SoC, discovery board support arch/arm/dts/stm32f746.dtsi| 12 + arch/arm/dts/stm32f769-disco.dts | 41 ++ configs/stm32f769-disco_defconfig | 67 +++ drivers/video/Kconfig | 33 ++ drivers/video/Makefile | 4 + drivers/video/dw_mipi_dsi.c| 827 drivers/video/mipi_dsi.c | 828 + drivers/video/orisetech_otm8009a.c | 367 drivers/video/raydium-rm68200.c| 339 +++ drivers/video/stm32/Kconfig| 10 + drivers/video/stm32/Makefile | 1 + drivers/video/stm32/stm32_dsi.c| 428 +++ drivers/video/stm32/stm32_ltdc.c | 143 --- include/dw_mipi_dsi.h | 33 ++ include/mipi_display.h | 8 + include/mipi_dsi.h | 451 16 files changed, 3531 insertions(+), 61 deletions(-) create mode 100644 configs/stm32f769-disco_defconfig create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 drivers/video/mipi_dsi.c create mode 100644 drivers/video/orisetech_otm8009a.c create mode 100644 drivers/video/raydium-rm68200.c create mode 100644 drivers/video/stm32/stm32_dsi.c create mode 100644 include/dw_mipi_dsi.h create mode 100644 include/mipi_dsi.h -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [ v2 06/10] video: add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 +
drivers/video/Makefile | 1 +
drivers/video/dw_mipi_dsi.c | 826
include/dw_mipi_dsi.h | 32 ++
4 files changed, 868 insertions(+)
create mode 100644 drivers/video/dw_mipi_dsi.c
create mode 100644 include/dw_mipi_dsi.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e1029e5..3ccc8df 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -674,6 +674,15 @@ config VIDEO_DW_HDMI
rather requires a SoC-specific glue driver to call it), it
can not be enabled from the configuration menu.
+config VIDEO_DW_MIPI_DSI
+ bool
+ help
+ Enables the common driver code for the Synopsis Designware
+ MIPI DSI block found in SoCs from various vendors.
+ As this does not provide any functionality by itself (but
+ rather requires a SoC-specific glue driver to call it), it
+ can not be enabled from the configuration menu.
+
config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 018343f..bb2fd3c 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
obj-$(CONFIG_LG4573) += lg4573.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
new file mode 100644
index 000..db278c5
--- /dev/null
+++ b/drivers/video/dw_mipi_dsi.c
@@ -0,0 +1,826 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ *Yannick Fertre for STMicroelectronics.
+ *
+ * This generic Synopsys DesignWare MIPI DSI host driver is inspired from
+ * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+#define DSI_PWR_UP 0x04
+#define RESET 0
+#define POWERUPBIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff)
+
+#define DSI_DPI_VCID 0x0c
+#define DPI_VCID(vcid) ((vcid) & 0x3)
+
+#define DSI_DPI_COLOR_CODING 0x10
+#define LOOSELY18_EN BIT(8)
+#define DPI_COLOR_CODING_16BIT_1 0x0
+#define DPI_COLOR_CODING_16BIT_2 0x1
+#define DPI_COLOR_CODING_16BIT_3 0x2
+#define DPI_COLOR_CODING_18BIT_1 0x3
+#define DPI_COLOR_CODING_18BIT_2 0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL0x14
+#define COLORM_ACTIVE_LOW BIT(4)
+#define SHUTD_ACTIVE_LOW BIT(3)
+#define HSYNC_ACTIVE_LOW BIT(2)
+#define VSYNC_ACTIVE_LOW BIT(1)
+#define DATAEN_ACTIVE_LOW BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p) ((p) & 0xff)
+
+#define DSI_DBI_VCID 0x1c
+#define DSI_DBI_CFG0x20
+#define DSI_DBI_PARTITIONING_EN0x24
+#define DSI_DBI_CMDSIZE0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define CRC_RX_EN BIT(4)
+#define ECC_RX_EN BIT(3)
+#define BTA_EN BIT(2)
+#define EOTP_RX_EN BIT(1)
+#define EOTP_TX_EN BIT(0)
+
+#define DSI_GEN_VCID 0x30
+
+#define DSI_MODE_CFG 0x34
+#define ENABLE_VIDEO_MODE 0
+#define ENABLE_CMD_MODEBIT(0)
+
+#define DSI_VID_MODE_CFG 0x38
+#define ENABLE_LOW_POWER (0x3f << 8)
+#define ENABLE_LOW_POWER_MASK (0x3f << 8)
+#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0
+#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1
+#define VID_MODE_TYPE_BURST0x2
+#de
[U-Boot] [ v2 10/10] board: Add STM32F769 SoC, discovery board support
Signed-off-by: Yannick Fertré --- configs/stm32f769-disco_defconfig | 67 +++ 1 file changed, 67 insertions(+) create mode 100644 configs/stm32f769-disco_defconfig diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig new file mode 100644 index 000..bc99894 --- /dev/null +++ b/configs/stm32f769-disco_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARM=y +CONFIG_STM32=y +CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_MALLOC_F_LEN=0xC00 +CONFIG_STM32F7=y +CONFIG_TARGET_STM32F746_DISCO=y +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_BMP=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +# CONFIG_BLK is not set +CONFIG_DM_MMC=y +# CONFIG_SPL_DM_MMC is not set +CONFIG_ARM_PL180_MMCI=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_STM32_QSPI=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_VIDEO_BRIDGE=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [ v2 09/10] arm: dts: stm32: add display for STM32F769 disco board
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f769-disco.dts | 41
1 file changed, 41 insertions(+)
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 59c9d31..dec04bc 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -84,6 +84,18 @@
compatible = "st,button1";
button-gpio = <&gpioa 0 0>;
};
+
+ panel: panel {
+ compatible = "orisetech,otm8009a";
+ reset-gpios = <&gpioj 15 1>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
};
&clk_hse {
@@ -264,3 +276,32 @@
bus-width = <4>;
max-frequency = <2500>;
};
+
+<dc {
+ status = "okay";
+
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ port@0 {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ port@1 {
+ dsi_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
+};
--
1.9.1
___
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[U-Boot] [ v2 08/10] arm: dts: stm32: add dsi for STM32F746
Add mipi dsi bridge node in device-tree.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f746.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index afa7832..005d267 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -340,6 +340,18 @@
u-boot,dm-pre-reloc;
status = "disabled";
};
+
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016C00 0x800>;
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+ u-boot,dm-pre-reloc;
+ status = "disabled";
+ };
};
};
--
1.9.1
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[U-Boot] [ v2 07/10] video: add support of STM32 MIPI DSI controller driver
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/Kconfig | 10 +
drivers/video/stm32/Makefile| 1 +
drivers/video/stm32/stm32_dsi.c | 427
3 files changed, 438 insertions(+)
create mode 100644 drivers/video/stm32/stm32_dsi.c
diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 78b1fac..5b5e2c4 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -13,6 +13,16 @@ menuconfig VIDEO_STM32
DSI. This option enables these supports which can be used on
devices which have RGB TFT or DSI display connected.
+config VIDEO_STM32_DSI
+ bool "Enable STM32 DSI video support"
+ depends on VIDEO_STM32
+ select VIDEO_MIPI_DSI
+ select VIDEO_BRIDGE
+ select VIDEO_DW_MIPI_DSI
+ help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI devices connected.
+
config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 7297e5f..f8b42d1 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -6,3 +6,4 @@
# Yannick Fertre
obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..43da83d
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,427 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ * Yannick Fertre for STMicroelectronics.
+ *
+ * This MIPI DSI controller driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_130 0x31333000 /* IP version 1.30 */
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0) /* DSI Mode */
+#define WCFGR_COLMUX GENMASK(3, 1) /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404 /* Wrapper Control Reg */
+#define WCR_DSIEN BIT(3) /* DSI ENable */
+
+#define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8) /* PLL Lock Status */
+#define WISR_RRS BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0) /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0) /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2) /* pll loop DIVision Factor */
+#define WRPCR_IDF GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN 10
+#define NDIV_MAX 125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+ DSI_RGB565_CONF1,
+ DSI_RGB565_CONF2,
+ DSI_RGB565_CONF3,
+ DSI_RGB666_CONF1,
+ DSI_RGB666_CONF2,
+ DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS 31250
+#define LANE_MAX_KBPS 50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+ struct mipi_dsi_device device;
+ void __iomem *base;
+ struct udevice *panel;
+ u32 pllref_clk;
+ u32 hw_version;
+ int lane_min_kbps;
+ int lane_max_kbps;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+ writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+ return readl(dsi->base + reg);
+}
+
+static inline void dsi_set(str
[U-Boot] [ v2 04/10] video: add support of panel OTM8009A
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 8 +
drivers/video/Makefile | 1 +
drivers/video/orisetech_otm8009a.c | 366 +
3 files changed, 375 insertions(+)
create mode 100644 drivers/video/orisetech_otm8009a.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 560da1a..8a168c8 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -329,6 +329,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
+config VIDEO_LCD_ORISETECH_OTM8009A
+ bool "OTM8009A DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 4e2ec41..b9d7d81 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
obj-$(CONFIG_VIDEO_EFI) += efi.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/orisetech_otm8009a.c
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..c5a1ee4
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This otm8009a panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x /* Address Shift Function */
+#define MCS_PANSET 0xB3A6 /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2 /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4 /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181 /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1 /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480 /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A /* Command not documented */
+#define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80 /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90 /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0 /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0 /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0 /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0 /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0 /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0 /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80 /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90 /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0 /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0 /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0 /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0 /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80 /* GOA VST Setting */
+#define MCS_GOACLKA1 0xCEA0 /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3 0xCEB0 /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0 /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0 /* Command not documented */
+#define MCS_GVDDSET0xD800 /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900 /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P 0xE100 /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N 0xE200 /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6 /* Command not documented */
+#define MCS_CMD2_ENA1 0xFF00 /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2 0xFF80 /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+ struct udevice *reg;
+ struct gpio_desc reset;
+};
+
+static const struct display_timing default_timing = {
+ .pixelclock.typ = 32729000,
+
[U-Boot] [ v2 05/10] video: add support of panel RM68200
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 8 +
drivers/video/Makefile | 1 +
drivers/video/raydium-rm68200.c | 338
3 files changed, 347 insertions(+)
create mode 100644 drivers/video/raydium-rm68200.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8a168c8..e1029e5 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -337,6 +337,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A
help
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+config VIDEO_LCD_RAYDIUM_RM68200
+ bool "RM68200 DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Support for Raydium rm68200 720x1280 dsi 2dl video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index b9d7d81..018343f 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_VIDEO_EFI) += efi.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..b0b10c1
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This rm68200 panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR 0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1 0x00
+#define GOA_VSTV2 0x07
+#define GOA_VCLK1 0x0E
+#define GOA_VCLK2 0x17
+#define GOA_VCLK_OPT1 0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1 0x6D
+#define MCS_GOA_GPO2 0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP 0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN 0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+ struct udevice *reg;
+ struct udevice *backlight;
+ struct gpio_desc reset;
+};
+
+static const s
[U-Boot] [ v2 03/10] video: add support of MIPI DSI interface
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig| 9 +
drivers/video/Makefile | 1 +
drivers/video/mipi_display.c | 817 +++
include/mipi_display.h | 257 +-
4 files changed, 1083 insertions(+), 1 deletion(-)
create mode 100644 drivers/video/mipi_display.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 5ee9032..560da1a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -73,6 +73,15 @@ config VIDEO_ANSI
Enable ANSI escape sequence decoding for a more fully functional
console.
+config VIDEO_MIPI_DSI
+ bool "Support MIPI DSI interface"
+ depends on DM_VIDEO
+ default y if DM_VIDEO
+ help
+ Support MIPI DSI interface for driving a MIPI compatible device.
+ The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
+ serial interface between a host processor and a display module.
+
config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7c89c67..4e2ec41 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
obj-$(CONFIG_LG4573) += lg4573.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
obj-${CONFIG_EXYNOS_FB} += exynos/
diff --git a/drivers/video/mipi_display.c b/drivers/video/mipi_display.c
new file mode 100644
index 000..9c96b9d
--- /dev/null
+++ b/drivers/video/mipi_display.c
@@ -0,0 +1,817 @@
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Mipi_display.c contains a set of dsi helpers.
+ * This file is inspired from the drm helper file
drivers/gpu/drm/drm_mipi_dsi.c
+ * (kernel linux).
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->attach)
+ return -ENOSYS;
+
+ return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->detach)
+ return -ENOSYS;
+
+ return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+/**
+ * mipi_dsi_device_transfer - transfer message to a DSI device
+ * @dsi: DSI peripheral
+ * @msg: message
+ */
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+ struct mipi_dsi_msg *msg)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->transfer)
+ return -ENOSYS;
+
+ if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+ msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+ return ops->trans
[U-Boot] [ v2 00/10] splash screen on the stm32f769 disco board
Version 1: - Initial commit: Version2: - swap patches to avoid compilation issue. - remove panel timings from device tree This serie contains all patchsets needed for displaying a splash screen on the stm32f769 disco board. A new config has been created configs/stm32f769-disco_defconfig. This is necessary due to the difference of panels between stm32f769-disco & stm32f746-disco boards. Yannick Fertré (10): dm: panel: get timings from panel video: stm32: stm32_ltdc: add bridge to display controller video: add support of MIPI DSI interface video: add support of panel OTM8009A video: add support of panel RM68200 video: add MIPI DSI host controller bridge video: add support of STM32 MIPI DSI controller driver arm: dts: stm32: add dsi for STM32F746 arm: dts: stm32: add display for STM32F769 disco board board: Add STM32F769 SoC, discovery board support arch/arm/dts/stm32f746.dtsi| 12 + arch/arm/dts/stm32f769-disco.dts | 41 ++ configs/stm32f769-disco_defconfig | 67 +++ drivers/video/Kconfig | 34 ++ drivers/video/Makefile | 4 + drivers/video/dw_mipi_dsi.c| 826 + drivers/video/mipi_display.c | 817 drivers/video/orisetech_otm8009a.c | 366 drivers/video/panel-uclass.c | 11 + drivers/video/raydium-rm68200.c| 338 +++ drivers/video/stm32/Kconfig| 10 + drivers/video/stm32/Makefile | 1 + drivers/video/stm32/stm32_dsi.c| 427 +++ drivers/video/stm32/stm32_ltdc.c | 154 --- include/dw_mipi_dsi.h | 32 ++ include/mipi_display.h | 257 +++- include/panel.h| 18 + 17 files changed, 3352 insertions(+), 63 deletions(-) create mode 100644 configs/stm32f769-disco_defconfig create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 drivers/video/mipi_display.c create mode 100644 drivers/video/orisetech_otm8009a.c create mode 100644 drivers/video/raydium-rm68200.c create mode 100644 drivers/video/stm32/stm32_dsi.c create mode 100644 include/dw_mipi_dsi.h -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [ v2 02/10] video: stm32: stm32_ltdc: add bridge to display controller
Manage a bridge insert between the display controller & a panel.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/stm32_ltdc.c | 154 +++
1 file changed, 92 insertions(+), 62 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc6c889..4a1db5e 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -4,22 +4,20 @@
* Author(s): Philippe Cornu for STMicroelectronics.
* Yannick Fertre for STMicroelectronics.
*/
-
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
struct stm32_ltdc_priv {
void __iomem *regs;
- struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -174,8 +172,8 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp
l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
+ __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
@@ -209,23 +207,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
}
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+ struct display_timing *timings)
{
void __iomem *regs = priv->regs;
- struct display_timing *timing = &priv->timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
/* Convert video timings to ltdc timings */
- hsync = timing->hsync_len.typ - 1;
- vsync = timing->vsync_len.typ - 1;
- acc_hbp = hsync + timing->hback_porch.typ;
- acc_vbp = vsync + timing->vback_porch.typ;
- acc_act_w = acc_hbp + timing->hactive.typ;
- acc_act_h = acc_vbp + timing->vactive.typ;
- total_w = acc_act_w + timing->hfront_porch.typ;
- total_h = acc_act_h + timing->vfront_porch.typ;
+ hsync = timings->hsync_len.typ - 1;
+ vsync = timings->vsync_len.typ - 1;
+ acc_hbp = hsync + timings->hback_porch.typ;
+ acc_vbp = vsync + timings->vback_porch.typ;
+ acc_act_w = acc_hbp + timings->hactive.typ;
+ acc_act_h = acc_vbp + timings->vactive.typ;
+ total_w = acc_act_w + timings->hfront_porch.typ;
+ total_h = acc_act_h + timings->vfront_porch.typ;
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -247,14 +245,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv
*priv)
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
- if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
- if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
- if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
- if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -330,96 +328,128 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
- struct udevice *panel;
+#ifdef CONFIG_VIDEO_BRIDGE
+ struct udevice *bridge = NULL;
+#endif
+ struct udevice *panel = NULL;
+ struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
- int rate, ret;
+ int ret;
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
- debug("%s: ltdc dt register address error\n", __func__);
+ dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
ret = clk_get_by_index(dev, 0, &pclk);
if (ret) {
-
[U-Boot] [ v2 01/10] dm: panel: get timings from panel
Get timings from panel instead of read device tree.
Signed-off-by: Yannick Fertré
---
drivers/video/panel-uclass.c | 11 +++
include/panel.h | 18 ++
2 files changed, 29 insertions(+)
diff --git a/drivers/video/panel-uclass.c b/drivers/video/panel-uclass.c
index 2841bb3..aec44a8 100644
--- a/drivers/video/panel-uclass.c
+++ b/drivers/video/panel-uclass.c
@@ -18,6 +18,17 @@ int panel_enable_backlight(struct udevice *dev)
return ops->enable_backlight(dev);
}
+int panel_get_display_timing(struct udevice *dev,
+struct display_timing *timings)
+{
+ struct panel_ops *ops = panel_get_ops(dev);
+
+ if (!ops->get_display_timing)
+ return -ENOSYS;
+
+ return ops->get_display_timing(dev, timings);
+}
+
UCLASS_DRIVER(panel) = {
.id = UCLASS_PANEL,
.name = "panel",
diff --git a/include/panel.h b/include/panel.h
index 46dca48b..6237d32 100644
--- a/include/panel.h
+++ b/include/panel.h
@@ -15,6 +15,15 @@ struct panel_ops {
* @return 0 if OK, -ve on error
*/
int (*enable_backlight)(struct udevice *dev);
+ /**
+* get_timings() - Get display timings from panel.
+*
+* @dev:Panel device containing the display timings
+* @tim:Place to put timings
+* @return 0 if OK, -ve on error
+*/
+ int (*get_display_timing)(struct udevice *dev,
+ struct display_timing *timing);
};
#define panel_get_ops(dev) ((struct panel_ops *)(dev)->driver->ops)
@@ -27,4 +36,13 @@ struct panel_ops {
*/
int panel_enable_backlight(struct udevice *dev);
+/**
+ * panel_get_display_timing() - Get display timings from panel.
+ *
+ * @dev: Panel device containing the display timings
+ * @return 0 if OK, -ve on error
+ */
+int panel_get_display_timing(struct udevice *dev,
+struct display_timing *timing);
+
#endif
--
1.9.1
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[U-Boot] [ v1 07/10] video: add support of STM32 MIPI DSI controller driver
Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/Kconfig | 10 +
drivers/video/stm32/Makefile| 1 +
drivers/video/stm32/stm32_dsi.c | 427
3 files changed, 438 insertions(+)
create mode 100644 drivers/video/stm32/stm32_dsi.c
diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 78b1fac..5b5e2c4 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -13,6 +13,16 @@ menuconfig VIDEO_STM32
DSI. This option enables these supports which can be used on
devices which have RGB TFT or DSI display connected.
+config VIDEO_STM32_DSI
+ bool "Enable STM32 DSI video support"
+ depends on VIDEO_STM32
+ select VIDEO_MIPI_DSI
+ select VIDEO_BRIDGE
+ select VIDEO_DW_MIPI_DSI
+ help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI devices connected.
+
config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 7297e5f..f8b42d1 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -6,3 +6,4 @@
# Yannick Fertre
obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..43da83d
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,427 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ * Yannick Fertre for STMicroelectronics.
+ *
+ * This MIPI DSI controller driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_130 0x31333000 /* IP version 1.30 */
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0) /* DSI Mode */
+#define WCFGR_COLMUX GENMASK(3, 1) /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404 /* Wrapper Control Reg */
+#define WCR_DSIEN BIT(3) /* DSI ENable */
+
+#define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8) /* PLL Lock Status */
+#define WISR_RRS BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0) /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0) /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2) /* pll loop DIVision Factor */
+#define WRPCR_IDF GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN 10
+#define NDIV_MAX 125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+ DSI_RGB565_CONF1,
+ DSI_RGB565_CONF2,
+ DSI_RGB565_CONF3,
+ DSI_RGB666_CONF1,
+ DSI_RGB666_CONF2,
+ DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS 31250
+#define LANE_MAX_KBPS 50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+ struct mipi_dsi_device device;
+ void __iomem *base;
+ struct udevice *panel;
+ u32 pllref_clk;
+ u32 hw_version;
+ int lane_min_kbps;
+ int lane_max_kbps;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+ writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+ return readl(dsi->base + reg);
+}
+
+static inline void dsi_set(str
[U-Boot] [ v1 10/10] board: Add STM32F769 SoC, discovery board support
Signed-off-by: Yannick Fertré --- configs/stm32f769-disco_defconfig | 67 +++ 1 file changed, 67 insertions(+) create mode 100644 configs/stm32f769-disco_defconfig diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig new file mode 100644 index 000..bc99894 --- /dev/null +++ b/configs/stm32f769-disco_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARM=y +CONFIG_STM32=y +CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_MALLOC_F_LEN=0xC00 +CONFIG_STM32F7=y +CONFIG_TARGET_STM32F746_DISCO=y +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_BMP=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +# CONFIG_BLK is not set +CONFIG_DM_MMC=y +# CONFIG_SPL_DM_MMC is not set +CONFIG_ARM_PL180_MMCI=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_STM32_QSPI=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_VIDEO_BRIDGE=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER is not set -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [ v1 08/10] arm: dts: stm32: add dsi for STM32F746
Add mipi dsi bridge node in device-tree.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f746.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index afa7832..005d267 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -340,6 +340,18 @@
u-boot,dm-pre-reloc;
status = "disabled";
};
+
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016C00 0x800>;
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+ u-boot,dm-pre-reloc;
+ status = "disabled";
+ };
};
};
--
1.9.1
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[U-Boot] [ v1 06/10] video: add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 +
drivers/video/Makefile | 1 +
drivers/video/dw_mipi_dsi.c | 826
include/dw_mipi_dsi.h | 32 ++
4 files changed, 868 insertions(+)
create mode 100644 drivers/video/dw_mipi_dsi.c
create mode 100644 include/dw_mipi_dsi.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e1029e5..3ccc8df 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -674,6 +674,15 @@ config VIDEO_DW_HDMI
rather requires a SoC-specific glue driver to call it), it
can not be enabled from the configuration menu.
+config VIDEO_DW_MIPI_DSI
+ bool
+ help
+ Enables the common driver code for the Synopsis Designware
+ MIPI DSI block found in SoCs from various vendors.
+ As this does not provide any functionality by itself (but
+ rather requires a SoC-specific glue driver to call it), it
+ can not be enabled from the configuration menu.
+
config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 018343f..bb2fd3c 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
obj-$(CONFIG_LG4573) += lg4573.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
new file mode 100644
index 000..db278c5
--- /dev/null
+++ b/drivers/video/dw_mipi_dsi.c
@@ -0,0 +1,826 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ *Yannick Fertre for STMicroelectronics.
+ *
+ * This generic Synopsys DesignWare MIPI DSI host driver is inspired from
+ * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+#define DSI_PWR_UP 0x04
+#define RESET 0
+#define POWERUPBIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff)
+
+#define DSI_DPI_VCID 0x0c
+#define DPI_VCID(vcid) ((vcid) & 0x3)
+
+#define DSI_DPI_COLOR_CODING 0x10
+#define LOOSELY18_EN BIT(8)
+#define DPI_COLOR_CODING_16BIT_1 0x0
+#define DPI_COLOR_CODING_16BIT_2 0x1
+#define DPI_COLOR_CODING_16BIT_3 0x2
+#define DPI_COLOR_CODING_18BIT_1 0x3
+#define DPI_COLOR_CODING_18BIT_2 0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL0x14
+#define COLORM_ACTIVE_LOW BIT(4)
+#define SHUTD_ACTIVE_LOW BIT(3)
+#define HSYNC_ACTIVE_LOW BIT(2)
+#define VSYNC_ACTIVE_LOW BIT(1)
+#define DATAEN_ACTIVE_LOW BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p) ((p) & 0xff)
+
+#define DSI_DBI_VCID 0x1c
+#define DSI_DBI_CFG0x20
+#define DSI_DBI_PARTITIONING_EN0x24
+#define DSI_DBI_CMDSIZE0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define CRC_RX_EN BIT(4)
+#define ECC_RX_EN BIT(3)
+#define BTA_EN BIT(2)
+#define EOTP_RX_EN BIT(1)
+#define EOTP_TX_EN BIT(0)
+
+#define DSI_GEN_VCID 0x30
+
+#define DSI_MODE_CFG 0x34
+#define ENABLE_VIDEO_MODE 0
+#define ENABLE_CMD_MODEBIT(0)
+
+#define DSI_VID_MODE_CFG 0x38
+#define ENABLE_LOW_POWER (0x3f << 8)
+#define ENABLE_LOW_POWER_MASK (0x3f << 8)
+#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0
+#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1
+#define VID_MODE_TYPE_BURST0x2
+#de
[U-Boot] [ v1 05/10] video: add support of panel RM68200
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 8 +
drivers/video/Makefile | 1 +
drivers/video/raydium-rm68200.c | 338
3 files changed, 347 insertions(+)
create mode 100644 drivers/video/raydium-rm68200.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8a168c8..e1029e5 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -337,6 +337,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A
help
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+config VIDEO_LCD_RAYDIUM_RM68200
+ bool "RM68200 DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Support for Raydium rm68200 720x1280 dsi 2dl video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index b9d7d81..018343f 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_VIDEO_EFI) += efi.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..b0b10c1
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This rm68200 panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR 0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1 0x00
+#define GOA_VSTV2 0x07
+#define GOA_VCLK1 0x0E
+#define GOA_VCLK2 0x17
+#define GOA_VCLK_OPT1 0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1 0x6D
+#define MCS_GOA_GPO2 0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP 0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN 0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+ struct udevice *reg;
+ struct udevice *backlight;
+ struct gpio_desc reset;
+};
+
+static const s
[U-Boot] [ v1 04/10] video: add support of panel OTM8009A
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 8 +
drivers/video/Makefile | 1 +
drivers/video/orisetech_otm8009a.c | 366 +
3 files changed, 375 insertions(+)
create mode 100644 drivers/video/orisetech_otm8009a.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 560da1a..8a168c8 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -329,6 +329,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
+config VIDEO_LCD_ORISETECH_OTM8009A
+ bool "OTM8009A DSI LCD panel support"
+ depends on DM_VIDEO
+ select VIDEO_MIPI_DSI
+ default n
+ help
+ Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 4e2ec41..b9d7d81 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
obj-$(CONFIG_VIDEO_EFI) += efi.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/orisetech_otm8009a.c
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..c5a1ee4
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre for STMicroelectronics.
+ *Philippe Cornu for STMicroelectronics.
+ *
+ * This otm8009a panel driver is inspired from the Linux Kernel driver
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x /* Address Shift Function */
+#define MCS_PANSET 0xB3A6 /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2 /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4 /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181 /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1 /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480 /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A /* Command not documented */
+#define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80 /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90 /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0 /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0 /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0 /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0 /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0 /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0 /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80 /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90 /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0 /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0 /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0 /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0 /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80 /* GOA VST Setting */
+#define MCS_GOACLKA1 0xCEA0 /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3 0xCEB0 /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0 /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0 /* Command not documented */
+#define MCS_GVDDSET0xD800 /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900 /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P 0xE100 /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N 0xE200 /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6 /* Command not documented */
+#define MCS_CMD2_ENA1 0xFF00 /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2 0xFF80 /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+ struct udevice *reg;
+ struct gpio_desc reset;
+};
+
+static const struct display_timing default_timing = {
+ .pixelclock.typ = 32729000,
+
[U-Boot] [ v1 09/10] arm: dts: stm32: add display for STM32F769 disco board
Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.
Signed-off-by: Yannick Fertré
---
arch/arm/dts/stm32f769-disco.dts | 59
1 file changed, 59 insertions(+)
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 59c9d31..93659f7 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -84,6 +84,36 @@
compatible = "st,button1";
button-gpio = <&gpioa 0 0>;
};
+
+ panel: panel {
+ compatible = "orisetech,otm8009a";
+ reset-gpios = <&gpioj 15 1>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+
+ display-timings {
+ timing@0 {
+ clock-frequency = <32729000>;
+ hactive = <480>;
+ hfront-porch = <120>;
+ hback-porch = <63>;
+ hsync-len = <120>;
+ vactive = <800>;
+ vfront-porch = <12>;
+ vback-porch = <12>;
+ vsync-len = <12>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <1>;
+ };
+ };
+ };
};
&clk_hse {
@@ -264,3 +294,32 @@
bus-width = <4>;
max-frequency = <2500>;
};
+
+<dc {
+ status = "okay";
+
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ port@0 {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ port@1 {
+ dsi_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
+};
--
1.9.1
___
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[U-Boot] [ v1 02/10] video: add support of MIPI DSI interface
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig| 9 +
drivers/video/Makefile | 1 +
drivers/video/mipi_display.c | 817 +++
include/mipi_display.h | 257 +-
4 files changed, 1083 insertions(+), 1 deletion(-)
create mode 100644 drivers/video/mipi_display.c
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 5ee9032..560da1a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -73,6 +73,15 @@ config VIDEO_ANSI
Enable ANSI escape sequence decoding for a more fully functional
console.
+config VIDEO_MIPI_DSI
+ bool "Support MIPI DSI interface"
+ depends on DM_VIDEO
+ default y if DM_VIDEO
+ help
+ Support MIPI DSI interface for driving a MIPI compatible device.
+ The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
+ serial interface between a host processor and a display module.
+
config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 7c89c67..4e2ec41 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
obj-$(CONFIG_LG4573) += lg4573.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
obj-${CONFIG_EXYNOS_FB} += exynos/
diff --git a/drivers/video/mipi_display.c b/drivers/video/mipi_display.c
new file mode 100644
index 000..9c96b9d
--- /dev/null
+++ b/drivers/video/mipi_display.c
@@ -0,0 +1,817 @@
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Mipi_display.c contains a set of dsi helpers.
+ * This file is inspired from the drm helper file
drivers/gpu/drm/drm_mipi_dsi.c
+ * (kernel linux).
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->attach)
+ return -ENOSYS;
+
+ return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->detach)
+ return -ENOSYS;
+
+ return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+/**
+ * mipi_dsi_device_transfer - transfer message to a DSI device
+ * @dsi: DSI peripheral
+ * @msg: message
+ */
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+ struct mipi_dsi_msg *msg)
+{
+ const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+ if (!ops || !ops->transfer)
+ return -ENOSYS;
+
+ if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+ msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+ return ops->trans
[U-Boot] [ v1 03/10] dm: panel: get timings from panel
Get timings from panel instead of read device tree.
Signed-off-by: Yannick Fertré
---
drivers/video/panel-uclass.c | 11 +++
include/panel.h | 18 ++
2 files changed, 29 insertions(+)
diff --git a/drivers/video/panel-uclass.c b/drivers/video/panel-uclass.c
index 2841bb3..aec44a8 100644
--- a/drivers/video/panel-uclass.c
+++ b/drivers/video/panel-uclass.c
@@ -18,6 +18,17 @@ int panel_enable_backlight(struct udevice *dev)
return ops->enable_backlight(dev);
}
+int panel_get_display_timing(struct udevice *dev,
+struct display_timing *timings)
+{
+ struct panel_ops *ops = panel_get_ops(dev);
+
+ if (!ops->get_display_timing)
+ return -ENOSYS;
+
+ return ops->get_display_timing(dev, timings);
+}
+
UCLASS_DRIVER(panel) = {
.id = UCLASS_PANEL,
.name = "panel",
diff --git a/include/panel.h b/include/panel.h
index 46dca48b..6237d32 100644
--- a/include/panel.h
+++ b/include/panel.h
@@ -15,6 +15,15 @@ struct panel_ops {
* @return 0 if OK, -ve on error
*/
int (*enable_backlight)(struct udevice *dev);
+ /**
+* get_timings() - Get display timings from panel.
+*
+* @dev:Panel device containing the display timings
+* @tim:Place to put timings
+* @return 0 if OK, -ve on error
+*/
+ int (*get_display_timing)(struct udevice *dev,
+ struct display_timing *timing);
};
#define panel_get_ops(dev) ((struct panel_ops *)(dev)->driver->ops)
@@ -27,4 +36,13 @@ struct panel_ops {
*/
int panel_enable_backlight(struct udevice *dev);
+/**
+ * panel_get_display_timing() - Get display timings from panel.
+ *
+ * @dev: Panel device containing the display timings
+ * @return 0 if OK, -ve on error
+ */
+int panel_get_display_timing(struct udevice *dev,
+struct display_timing *timing);
+
#endif
--
1.9.1
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[U-Boot] [ v1 01/10] video: stm32: stm32_ltdc: add bridge to display controller
Manage a bridge insert between the display controller & a panel.
Signed-off-by: Yannick Fertré
---
drivers/video/stm32/stm32_ltdc.c | 154 +++
1 file changed, 92 insertions(+), 62 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc6c889..4a1db5e 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -4,22 +4,20 @@
* Author(s): Philippe Cornu for STMicroelectronics.
* Yannick Fertre for STMicroelectronics.
*/
-
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
struct stm32_ltdc_priv {
void __iomem *regs;
- struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -174,8 +172,8 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp
l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
+ __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
@@ -209,23 +207,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
}
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+ struct display_timing *timings)
{
void __iomem *regs = priv->regs;
- struct display_timing *timing = &priv->timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
/* Convert video timings to ltdc timings */
- hsync = timing->hsync_len.typ - 1;
- vsync = timing->vsync_len.typ - 1;
- acc_hbp = hsync + timing->hback_porch.typ;
- acc_vbp = vsync + timing->vback_porch.typ;
- acc_act_w = acc_hbp + timing->hactive.typ;
- acc_act_h = acc_vbp + timing->vactive.typ;
- total_w = acc_act_w + timing->hfront_porch.typ;
- total_h = acc_act_h + timing->vfront_porch.typ;
+ hsync = timings->hsync_len.typ - 1;
+ vsync = timings->vsync_len.typ - 1;
+ acc_hbp = hsync + timings->hback_porch.typ;
+ acc_vbp = vsync + timings->vback_porch.typ;
+ acc_act_w = acc_hbp + timings->hactive.typ;
+ acc_act_h = acc_vbp + timings->vactive.typ;
+ total_w = acc_act_w + timings->hfront_porch.typ;
+ total_h = acc_act_h + timings->vfront_porch.typ;
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -247,14 +245,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv
*priv)
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
- if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
- if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
- if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+ if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
- if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -330,96 +328,128 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
- struct udevice *panel;
+#ifdef CONFIG_VIDEO_BRIDGE
+ struct udevice *bridge = NULL;
+#endif
+ struct udevice *panel = NULL;
+ struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
- int rate, ret;
+ int ret;
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
- debug("%s: ltdc dt register address error\n", __func__);
+ dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
ret = clk_get_by_index(dev, 0, &pclk);
if (ret) {
-
[U-Boot] [ v1 00/10] [INTERNAL REVIEW] splash screen on the stm32f769 disco board
Version 1: - Initial commit: This serie contains all patchsets needed for displaying a splash screen on the stm32f769 disco board. A new config has been created configs/stm32f769-disco_defconfig. This is necessary due to the difference of panels between stm32f769-disco & stm32f746-disco boards. Yannick Fertré (10): video: stm32: stm32_ltdc: add bridge to display controller video: add support of MIPI DSI interface dm: panel: get timings from panel video: add support of panel OTM8009A video: add support of panel RM68200 video: add MIPI DSI host controller bridge video: add support of STM32 MIPI DSI controller driver arm: dts: stm32: add dsi for STM32F746 arm: dts: stm32: add display for STM32F769 disco board board: Add STM32F769 SoC, discovery board support arch/arm/dts/stm32f746.dtsi| 12 + arch/arm/dts/stm32f769-disco.dts | 59 +++ configs/stm32f769-disco_defconfig | 67 +++ drivers/video/Kconfig | 34 ++ drivers/video/Makefile | 4 + drivers/video/dw_mipi_dsi.c| 826 + drivers/video/mipi_display.c | 817 drivers/video/orisetech_otm8009a.c | 366 drivers/video/panel-uclass.c | 11 + drivers/video/raydium-rm68200.c| 338 +++ drivers/video/stm32/Kconfig| 10 + drivers/video/stm32/Makefile | 1 + drivers/video/stm32/stm32_dsi.c| 427 +++ drivers/video/stm32/stm32_ltdc.c | 154 --- include/dw_mipi_dsi.h | 32 ++ include/mipi_display.h | 257 +++- include/panel.h| 18 + 17 files changed, 3370 insertions(+), 63 deletions(-) create mode 100644 configs/stm32f769-disco_defconfig create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 drivers/video/mipi_display.c create mode 100644 drivers/video/orisetech_otm8009a.c create mode 100644 drivers/video/raydium-rm68200.c create mode 100644 drivers/video/stm32/stm32_dsi.c create mode 100644 include/dw_mipi_dsi.h -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
