[U-Boot] [PATCH v2 1/1] arm/ls102xa:add hwconfig setting to support disable unused devices.
DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.
For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: Zhuoyu Zhang
---
Change log:
v2 use CONFIG_FSL_DEVICE_DISABLE instead of CONFIG_DEVICE_DISABLE.
arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h | 52 ++
board/freescale/ls1021aqds/ls1021aqds.c| 5 +++
board/freescale/ls1021atwr/ls1021atwr.c| 5 +++
drivers/misc/Makefile | 1 +
drivers/misc/fsl_devdis.c | 29
include/configs/ls1021aqds.h | 4 +-
include/configs/ls1021atwr.h | 4 +-
include/fsl_devdis.h | 18
8 files changed, 116 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
create mode 100644 drivers/misc/fsl_devdis.c
create mode 100644 include/fsl_devdis.h
diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
b/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
new file mode 100644
index 000..3e9e9ea
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __FSL_LS102XA_DEVDIS_H_
+#define __FSL_LS102XA_DEVDIS_H_
+
+#include
+
+const struct devdis_table devdis_tbl[] = {
+ { "pbl", 0x0, 0x8000 }, /* PBL */
+ { "esdhc", 0x0, 0x2000 }, /* eSDHC*/
+ { "qdma", 0x0, 0x80 }, /* qDMA */
+ { "edma", 0x0, 0x40 }, /* eDMA */
+ { "usb3", 0x0, 0x84000 }, /* USB3.0 controller and PHY*/
+ { "usb2", 0x0, 0x4 }, /* USB2.0 controller*/
+ { "sata", 0x0, 0x8000 },/* SATA */
+ { "sec", 0x0, 0x200 }, /* SEC */
+ { "dcu", 0x0, 0x2 },/* Display controller Unit */
+ { "qe", 0x0, 0x1 }, /* QUICC Engine */
+ { "etsec1", 0x1, 0x8000 }, /* eTSEC1 controller*/
+ { "etesc2", 0x1, 0x4000 }, /* eTSEC2 controller*/
+ { "etsec3", 0x1, 0x2000 }, /* eTSEC3 controller*/
+ { "pex1", 0x2, 0x8000 },/* PCIE controller 1*/
+ { "pex2", 0x2, 0x4000 },/* PCIE controller 2*/
+ { "duart1", 0x3, 0x2000 }, /* DUART1 */
+ { "duart2", 0x3, 0x1000 }, /* DUART2 */
+ { "qspi", 0x3, 0x800 }, /* QSPI */
+ { "ddr", 0x4, 0x8000 }, /* DDR */
+ { "ocram1", 0x4, 0x800 }, /* OCRAM1 */
+ { "ifc", 0x4, 0x80 }, /* IFC */
+ { "gpio", 0x4, 0x40 }, /* GPIO */
+ { "dbg", 0x4, 0x20 }, /* DBG */
+ { "can1", 0x4, 0x8 }, /* FlexCAN1 */
+ { "can2_4", 0x4, 0x4 }, /* FlexCAN2_3_4 */
+ { "ftm2_8", 0x4, 0x2 }, /* FlexTimer2_3_4_5_6_7_8 */
+ { "secmon", 0x4, 0x4000 }, /* Security Monitor */
+ { "wdog1_2", 0x4, 0x400 }, /* WatchDog1_2 */
+ { "i2c2_3", 0x4, 0x200 }, /* I2C2_3 */
+ { "sai1_4", 0x4, 0x100 }, /* SAI1_2_3_4 */
+ { "lpuart2_6", 0x4, 0x80 }, /* LPUART2_3_4_5_6 */
+ { "dspi1_2", 0x4, 0x40 }, /* DSPI1_2 */
+ { "asrc", 0x4, 0x20 }, /* ASRC */
+ { "spdif", 0x4, 0x10 }, /* SPDIF*/
+ { "i2c1", 0x4, 0x4 }, /* I2C1 */
+ { "lpuart1", 0x4, 0x2 },/* LPUART1 */
+ { "ftm1", 0x4, 0x1 }, /* FlexTimer1 */
+};
+
+#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
b/board/freescale/ls1021aqds/ls1021aqds.c
index d6ef6ba..a1c10cf 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -12,12 +12,14 @@
#include
#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
#include "../common/sleep.h"
#include "../common/qixis.h"
@@ -530,6 +532,9 @@ int misc_init_r(void)
else if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_S
[U-Boot] [PATCH v2 1/1] arm/ls102xa:add hwconfig setting to support disable unused devices.
DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.
For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: Zhuoyu Zhang
---
arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h | 52 ++
board/freescale/ls1021aqds/ls1021aqds.c| 5 +++
board/freescale/ls1021atwr/ls1021atwr.c| 5 +++
drivers/misc/Makefile | 1 +
drivers/misc/fsl_devdis.c | 29
include/configs/ls1021aqds.h | 4 +-
include/configs/ls1021atwr.h | 4 +-
include/fsl_devdis.h | 18
8 files changed, 116 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
create mode 100644 drivers/misc/fsl_devdis.c
create mode 100644 include/fsl_devdis.h
diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
b/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
new file mode 100644
index 000..3e9e9ea
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __FSL_LS102XA_DEVDIS_H_
+#define __FSL_LS102XA_DEVDIS_H_
+
+#include
+
+const struct devdis_table devdis_tbl[] = {
+ { "pbl", 0x0, 0x8000 }, /* PBL */
+ { "esdhc", 0x0, 0x2000 }, /* eSDHC*/
+ { "qdma", 0x0, 0x80 }, /* qDMA */
+ { "edma", 0x0, 0x40 }, /* eDMA */
+ { "usb3", 0x0, 0x84000 }, /* USB3.0 controller and PHY*/
+ { "usb2", 0x0, 0x4 }, /* USB2.0 controller*/
+ { "sata", 0x0, 0x8000 },/* SATA */
+ { "sec", 0x0, 0x200 }, /* SEC */
+ { "dcu", 0x0, 0x2 },/* Display controller Unit */
+ { "qe", 0x0, 0x1 }, /* QUICC Engine */
+ { "etsec1", 0x1, 0x8000 }, /* eTSEC1 controller*/
+ { "etesc2", 0x1, 0x4000 }, /* eTSEC2 controller*/
+ { "etsec3", 0x1, 0x2000 }, /* eTSEC3 controller*/
+ { "pex1", 0x2, 0x8000 },/* PCIE controller 1*/
+ { "pex2", 0x2, 0x4000 },/* PCIE controller 2*/
+ { "duart1", 0x3, 0x2000 }, /* DUART1 */
+ { "duart2", 0x3, 0x1000 }, /* DUART2 */
+ { "qspi", 0x3, 0x800 }, /* QSPI */
+ { "ddr", 0x4, 0x8000 }, /* DDR */
+ { "ocram1", 0x4, 0x800 }, /* OCRAM1 */
+ { "ifc", 0x4, 0x80 }, /* IFC */
+ { "gpio", 0x4, 0x40 }, /* GPIO */
+ { "dbg", 0x4, 0x20 }, /* DBG */
+ { "can1", 0x4, 0x8 }, /* FlexCAN1 */
+ { "can2_4", 0x4, 0x4 }, /* FlexCAN2_3_4 */
+ { "ftm2_8", 0x4, 0x2 }, /* FlexTimer2_3_4_5_6_7_8 */
+ { "secmon", 0x4, 0x4000 }, /* Security Monitor */
+ { "wdog1_2", 0x4, 0x400 }, /* WatchDog1_2 */
+ { "i2c2_3", 0x4, 0x200 }, /* I2C2_3 */
+ { "sai1_4", 0x4, 0x100 }, /* SAI1_2_3_4 */
+ { "lpuart2_6", 0x4, 0x80 }, /* LPUART2_3_4_5_6 */
+ { "dspi1_2", 0x4, 0x40 }, /* DSPI1_2 */
+ { "asrc", 0x4, 0x20 }, /* ASRC */
+ { "spdif", 0x4, 0x10 }, /* SPDIF*/
+ { "i2c1", 0x4, 0x4 }, /* I2C1 */
+ { "lpuart1", 0x4, 0x2 },/* LPUART1 */
+ { "ftm1", 0x4, 0x1 }, /* FlexTimer1 */
+};
+
+#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
b/board/freescale/ls1021aqds/ls1021aqds.c
index d6ef6ba..a1c10cf 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -12,12 +12,14 @@
#include
#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
#include "../common/sleep.h"
#include "../common/qixis.h"
@@ -530,6 +532,9 @@ int misc_init_r(void)
else if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
+#ifdef CONFIG_FSL_DEVICE_DISABLE
+ device_disable(devdis_tbl, ARRAY
[U-Boot] [PATCH] arm/ls102xa:add hwconfig setting to support disable unused devices.
DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.
For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can also enable CONFIG_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: Zhuoyu Zhang
---
arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h | 52 ++
board/freescale/ls1021aqds/ls1021aqds.c| 5 +++
board/freescale/ls1021atwr/ls1021atwr.c| 5 +++
drivers/misc/Makefile | 1 +
drivers/misc/fsl_devdis.c | 29
include/configs/ls1021aqds.h | 4 +-
include/configs/ls1021atwr.h | 4 +-
include/fsl_devdis.h | 18
8 files changed, 116 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
create mode 100644 drivers/misc/fsl_devdis.c
create mode 100644 include/fsl_devdis.h
diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
b/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
new file mode 100644
index 000..3e9e9ea
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_devdis.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __FSL_LS102XA_DEVDIS_H_
+#define __FSL_LS102XA_DEVDIS_H_
+
+#include
+
+const struct devdis_table devdis_tbl[] = {
+ { "pbl", 0x0, 0x8000 }, /* PBL */
+ { "esdhc", 0x0, 0x2000 }, /* eSDHC*/
+ { "qdma", 0x0, 0x80 }, /* qDMA */
+ { "edma", 0x0, 0x40 }, /* eDMA */
+ { "usb3", 0x0, 0x84000 }, /* USB3.0 controller and PHY*/
+ { "usb2", 0x0, 0x4 }, /* USB2.0 controller*/
+ { "sata", 0x0, 0x8000 },/* SATA */
+ { "sec", 0x0, 0x200 }, /* SEC */
+ { "dcu", 0x0, 0x2 },/* Display controller Unit */
+ { "qe", 0x0, 0x1 }, /* QUICC Engine */
+ { "etsec1", 0x1, 0x8000 }, /* eTSEC1 controller*/
+ { "etesc2", 0x1, 0x4000 }, /* eTSEC2 controller*/
+ { "etsec3", 0x1, 0x2000 }, /* eTSEC3 controller*/
+ { "pex1", 0x2, 0x8000 },/* PCIE controller 1*/
+ { "pex2", 0x2, 0x4000 },/* PCIE controller 2*/
+ { "duart1", 0x3, 0x2000 }, /* DUART1 */
+ { "duart2", 0x3, 0x1000 }, /* DUART2 */
+ { "qspi", 0x3, 0x800 }, /* QSPI */
+ { "ddr", 0x4, 0x8000 }, /* DDR */
+ { "ocram1", 0x4, 0x800 }, /* OCRAM1 */
+ { "ifc", 0x4, 0x80 }, /* IFC */
+ { "gpio", 0x4, 0x40 }, /* GPIO */
+ { "dbg", 0x4, 0x20 }, /* DBG */
+ { "can1", 0x4, 0x8 }, /* FlexCAN1 */
+ { "can2_4", 0x4, 0x4 }, /* FlexCAN2_3_4 */
+ { "ftm2_8", 0x4, 0x2 }, /* FlexTimer2_3_4_5_6_7_8 */
+ { "secmon", 0x4, 0x4000 }, /* Security Monitor */
+ { "wdog1_2", 0x4, 0x400 }, /* WatchDog1_2 */
+ { "i2c2_3", 0x4, 0x200 }, /* I2C2_3 */
+ { "sai1_4", 0x4, 0x100 }, /* SAI1_2_3_4 */
+ { "lpuart2_6", 0x4, 0x80 }, /* LPUART2_3_4_5_6 */
+ { "dspi1_2", 0x4, 0x40 }, /* DSPI1_2 */
+ { "asrc", 0x4, 0x20 }, /* ASRC */
+ { "spdif", 0x4, 0x10 }, /* SPDIF*/
+ { "i2c1", 0x4, 0x4 }, /* I2C1 */
+ { "lpuart1", 0x4, 0x2 },/* LPUART1 */
+ { "ftm1", 0x4, 0x1 }, /* FlexTimer1 */
+};
+
+#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
b/board/freescale/ls1021aqds/ls1021aqds.c
index d6ef6ba..b7049f7 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -12,12 +12,14 @@
#include
#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
#include "../common/sleep.h"
#include "../common/qixis.h"
@@ -530,6 +532,9 @@ int misc_init_r(void)
else if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
+#ifdef CONFIG_DEVICE_DISABLE
+ device_disable(devdis_tbl, ARRAY
[U-Boot] [PATCH] arm:ls1021a: Reserve secure code into RAM instead of OCRAM
For ls1021a, Reserve secure code in to memory in case OCRAM is needed by other usage. Signed-off-by: Zhuoyu Zhang --- include/configs/ls1021aqds.h | 1 - include/configs/ls1021atwr.h | 1 - 2 files changed, 2 deletions(-) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 3dc4da3..42439a4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -554,7 +554,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_LS102XA_NS_ACCESS #define CONFIG_SMP_PEN_ADDR0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 1250 -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a13876b..dccc661 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -347,7 +347,6 @@ #define CONFIG_LS102XA_NS_ACCESS #define CONFIG_SMP_PEN_ADDR0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 1250 -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
