Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Update qemu-riscv.rst build instructions. - Add support for SPI on Kendryte K210. - Add Microchip PolarFire SoC Icicle Kit support. - Add support for an early timer. - select TIMER_EARLY to avoid infinite recursion for Trace. Thanks Rick CI: passed https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/5918 The following changes since commit 14ea1b3635b4af8d9e283e3671f7ee872d50b859: Merge branch '2021-01-15-assorted-improvements' (2021-01-16 11:14:21 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 9e550e18305fb31af83bfb72d16e86d8c054fb65: doc: board: Add Microchip MPFS Icicle Kit doc (2021-01-18 11:06:39 +0800) Atish Patra (1): doc: qemu-riscv: Fix opensbi build instructions Padmarao Begari (7): riscv: Add DMA 64-bit address support net: macb: Add DMA 64-bit address support for macb net: macb: Add phy address to read it from device tree clk: Add Microchip PolarFire SoC clock driver riscv: dts: Add device tree for Microchip Icicle Kit riscv: Add Microchip MPFS Icicle Kit support doc: board: Add Microchip MPFS Icicle Kit doc Pragnesh Patel (2): trace: select TIMER_EARLY to avoid infinite recursion riscv: timer: Add support for an early timer Sean Anderson (1): riscv: Add support for SPI on Kendryte K210 arch/riscv/Kconfig | 4 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +++ arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421 arch/riscv/include/asm/types.h | 4 + board/microchip/mpfs_icicle/Kconfig | 23 + board/microchip/mpfs_icicle/mpfs_icicle.c| 99 +- board/sipeed/maix/Kconfig| 16 +++ configs/microchip_mpfs_icicle_defconfig | 9 +- configs/sipeed_maix_bitm_defconfig | 11 ++ doc/board/emulation/qemu-riscv.rst | 2 +- doc/board/index.rst | 1 + doc/board/microchip/index.rst| 9 ++ doc/board/microchip/mpfs_icicle.rst | 810 ++ doc/board/sipeed/maix.rst| 315 - drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/microchip/Kconfig| 5 + drivers/clk/microchip/Makefile | 1 + drivers/clk/microchip/mpfs_clk.c | 123 +++ drivers/clk/microchip/mpfs_clk.h | 44 drivers/clk/microchip/mpfs_clk_cfg.c | 152 drivers/clk/microchip/mpfs_clk_periph.c | 187 ++ drivers/net/macb.c | 144 ++ drivers/net/macb.h | 6 ++ drivers/timer/andes_plmt_timer.c | 21 +++- drivers/timer/riscv_timer.c | 21 +++- drivers/timer/sifive_clint_timer.c | 21 +++- include/configs/ax25-ae350.h | 5 + include/configs/microchip_mpfs_icicle.h | 59 --- include/configs/qemu-riscv.h | 5 + include/configs/sifive-fu540.h | 5 + include/configs/sipeed-maix.h| 7 +- include/dt-bindings/clock/microchip-mpfs-clock.h | 45 + lib/Kconfig | 1 + 35 files changed, 2477 insertions(+), 116 deletions(-) create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit.dts create mode 100644 doc/board/microchip/index.rst create mode 100644 doc/board/microchip/mpfs_icicle.rst create mode 100644 drivers/clk/microchip/Kconfig create mode 100644 drivers/clk/microchip/Makefile create mode 100644 drivers/clk/microchip/mpfs_clk.c create mode 100644 drivers/clk/microchip/mpfs_clk.h create mode 100644 drivers/clk/microchip/mpfs_clk_cfg.c create mode 100644 drivers/clk/microchip/mpfs_clk_periph.c create mode 100644 include/dt-bindings/clock/microchip-mpfs-clock.h
Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Update qemu-riscv.rst build instructions. - Add support for SPI on Kendryte K210. - Add Microchip PolarFire SoC Icicle Kit support. Thanks Rick CI: passed https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/5853 The following changes since commit ee6726be4f0dccb612f0193c62ca149164c8a5af: Merge tag 'ti-v2021.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti (2021-01-12 09:32:48 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 477b035bd200fbef3045902f3ea2fe26cd831a5c: doc: board: Add Microchip MPFS Icicle Kit doc (2021-01-13 08:51:55 +0800) Atish Patra (1): doc: qemu-riscv: Fix opensbi build instructions Padmarao Begari (7): riscv: Add DMA 64-bit address support net: macb: Add DMA 64-bit address support for macb net: macb: Add phy address to read it from device tree clk: Add Microchip PolarFire SoC clock driver riscv: dts: Add device tree for Microchip Icicle Kit riscv: Add Microchip MPFS Icicle Kit support doc: board: Add Microchip MPFS Icicle Kit doc Sean Anderson (1): riscv: Add support for SPI on Kendryte K210 arch/riscv/Kconfig | 4 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 +++ arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421 arch/riscv/include/asm/types.h | 4 + board/microchip/mpfs_icicle/Kconfig | 23 + board/microchip/mpfs_icicle/mpfs_icicle.c| 99 +- board/sipeed/maix/Kconfig| 16 +++ configs/microchip_mpfs_icicle_defconfig | 9 +- configs/sipeed_maix_bitm_defconfig | 11 ++ doc/board/emulation/qemu-riscv.rst | 2 +- doc/board/index.rst | 1 + doc/board/microchip/index.rst| 9 ++ doc/board/microchip/mpfs_icicle.rst | 810 ++ doc/board/sipeed/maix.rst| 315 - drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/microchip/Kconfig| 5 + drivers/clk/microchip/Makefile | 1 + drivers/clk/microchip/mpfs_clk.c | 123 +++ drivers/clk/microchip/mpfs_clk.h | 44 drivers/clk/microchip/mpfs_clk_cfg.c | 152 drivers/clk/microchip/mpfs_clk_periph.c | 187 ++ drivers/net/macb.c | 144 ++ drivers/net/macb.h | 6 ++ include/configs/microchip_mpfs_icicle.h | 60 --- include/configs/sipeed-maix.h| 7 +- include/dt-bindings/clock/microchip-mpfs-clock.h | 45 + 28 files changed, 2402 insertions(+), 113 deletions(-) create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit.dts create mode 100644 doc/board/microchip/index.rst create mode 100644 doc/board/microchip/mpfs_icicle.rst create mode 100644 drivers/clk/microchip/Kconfig create mode 100644 drivers/clk/microchip/Makefile create mode 100644 drivers/clk/microchip/mpfs_clk.c create mode 100644 drivers/clk/microchip/mpfs_clk.h create mode 100644 drivers/clk/microchip/mpfs_clk_cfg.c create mode 100644 drivers/clk/microchip/mpfs_clk_periph.c create mode 100644 include/dt-bindings/clock/microchip-mpfs-clock.h
Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Fix wrong amoswap t1 usage in startup. - Reset the board after cratch. - Enable distro booting from an attached SCSI disk for QEMU. - Support the optional header fields in efi header. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/748706480 The following changes since commit 5a1a8a63be8f7262a300eddafb18020926b12fb6: Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel (2020-12-11 15:55:17 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 9afaeec6ef8bbc6cf936d2a9c3d28caffca5bf7e: riscv: Complete efi header for RV32/64 (2020-12-14 15:16:54 +0800) Atish Patra (1): riscv: Fix efi header for RV32 Brad Kim (1): riscv: fix the wrong swap value register Heinrich Schuchardt (2): riscv: reset after crash riscv: qemu: enable distro boot from scsi Leo Yu-Chi Liang (2): riscv: Fix efi header size for RV32 riscv: Complete efi header for RV32/64 arch/riscv/cpu/start.S | 2 +- arch/riscv/lib/crt0_riscv_efi.S | 28 +++- arch/riscv/lib/interrupts.c | 8 include/configs/qemu-riscv.h| 1 + 4 files changed, 33 insertions(+), 6 deletions(-)
Pull request: u-boot-riscv/master 20201117
Hi Tom, Please pull some riscv updates: - Enable SATA disk on QEMU RISC-V and update doc. - k210 pinctrl updates: - Fix inverted IE and OE for I2C. - Rename power domains to match datasheet. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/743893981 Merge tag 'ti-v2021.01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti (2020-11-16 13:42:29 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 6e35c1cb12e7be136baf9f44249baa3279ed7b5c: pinctrl: k210: Rename power domains to match datasheet (2020-11-17 15:09:28 +0800) Heinrich Schuchardt (3): riscv: sort SPECIFIC_OPTIONS riscv: enable SATA disk on QEMU RISC-V doc: qemu-riscv: describe attaching a disk image Sean Anderson (2): pinctrl: k210: Fix inverted IE and OE for I2C pinctrl: k210: Rename power domains to match datasheet board/emulation/qemu-riscv/Kconfig | 45 ++--- doc/board/emulation/qemu-riscv.rst | 8 doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt | 2 +- drivers/pinctrl/pinctrl-kendryte.c | 21 - 4 files changed, 47 insertions(+), 29 deletions(-)
Pull request: u-boot-riscv/master 20201026
Hi Tom, Please pull some riscv updates: - No need to check before free in kendryte clk. - Only enable OF_BOARD_FIXUP if U-Boot is configured for S-Mode. - Reduce k210 dts DMA block size - Move timers into drivers/timer - Correct fu540 dts reg size of clint node Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/738180853 The following changes since commit c99e87f82803500f9811b1e98926d9d25df35b38: Merge branch '2020-10-23-misc-changes' (2020-10-24 10:49:28 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 7257455e7cd8038263a738401cbfe0ee8a2c7ac9: riscv: fu540: dts: Correct reg size of clint node (2020-10-26 10:01:37 +0800) Heinrich Schuchardt (1): clk: kendryte: no need to check argument of free() Pragnesh Patel (1): riscv: fu540: dts: Correct reg size of clint node Sean Anderson (5): riscv: Only enable OF_BOARD_FIXUP for S-Mode riscv: k210: Reduce DMA block size riscv: Move Andes PLMT driver to drivers/timer timer: Add _TIMER suffix to Andes PLMT Kconfig riscv: Move timer portions of SiFive CLINT to drivers/timer MAINTAINERS | 2 ++ arch/riscv/Kconfig | 9 + arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +- arch/riscv/dts/k210.dtsi| 4 ++-- arch/riscv/lib/Makefile | 1 - arch/riscv/lib/sifive_clint.c | 41 ++--- drivers/clk/kendryte/clk.c | 3 +-- drivers/timer/Kconfig | 7 +++ drivers/timer/Makefile | 2 ++ arch/riscv/lib/andes_plmt.c => drivers/timer/andes_plmt_timer.c | 0 drivers/timer/sifive_clint_timer.c | 47 +++ 12 files changed, 66 insertions(+), 54 deletions(-) rename arch/riscv/lib/andes_plmt.c => drivers/timer/andes_plmt_timer.c (100%) create mode 100644 drivers/timer/sifive_clint_timer.c
Pull request: u-boot-riscv/next 20200930
Hi Tom, This PR is for -next Please pull some riscv updates: - Disable CMD_IRQ for RISC-V. - Update sipeed/maix doc - Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API. - Cleans up RISC-V timer drivers and converts them to DM. - Correctly handle IPIs already pending upon prior stage bootloader (on the K210) Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/731148651 The following changes since commit 0ac83d080a0044cd0d8f782ba12f02cf969d3004: Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next (2020-09-25 09:04:01 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 924de3216e9efdf1cdc71b8632099213aac03f2c: riscv: Add some comments to start.S (2020-09-30 08:54:52 +0800) Bin Meng (2): ram: sifive: Check return value on clk_enable() ram: sifive: Remove regmap dependency Heinrich Schuchardt (2): doc: correct kflash settings for Maix One Dock doc/sipeed/maix: describe RESET and BOOT button Pragnesh Patel (1): cmd: irq: disable CMD_IRQ for riscv arch Sean Anderson (16): riscv: Rework riscv timer driver to only support S-mode timer: Add helper for drivers using timebase fallback timer: Add a test for timer_timebase_fallback riscv: Rework Andes PLMT as a UCLASS_TIMER driver riscv: Clean up initialization in Andes PLIC riscv: Rework Sifive CLINT as UCLASS_TIMER driver riscv: clk: Add CLINT clock to kendryte clock driver riscv: Update Kendryte device tree for new CLINT driver riscv: Update SiFive device tree for new CLINT driver Revert "riscv: Clear pending interrupts before enabling IPIs" riscv: Match memory barriers between send_ipi_many and handle_ipi riscv: Use a valid bit to ignore already-pending IPIs riscv: Clear pending IPIs on initialization riscv: Consolidate fences into AMOs for available_harts_lock riscv: Ensure gp is NULL or points to valid data riscv: Add some comments to start.S arch/riscv/Kconfig | 16 arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/cpu/cpu.c| 20 arch/riscv/cpu/fu540/Kconfig| 2 +- arch/riscv/cpu/generic/Kconfig | 2 +- arch/riscv/cpu/start.S | 58 +- arch/riscv/dts/fu540-c000-u-boot.dtsi | 8 ++-- arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 arch/riscv/dts/k210.dtsi| 7 --- arch/riscv/include/asm/global_data.h| 3 --- arch/riscv/include/asm/smp.h| 7 +++ arch/riscv/include/asm/syscon.h | 4 ++-- arch/riscv/lib/Makefile | 1 - arch/riscv/lib/andes_plic.c | 58 +- arch/riscv/lib/andes_plmt.c | 44 +--- arch/riscv/lib/interrupts.c | 3 ++- arch/riscv/lib/rdtime.c | 38 -- arch/riscv/lib/sifive_clint.c | 62 ++ arch/riscv/lib/smp.c| 16 +++- arch/sandbox/dts/test.dts | 9 - arch/sandbox/include/asm/cpu.h | 11 +++ cmd/Kconfig | 2 +- doc/board/sipeed/maix.rst | 10 +++--- drivers/clk/kendryte/clk.c | 4 drivers/cpu/cpu_sandbox.c | 39 --- drivers/ram/sifive/fu540_ddr.c | 17 - drivers/timer/Kconfig | 4 ++-- drivers/timer/riscv_timer.c | 39 --- drivers/timer/sandbox_timer.c | 4 +++- drivers/timer/timer-uclass.c| 31 +++ include/dt-bindings/clock/k210-sysctl.h | 1 + include/timer.h | 15 +++ test/dm/timer.c | 27 ++- 33 files changed, 357 insertions(+), 211 deletions(-) delete mode 100644 arch/riscv/lib/rdtime.c create mode 100644 arch/sandbox/include/asm/cpu.h
Pull request: u-boot-riscv/master 20200929
Hi Tom, Please pull some riscv updates: - Disable CMD_IRQ for RISC-V. - Update sipeed/maix doc - Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API. - Cleans up RISC-V timer drivers and converts them to DM. - Correctly handle IPIs already pending upon prior stage bootloader (on the K210) Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/731148651 The following changes since commit d44d46e9fafaae85b0ebbcdc53999537a199fa2f: Merge tag 'efi-2020-10-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-09-28 08:26:49 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to e8f0f002930955e46c2b7cc4e1e6754570a0b439: riscv: Add some comments to start.S (2020-09-29 09:55:22 +0800) Bin Meng (2): ram: sifive: Check return value on clk_enable() ram: sifive: Remove regmap dependency Heinrich Schuchardt (2): doc: correct kflash settings for Maix One Dock doc/sipeed/maix: describe RESET and BOOT button Pragnesh Patel (1): cmd: irq: disable CMD_IRQ for riscv arch Sean Anderson (16): riscv: Rework riscv timer driver to only support S-mode timer: Add helper for drivers using timebase fallback timer: Add a test for timer_timebase_fallback riscv: Rework Andes PLMT as a UCLASS_TIMER driver riscv: Clean up initialization in Andes PLIC riscv: Rework Sifive CLINT as UCLASS_TIMER driver riscv: clk: Add CLINT clock to kendryte clock driver riscv: Update Kendryte device tree for new CLINT driver riscv: Update SiFive device tree for new CLINT driver Revert "riscv: Clear pending interrupts before enabling IPIs" riscv: Match memory barriers between send_ipi_many and handle_ipi riscv: Use a valid bit to ignore already-pending IPIs riscv: Clear pending IPIs on initialization riscv: Consolidate fences into AMOs for available_harts_lock riscv: Ensure gp is NULL or points to valid data riscv: Add some comments to start.S arch/riscv/Kconfig | 16 arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/cpu/cpu.c| 20 arch/riscv/cpu/fu540/Kconfig| 2 +- arch/riscv/cpu/generic/Kconfig | 2 +- arch/riscv/cpu/start.S | 58 +- arch/riscv/dts/fu540-c000-u-boot.dtsi | 8 ++-- arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 arch/riscv/dts/k210.dtsi| 7 --- arch/riscv/include/asm/global_data.h| 3 --- arch/riscv/include/asm/smp.h| 7 +++ arch/riscv/include/asm/syscon.h | 4 ++-- arch/riscv/lib/Makefile | 1 - arch/riscv/lib/andes_plic.c | 58 +- arch/riscv/lib/andes_plmt.c | 44 +--- arch/riscv/lib/interrupts.c | 3 ++- arch/riscv/lib/rdtime.c | 38 -- arch/riscv/lib/sifive_clint.c | 62 ++ arch/riscv/lib/smp.c| 16 +++- arch/sandbox/dts/test.dts | 9 - arch/sandbox/include/asm/cpu.h | 11 +++ cmd/Kconfig | 2 +- doc/board/sipeed/maix.rst | 10 +++--- drivers/clk/kendryte/clk.c | 4 drivers/cpu/cpu_sandbox.c | 39 --- drivers/ram/sifive/fu540_ddr.c | 17 - drivers/timer/Kconfig | 4 ++-- drivers/timer/riscv_timer.c | 39 --- drivers/timer/sandbox_timer.c | 4 +++- drivers/timer/timer-uclass.c| 31 +++ include/dt-bindings/clock/k210-sysctl.h | 1 + include/timer.h | 15 +++ test/dm/timer.c | 27 ++- 33 files changed, 357 insertions(+), 211 deletions(-) delete mode 100644 arch/riscv/lib/rdtime.c create mode 100644 arch/sandbox/include/asm/cpu.h
Pull request: u-boot-riscv/master 20200825
Hi Tom, Please pull some riscv updates: - Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/720564636 The following changes since commit 1aa3966173fe92fa3c46638ee8eb8b8491f521d6: Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk (2020-08-24 09:06:02 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to c92b50a44b95e706b9c0c97544bd7504fe6d36e9: cmd: provide command sbi (2020-08-25 09:34:47 +0800) Bin Meng (2): riscv: fu540: Use correct API to get L2 cache controller base address ram: sifive: Fix compiler warnings for 32-bit Heinrich Schuchardt (4): clk: kendryte/pll.h: do not redefine nop() riscv: fix building with CONFIG_SPL_SMP=n configs: defconfig for Sipeed Maix in S-mode cmd: provide command sbi arch/riscv/cpu/fu540/cache.c| 3 ++- arch/riscv/include/asm/sbi.h| 2 ++ arch/riscv/lib/sbi.c| 36 arch/riscv/lib/spl.c| 2 +- board/sipeed/maix/MAINTAINERS | 2 +- cmd/Kconfig | 6 ++ cmd/riscv/Makefile | 1 + cmd/riscv/sbi.c | 82 ++ configs/sipeed_maix_smode_defconfig | 10 ++ doc/board/sipeed/maix.rst | 49 + drivers/ram/sifive/fu540_ddr.c | 4 ++-- include/kendryte/pll.h | 5 + 12 files changed, 197 insertions(+), 5 deletions(-) create mode 100644 cmd/riscv/sbi.c create mode 100644 configs/sipeed_maix_smode_defconfig
Pull request: u-boot-riscv/master 20200814
Hi Tom, Please pull some riscv updates: - Fix HiFive Unleashed the broken problem by call fix_fdt() before reserve_fdt(). Please refer to https://www.mail-archive.com/u-boot@lists.denx.de/msg379444.html for master u-boot broken for HiFive Unleashed. - Add unaligned exception cmd. - Refine sifive/fu540 spl flow. - Add additional crash information for efi. - Update sipeed/maix doc. - Two minor refine. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/717504142 The following changes since commit cdcf591d9b20534e5f5c58aa2a2b07b3b173f5a1: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-08-13 08:25:25 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 313981c2d9437f31b2a0f3838591a5fb0e5d8ebe: common/board_f: make sure to call fix_fdt() before reserve_fdt() (2020-08-14 14:39:47 +0800) Bin Meng (6): riscv: Call spl_board_init_f() in the generic SPL board_init_f() riscv: sifive/fu540: spl: Drop our own version of board_init_f() riscv: sifive/fu540: spl: Rename soc_spl_init() riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR riscv: sifive/fu540: Move SPL related functions to spl.c Heinrich Schuchardt (6): riscv: remove redundant logical constraint. riscv: sifive: fu540: redundant initialization doc: riscv: Update documentation for Sipeed MAIX boards doc: riscv: debug UART for MAIX cmd: exception: unaligned data access on RISC-V riscv: additional crash information Pragnesh Patel (1): common/board_f: make sure to call fix_fdt() before reserve_fdt() arch/riscv/cpu/fu540/Kconfig| 22 ++ arch/riscv/cpu/fu540/cache.c| 2 +- arch/riscv/cpu/fu540/spl.c | 2 +- arch/riscv/include/asm/arch-fu540/spl.h | 2 +- arch/riscv/include/asm/spl.h| 7 +++ arch/riscv/lib/andes_plic.c | 2 +- arch/riscv/lib/interrupts.c | 57 +++-- arch/riscv/lib/spl.c| 9 + board/sifive/fu540/Kconfig | 23 --- board/sifive/fu540/fu540.c | 33 - board/sifive/fu540/spl.c| 44 +--- cmd/riscv/exception.c | 17 - common/board_f.c| 6 +++--- doc/board/sipeed/maix.rst | 85 - 14 files changed, 201 insertions(+), 110 deletions(-)
[U-Boot] Pull request: u-boot-riscv/master 20200804
Hi Tom, Please pull some riscv updates: - add DM based reset driver for SiFive SoC's. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/714339244 The following changes since commit 68941e3b2c217907a49aa66af8bb65729b913397: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2020-08-03 10:25:47 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to ed50d3fae49b9dad58674b6609913beeac824e42: configs: reset: fu540: enable dm reset framework for SiFive (2020-08-04 09:19:41 +0800) Sagar Shrikant Kadam (5): dt-bindings: prci: add indexes for reset signals available in prci fu540: prci: use common reset indexes defined in binding header fu540: dtsi: add reset producer and consumer entries sifive: reset: add DM based reset driver for SiFive SoC's configs: reset: fu540: enable dm reset framework for SiFive arch/riscv/dts/fu540-c000-u-boot.dtsi | 12 arch/riscv/include/asm/arch-fu540/reset.h | 13 + configs/sifive_fu540_defconfig| 2 ++ drivers/clk/sifive/fu540-prci.c | 90 +- drivers/reset/Kconfig | 9 + drivers/reset/Makefile| 1 + drivers/reset/reset-sifive.c | 118 ++ include/dt-bindings/reset/sifive-fu540-prci.h | 19 +++ 8 files changed, 239 insertions(+), 25 deletions(-) create mode 100644 arch/riscv/include/asm/arch-fu540/reset.h create mode 100644 drivers/reset/reset-sifive.c create mode 100644 include/dt-bindings/reset/sifive-fu540-prci.h
[U-Boot] Pull request: u-boot-riscv/master 20200724
Hi Tom, Please pull some riscv updates: - Fix SiFive HiFive Unleashed board booting failure problem. - Enable SiFive fu540 PWM driver. - Support SiFive fu540: SPI boot. - Update OpenSBI used for RISC-V CI testing. - Revert "riscv: Allow use of reset drivers". - Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"". - sysreset: syscon: - Don't assume default value for offset and mask property. - Support value property. - qemu: Add syscon reboot and poweroff support. - Fix SIFIVE debug serial dependency. - Fix linking error when building u-boot-spl with no SMP support. - AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg. - Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi - SiFive fu540 avoid using hardcoded ram base and size. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/710968496 The following changes since commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7: Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm (2020-07-23 15:56:06 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to ecb70bdb9f12b694e3a50895a759119b3fc27507: ram: sifive: Avoid using hardcoded ram base and size (2020-07-24 14:56:29 +0800) Bin Meng (9): riscv: Make SiFive HiFive Unleashed board boot again azure: gitlab: travis: Update OpenSBI used for RISC-V testing Revert "riscv: Allow use of reset drivers" Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"" sysreset: syscon: Don't assume default value for offset and mask property sysreset: syscon: Support value property riscv: qemu: Add syscon reboot and poweroff support riscv: dts: hifive-unleashed-a00: Make memory node available to SPL ram: sifive: Avoid using hardcoded ram base and size Jagan Teki (6): sifive: fu540: Add runtime boot mode detection sifive: fu540: Add Booting from SPI env: Enable SPI flash env for SiFive FU540 sifive: fu540: Mark the default env as SPI flash sifive: fu540: Add boot flash script offset, size sifive: fu540: Enable SF distro bootcmd Leo Yu-Chi Liang (1): riscv: Fix linking error when building u-boot-spl with no SMP support Michal Simek (1): serial: Fix SIFIVE debug serial dependency Pragnesh Patel (1): riscv: sifive: fu540: Enable SiFive PWM driver Rick Chen (1): riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg .azure-pipelines.yml| 8 .gitlab-ci.yml | 8 .travis.yml | 8 arch/riscv/cpu/cpu.c| 2 +- arch/riscv/cpu/fu540/Kconfig| 13 + arch/riscv/cpu/start.S | 2 ++ arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 16 arch/riscv/lib/reset.c | 2 -- arch/riscv/lib/sifive_clint.c | 16 board/AndesTech/ax25-ae350/ax25-ae350.c | 3 ++- board/emulation/qemu-riscv/Kconfig | 4 board/sifive/fu540/Kconfig | 5 + board/sifive/fu540/fu540.c | 25 +++-- common/spl/spl_opensbi.c| 5 - configs/sifive_fu540_defconfig | 4 doc/board/sifive/fu540.rst | 41 + drivers/ram/sifive/fu540_ddr.c | 30 +++--- drivers/serial/Kconfig | 2 +- drivers/sysreset/sysreset_syscon.c | 28 +--- include/configs/sifive-fu540.h | 7 ++- 20 files changed, 178 insertions(+), 51 deletions(-)
[U-Boot] Pull request: u-boot-riscv/master 2020-07-02(2)
Hi Tom, This is version two of PR send by 7/2 Drop patchs about sysreset [PATCH 1/5] sysreset: syscon: Don't assume default value for offset and mask property [PATCH 2/5] sysreset: syscon: Support value property [PATCH 4/5] riscv: qemu: Add syscon reboot and poweroff support Please pull some riscv updates: - sbi: Add newline to error message - fu540: dts: Correct reg size of otp and dmc nodes - Enhance reserved memory fixup about PMP information passed from OpenSbi - sifive: fu540: Add gpio-restart support - qemu-riscv: Update QEMU run command - Assorted fixes related to reserved memory - fu540: enable all cache ways from U-Boot proper - use log functions in fdt_fixup Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/703843003 The following changes since commit bcfe764ee925d0820e82c69ccf75b71d142644c7: Merge tag 'efi-2020-07-rc6-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-06-30 17:15:39 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to c5a444270f4f4d1f5418c97db9ff18631bf69846: riscv: use log functions in fdt_fixup (2020-07-03 15:09:12 +0800) Atish Patra (2): riscv: Do not return error if reserved node already exists riscv: Use optimized version of fdtdec_get_addr_size_no_parent Bin Meng (8): riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node riscv: fu540: dts: Correct reg size of otp and dmc nodes riscv: Avoid the reserved memory fixup if src and dst point to the same place riscv: Expand the DT size before copy reserved memory node riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE riscv: Do not build reset.c if SYSRESET is on riscv: sifive: fu540: Add gpio-restart support doc: qemu-riscv: Update QEMU run command Heinrich Schuchardt (1): riscv: use log functions in fdt_fixup Pragnesh Patel (1): riscv: sifive: fu540: enable all cache ways from U-Boot proper Sean Anderson (1): riscv: sbi: Add newline to error message arch/riscv/Kconfig| 3 +++ arch/riscv/cpu/fu540/Makefile | 1 + arch/riscv/cpu/fu540/cache.c | 53 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 10 +++--- arch/riscv/include/asm/arch-fu540/cache.h | 14 ++ arch/riscv/lib/Makefile | 2 ++ arch/riscv/lib/fdt_fixup.c| 46 -- board/sifive/fu540/Kconfig| 2 ++ board/sifive/fu540/fu540.c| 10 +- common/spl/spl_opensbi.c | 2 +- configs/sifive_fu540_defconfig| 1 - doc/board/emulation/qemu-riscv.rst| 10 +- 12 files changed, 129 insertions(+), 25 deletions(-) create mode 100644 arch/riscv/cpu/fu540/cache.c create mode 100644 arch/riscv/include/asm/arch-fu540/cache.h
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - sbi: Add newline to error message - fu540: dts: Correct reg size of otp and dmc nodes - Enhance reserved memory fixup about PMP information passed from OpenSbi - sifive: fu540: Add gpio-restart support - qemu: Add syscon reboot and poweroff support - qemu-riscv: Update QEMU run command - Assorted fixes related to reserved memory - fu540: enable all cache ways from U-Boot proper - use log functions in fdt_fixup Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/703843003 The following changes since commit bcfe764ee925d0820e82c69ccf75b71d142644c7: Merge tag 'efi-2020-07-rc6-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-06-30 17:15:39 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to f889e3183a003e4e238f87cc9bb01bfcbd5548a5: riscv: use log functions in fdt_fixup (2020-07-02 10:31:39 +0800) Atish Patra (2): riscv: Do not return error if reserved node already exists riscv: Use optimized version of fdtdec_get_addr_size_no_parent Bin Meng (11): riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node riscv: fu540: dts: Correct reg size of otp and dmc nodes riscv: Avoid the reserved memory fixup if src and dst point to the same place riscv: Expand the DT size before copy reserved memory node riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE sysreset: syscon: Don't assume default value for offset and mask property sysreset: syscon: Support value property riscv: Do not build reset.c if SYSRESET is on riscv: qemu: Add syscon reboot and poweroff support riscv: sifive: fu540: Add gpio-restart support doc: qemu-riscv: Update QEMU run command Heinrich Schuchardt (1): riscv: use log functions in fdt_fixup Pragnesh Patel (1): riscv: sifive: fu540: enable all cache ways from U-Boot proper Sean Anderson (1): riscv: sbi: Add newline to error message arch/riscv/Kconfig| 3 +++ arch/riscv/cpu/fu540/Makefile | 1 + arch/riscv/cpu/fu540/cache.c | 53 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 10 +++--- arch/riscv/include/asm/arch-fu540/cache.h | 14 ++ arch/riscv/lib/Makefile | 2 ++ arch/riscv/lib/fdt_fixup.c| 46 -- board/emulation/qemu-riscv/Kconfig| 4 board/sifive/fu540/Kconfig| 2 ++ board/sifive/fu540/fu540.c| 10 +- common/spl/spl_opensbi.c | 2 +- configs/sifive_fu540_defconfig| 1 - doc/board/emulation/qemu-riscv.rst| 10 +- drivers/sysreset/sysreset_syscon.c| 28 +--- 14 files changed, 158 insertions(+), 28 deletions(-) create mode 100644 arch/riscv/cpu/fu540/cache.c create mode 100644 arch/riscv/include/asm/arch-fu540/cache.h
[U-Boot] Pull request: u-boot-riscv/next
Hi Tom, This PR is for -next Please pull some riscv updates: - Add Sipeed Maix support - Update clock handler and proper cpu features Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/703836681 The following changes since commit e2a4d24e6b1f3d30136e2dde7b6fbf35bd427b8a: Merge branch '2020-06-30-minor-TI-board-updates' into next (2020-06-30 15:03:25 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to add0dc1f7de91112d9e738f9482b09b75fa86acb: riscv: cpu: check and append L1 cache to cpu features (2020-07-01 15:01:27 +0800) Sagar Shrikant Kadam (4): riscv: dts: hifive-unleashed-a00: add cpu aliases uclass: cpu: fix to display proper CPU features riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit riscv: cpu: check and append L1 cache to cpu features Sean Anderson (20): clk: Always use the supplied struct clk clk: Check that ops of composite clock components exist before calling clk: Fix clk_get_by_* handling of index clk: Add K210 pll support clk: Add a bypass clock for K210 clk: Add K210 clock support dm: Add support for simple-pm-bus dm: Fix error handling for dev_read_addr_ptr reset: Add generic reset driver lib: Always set errno in hcreate_r riscv: Add headers for asm/global_data.h riscv: Clear pending interrupts before enabling IPIs riscv: Clean up IPI initialization code riscv: Add option to support RISC-V privileged spec 1.9 riscv: Allow use of reset drivers riscv: Try to get cpu frequency from a "clocks" node if it exists riscv: Enable cpu clock if it is present riscv: Add device tree for K210 and Sipeed Maix BitM doc: riscv: Add documentation for Sipeed Maix Bit riscv: Add Sipeed Maix support MAINTAINERS | 7 ++ arch/riscv/Kconfig| 14 arch/riscv/cpu/cpu.c | 15 arch/riscv/cpu/start.S| 2 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++ arch/riscv/dts/k210-maix-bit.dts | 47 + arch/riscv/dts/k210.dtsi | 594 arch/riscv/include/asm/csr.h | 40 +++ arch/riscv/include/asm/global_data.h | 2 + arch/riscv/include/asm/smp.h | 43 arch/riscv/lib/andes_plic.c | 34 - arch/riscv/lib/reset.c| 2 + arch/riscv/lib/sbi_ipi.c | 5 ++ arch/riscv/lib/sifive_clint.c | 33 +++-- arch/riscv/lib/smp.c | 49 ++--- arch/sandbox/dts/test.dts | 21 ++ arch/sandbox/include/asm/clk.h| 1 + board/sipeed/maix/Kconfig | 47 + board/sipeed/maix/MAINTAINERS | 11 +++ board/sipeed/maix/Makefile| 5 ++ board/sipeed/maix/maix.c | 41 +++ common/spl/spl_opensbi.c | 5 ++ configs/sandbox_defconfig | 3 + configs/sipeed_maix_bitm_defconfig| 8 +++ doc/board/index.rst | 1 + doc/board/sipeed/index.rst| 9 +++ doc/board/sipeed/maix.rst | 298 +++ doc/device-tree-bindings/bus/simple-pm-bus.txt| 44 doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt | 33 + doc/device-tree-bindings/reset/syscon-reset.txt | 36 ++ doc/imx/clk/ccf.txt | 63 - drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/clk-composite.c | 64 +++-- drivers/clk/clk-divider.c | 6 +- drivers/clk/clk-fixed-factor.c| 3 +- drivers/clk/clk-gate.c| 6 +- drivers/clk/clk-mux.c | 12 ++-- drivers/clk/clk-uclass.c | 8 +-- drivers/clk/imx/clk-gate2.c | 4 +- drivers/clk/imx/clk-imx8mp.c
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - fu540: dts: Correct reg size of otp and dmc nodes - sbi: Add newline to error message - sifive/fu540: Enable SPI-NOR support Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/701223929 The following changes since commit 4ff63383e3497389e66cf70943a83bdb1810462a: Merge tag 'u-boot-imx-20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2020-06-23 08:20:55 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 2148d9c76ef5efbf5b98ca3d3fcbaad465115e70: riscv: fu540: dts: Correct reg size of otp and dmc nodes (2020-06-24 09:59:30 +0800) Bin Meng (2): riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node riscv: fu540: dts: Correct reg size of otp and dmc nodes Jagan Teki (6): sifive: fu540: Add runtime boot mode detection sifive: fu540: Add Booting from SPI env: Enable SPI flash env for SiFive FU540 sifive: fu540: Mark the default env as SPI flash sifive: fu540: Add boot flash script offset, size sifive: fu540: Enable SF distro bootcmd Sean Anderson (1): riscv: sbi: Add newline to error message arch/riscv/cpu/fu540/Kconfig| 15 +++ arch/riscv/dts/fu540-c000-u-boot.dtsi | 6 +++--- arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 12 board/sifive/fu540/Kconfig | 1 + board/sifive/fu540/fu540.c | 25 +++-- common/spl/spl_opensbi.c| 2 +- configs/sifive_fu540_defconfig | 4 doc/board/sifive/fu540.rst | 41 + include/configs/sifive-fu540.h | 7 ++- 9 files changed, 102 insertions(+), 11 deletions(-)
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom,
Please pull some riscv updates:
- Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01")
Move sbi_probe_extension() out of CONFIG_SBI_V01.
- SiFive FU540 support SPL.
Thanks
Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/694099665
The following changes since commit 0d8f35b58cc8458a5263b424896a386429ee49e5:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi (2020-06-03
12:27:51 -0400)
are available in the Git repository at:
g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 0a94007e829876c7ebd49daebfaa90eea25801b8:
riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01 (2020-06-04
09:44:21 +0800)
Bin Meng (2):
riscv: sbi: Remove sbi_spec_version
riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01
Jagan Teki (2):
sifive: fu540: Add sample SD gpt partition layout
sifive: fu540: Add U-Boot proper sector start
Pragnesh Patel (17):
misc: add driver for the SiFive otp controller
riscv: sifive: fu540: Use OTP DM driver for serial environment variable
riscv: Add _image_binary_end for SPL
lib: Makefile: build crc7.c when CONFIG_MMC_SPI
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
sifive: fu540: add ddr driver
sifive: dts: fu540: Add DDR controller and phy register settings
riscv: sifive: dts: fu540: add U-Boot dmc node
clk: sifive: fu540-prci: Add clock enable and disable ops
clk: sifive: fu540-prci: Add ddr clock initialization
clk: sifive: fu540-prci: Release ethernet clock reset
riscv: sifive: dts: fu540: set ethernet clock rate
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
riscv: cpu: fu540: Add support for cpu fu540
riscv: sifive: fu540: add SPL configuration
configs: fu540: Add config options for U-Boot SPL
doc: sifive: fu540: Add description for OpenSBI generic platform
arch/riscv/Kconfig |1 +
arch/riscv/cpu/fu540/Kconfig | 15 ++
arch/riscv/cpu/fu540/Makefile | 11 ++
arch/riscv/cpu/fu540/cpu.c | 22 +++
arch/riscv/cpu/fu540/dram.c| 38 +
arch/riscv/cpu/fu540/spl.c | 23 +++
arch/riscv/cpu/u-boot-spl.lds |1 +
arch/riscv/dts/fu540-c000-u-boot.dtsi | 89 +++
arch/riscv/dts/fu540-c000.dtsi | 37 -
arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi | 1489
+++
arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi| 22 +++
arch/riscv/dts/hifive-unleashed-a00.dts|9 ++
arch/riscv/include/asm/arch-fu540/clk.h| 14 ++
arch/riscv/include/asm/arch-fu540/gpio.h | 38 +
arch/riscv/include/asm/arch-fu540/spl.h| 14 ++
arch/riscv/include/asm/sbi.h |2 -
arch/riscv/lib/sbi.c | 40 +++--
board/sifive/fu540/Kconfig | 18 ++-
board/sifive/fu540/Makefile|4 +
board/sifive/fu540/fu540.c | 134
board/sifive/fu540/spl.c | 74 +
common/spl/Kconfig |3 +-
configs/sifive_fu540_defconfig |8 +
doc/board/sifive/fu540.rst | 135 ++--
drivers/clk/sifive/fu540-prci.c| 177 ++---
drivers/misc/Kconfig |7 +
drivers/misc/Makefile |1 +
drivers/misc/sifive-otp.c | 275
+
drivers/ram/Kconfig|1 +
drivers/ram/Makefile |2 +
drivers/ram/sifive/Kconfig | 13 ++
drivers/ram/sifive/Makefile|6 +
drivers/ram/sifive/fu540_ddr.c | 410
+
include/configs/sifive-fu540.h | 31
lib/Makefile |2 +-
35 files changed, 3037 insertions(+), 129 deletions(-)
create mode 100644 arch/riscv/cpu/fu540/Kconfig
create mode 100644 arch/riscv/cpu/fu540/Makefile
create mode 100644 arch/riscv/cpu/fu540/cpu.c
create mode 100644 arch/riscv/cpu/fu540/dram.c
create mode 100644 arch/riscv/cpu/fu540/spl.c
create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi
create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi
create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h
create mode 100644
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - sifive: fix palmer's email address. - Move all SMP related SBI calls to SBI_v01. Thanks Rick The following changes since commit 8c48bb21bd6a1778d1f299de30ff62c07929702b: Prepare v2020.07-rc3 (2020-05-25 20:34:01 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 4ef196ce20fc832a412e8fedf51f2f20b3bd6e62: sifive: fix palmer's email address (2020-05-26 15:50:15 +0800) Atish Patra (1): riscv: Move all SMP related SBI calls to SBI_v01 Pragnesh Patel (1): sifive: fix palmer's email address arch/riscv/include/asm/sbi.h | 5 ++--- arch/riscv/lib/sbi.c | 37 ++--- board/sifive/fu540/MAINTAINERS | 2 +- 3 files changed, 21 insertions(+), 23 deletions(-)
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Add Sipeed Maix support. - sifive: fix palmer's email address. - Move all SMP related SBI calls to SBI_v01. https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/690778926 Thanks Rick The following changes since commit 9c5fef577494769e3ff07952a85f9b7125ef765b: Merge git://git.denx.de/u-boot-usb (2020-05-22 22:58:50 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 421c4eb2dcf39f65c31c1804369267ed8a7b5607: riscv: Add Sipeed Maix support (2020-05-25 10:01:21 +0800) Atish Patra (1): riscv: Move all SMP related SBI calls to SBI_v01 Pragnesh Patel (1): sifive: fix palmer's email address Sean Anderson (21): clk: Always use the supplied struct clk clk: Check that ops of composite clock components exist before calling clk: Unconditionally recursively en-/dis-able clocks clk: Fix clk_get_by_* handling of index clk: Add K210 pll support clk: Add a bypass clock for K210 clk: Add K210 clock support dm: Add support for simple-pm-bus dm: Fix error handling for dev_read_addr_ptr reset: Add generic reset driver lib: Always set errno in hcreate_r riscv: Add headers for asm/global_data.h riscv: Clear pending interrupts before enabling IPIs riscv: Clean up IPI initialization code riscv: Add option to support RISC-V privileged spec 1.9 riscv: Allow use of reset drivers riscv: Try to get cpu frequency from a "clocks" node if it exists riscv: Enable cpu clock if it is present riscv: Add device tree for K210 and Sipeed Maix BitM doc: riscv: Add documentation for Sipeed Maix Bit riscv: Add Sipeed Maix support MAINTAINERS | 7 + arch/riscv/Kconfig| 14 ++ arch/riscv/cpu/cpu.c | 15 +++ arch/riscv/cpu/start.S| 2 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/k210-maix-bit.dts | 47 +++ arch/riscv/dts/k210.dtsi | 594 + arch/riscv/include/asm/csr.h | 40 ++ arch/riscv/include/asm/global_data.h | 2 + arch/riscv/include/asm/sbi.h | 5 +- arch/riscv/include/asm/smp.h | 43 +++ arch/riscv/lib/andes_plic.c | 34 ++--- arch/riscv/lib/reset.c| 2 + arch/riscv/lib/sbi.c | 37 +++--- arch/riscv/lib/sbi_ipi.c | 5 + arch/riscv/lib/sifive_clint.c | 33 ++--- arch/riscv/lib/smp.c | 49 +-- arch/sandbox/dts/test.dts | 21 +++ arch/sandbox/include/asm/clk.h| 1 + board/sifive/fu540/MAINTAINERS| 2 +- board/sipeed/maix/Kconfig | 47 +++ board/sipeed/maix/MAINTAINERS | 11 ++ board/sipeed/maix/Makefile| 5 + board/sipeed/maix/maix.c | 41 ++ common/spl/spl_opensbi.c | 5 + configs/sandbox_defconfig | 3 + configs/sipeed_maix_bitm_defconfig| 8 ++ doc/board/index.rst | 1 + doc/board/sipeed/index.rst| 9 ++ doc/board/sipeed/maix.rst | 298 +++ doc/device-tree-bindings/bus/simple-pm-bus.txt| 44 +++ doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt | 33 + doc/device-tree-bindings/reset/syscon-reset.txt | 36 ++ doc/imx/clk/ccf.txt | 63 - drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/clk-composite.c | 64 ++ drivers/clk/clk-divider.c | 6 +- drivers/clk/clk-fixed-factor.c| 3 +- drivers/clk/clk-gate.c| 6 +- drivers/clk/clk-mux.c | 12 +- drivers/clk/clk-uclass.c | 68 +- drivers/clk/imx/clk-gate2.c | 4 +- drivers/clk/imx/clk-imx8mp.c | 2 +- drivers/clk/kendryte/Kconfig | 12 ++ drivers/clk/kendryte/Makefile | 1 +
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Adds few DT related fixes required for Linux EFI stub to work on RISC-V. - Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7. - Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL" - Remove unnecessary CONFIG_IS_ENABLED(). https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678432471 Thanks Rick The following changes since commit caad316b3165615f1a4848901811a4a08c9d: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-04-22 13:00:21 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 177c53fe6c64d8656f5a647116a97047202c5455: riscv: Move all fdt fixups together (2020-04-23 10:14:16 +0800) Atish Patra (6): riscv: Add boot hartid to device tree fdtdec: Fix boundary check riscv: Provide a mechanism to fix DT for reserved memory riscv: Setup reserved-memory node for FU540 riscv: Copy the reserved-memory nodes to final DT riscv: Move all fdt fixups together Bin Meng (6): riscv: qemu: Remove the simple-bus driver for the SoC node riscv: Merge unnecessary SMP ifdefs in start.S riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL riscv: Add SMP Kconfig option dependency for U-Boot proper riscv: Add Kconfig option for SBI v0.2 riscv: Make SBI v0.2 the default SBI version Lukas Auer (1): Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL" Pragnesh Patel (1): riscv: ax25: cache: Remove SPL_RISCV_MMODE config check arch/riscv/Kconfig | 34 +++-- arch/riscv/cpu/ax25/cache.c | 16 ++-- arch/riscv/cpu/generic/cpu.c| 14 --- arch/riscv/cpu/start.S | 19 ++ arch/riscv/include/asm/global_data.h| 3 ++- arch/riscv/include/asm/u-boot-riscv.h | 2 ++ arch/riscv/lib/Makefile | 3 ++- arch/riscv/lib/asm-offsets.c| 1 + arch/riscv/lib/bootm.c | 5 arch/riscv/lib/fdt_fixup.c | 150 + arch/riscv/lib/spl.c| 2 +- board/emulation/qemu-riscv/Kconfig | 1 - board/emulation/qemu-riscv/qemu-riscv.c | 39 - common/spl/spl_opensbi.c| 2 +- configs/sifive_fu540_defconfig | 1 + doc/board/emulation/qemu-riscv.rst | 2 +- lib/fdtdec.c| 3 ++- 17 files changed, 211 insertions(+), 86 deletions(-) create mode 100644 arch/riscv/lib/fdt_fixup.c
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom,
Please pull some riscv updates:
- Fix sbi_remote_sfence_vma{,_asid}.
- Avoid calling sbi_clear_ipi().
- Add new SBI v0.2 extensions support.
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/663341855
Thanks
Rick
The following changes since commit a4df9d8ab848ea4ff10b247ae435b0a14bbbd066:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-03-16
12:33:24 -0400)
are available in the Git repository at:
g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 5bde2152d42515f7af46d210d7edf14e3b10d5f5:
riscv: Implement new SBI v0.2 extensions (2020-03-17 11:29:54 +0800)
Bin Meng (7):
riscv: Fix sbi_remote_sfence_vma{,_asid}
riscv: Avoid calling sbi_clear_ipi()
riscv: Mark existing SBI as v0.1 SBI
riscv: Add basic support for SBI v0.2
riscv: Add SBI v0.2 extension definitions
riscv: Introduce a new config for SBI v0.1
riscv: Implement new SBI v0.2 extensions
arch/riscv/Kconfig | 13 +
arch/riscv/include/asm/sbi.h | 163
+---
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/sbi.c | 187
arch/riscv/lib/sbi_ipi.c | 3 +-
5 files changed, 299 insertions(+), 68 deletions(-)
create mode 100644 arch/riscv/lib/sbi.c
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Fix ax25-ae350.rst document. - Refine RISC-V linker script and start.S. - Add option to print more information on exception. https://travis-ci.org/rickchen36/u-boot-riscv/builds/646697243 Thanks Rick The following changes since commit e1dff2d69e5a21a61c3eb28e5d230a6d48749b6c: Merge branch '2020-02-07-master-imports' (2020-02-07 19:04:23 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 404339759ef5e0bcd4fa7768d1148b1ace2d2bb6: riscv: Remove unnecessary instruction (2020-02-10 14:51:52 +0800) Heinrich Schuchardt (1): doc: fix AX25-AE350 RISC-V documentation Jagan Teki (1): doc: fix opensbi build steps for AX25-AE350 Sean Anderson (3): riscv: Fix breakage caused by linker relaxation riscv: Add option to print registers on exception riscv: Remove unnecessary instruction arch/riscv/Kconfig | 3 + arch/riscv/cpu/mtrap.S | 3 +- arch/riscv/cpu/start.S | 5 +- arch/riscv/cpu/u-boot.lds | 1 - arch/riscv/lib/interrupts.c| 50 + doc/board/AndesTech/ax25-ae350.rst | 343 +- 6 files changed, 219 insertions(+), 186 deletions(-)
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Increase stack size to avoid a stack overflow during distro boot. - Add hifive-unleashed-a00.dts for SIFIVE FU540. - Add OF_SEPARATE support for SIFIVE FU540. - Add SPL support for Andes AX25 AE350. - Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V. https://travis-ci.org/rickchen36/u-boot-riscv/builds/622462488 Thanks Rick The following changes since commit 0c5c3f293554614416a188d16a8c05e0a6c5bfbb: arm: -march=armv5t for ARM11 (2019-12-09 10:36:00 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 0e1233ce9069a87a84a4385de456665d2bc9229d: spl: opensbi: wait for ack from secondary harts before entering OpenSBI (2019-12-10 08:23:10 +0800) Jagan Teki (1): riscv: dts: Add hifive-unleashed-a00 dts from Linux Lukas Auer (5): riscv: increase stack size to avoid a stack overflow during distro boot spl: opensbi: specify main hart as preferred boot hart riscv: add functions for reading the IPI status riscv: add option to wait for ack from secondary harts in smp functions spl: opensbi: wait for ack from secondary harts before entering OpenSBI Rick Chen (11): Use dts support from U-Boot via OF_SEPARATE instead of depending from opensbi. riscv: ax25: add SPL support riscv: ax25-ae350: add SPL configuration riscv: ax25-ae350: Use generic memory size setup riscv: andes_plic: Fix some wrong configurations riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL spl: cache: Allow cache drivers in SPL riscv: Fix clear bss loop in the start-up code riscv: dts: Support four cores SMP riscv: dts: Add #address-cells and #size-cells in nor node doc: update AX25-AE350 RISC-V documentation arch/riscv/Kconfig | 2 +- arch/riscv/cpu/ax25/Kconfig | 4 ++- arch/riscv/cpu/ax25/cache.c | 60 ++--- arch/riscv/cpu/start.S | 6 +++-- arch/riscv/cpu/u-boot-spl.lds | 2 +- arch/riscv/cpu/u-boot.lds | 2 +- arch/riscv/dts/Makefile | 1 + arch/riscv/dts/ae350_32.dts | 61 +++--- arch/riscv/dts/ae350_64.dts | 61 +++--- arch/riscv/dts/fu540-c000.dtsi | 251 + arch/riscv/dts/hifive-unleashed-a00.dts | 96 arch/riscv/include/asm/smp.h| 3 ++- arch/riscv/lib/andes_plic.c | 22 ++--- arch/riscv/lib/bootm.c | 2 +- arch/riscv/lib/sbi_ipi.c| 11 + arch/riscv/lib/sifive_clint.c | 9 +++ arch/riscv/lib/smp.c| 43 ++--- arch/riscv/lib/spl.c| 2 +- board/AndesTech/ax25-ae350/Kconfig | 9 +++ board/AndesTech/ax25-ae350/MAINTAINERS | 4 +++ board/AndesTech/ax25-ae350/ax25-ae350.c | 48 +--- common/spl/Kconfig | 7 ++ common/spl/spl_opensbi.c| 13 +- configs/ae350_rv32_spl_defconfig| 38 + configs/ae350_rv32_spl_xip_defconfig| 40 ++ configs/ae350_rv64_spl_defconfig| 39 ++ configs/ae350_rv64_spl_xip_defconfig| 41 +++ configs/sifive_fu540_defconfig | 3 ++- doc/board/AndesTech/ax25-ae350.rst | 209 ++--- doc/board/sifive/fu540.rst | 5 +--- drivers/Makefile| 1 + include/configs/ax25-ae350.h| 17 + include/opensbi.h | 18 +- 33 files changed, 1057 insertions(+), 73 deletions(-) create mode 100644 arch/riscv/dts/fu540-c000.dtsi create mode 100644 arch/riscv/dts/hifive-unleashed-a00.dts create mode 100644 configs/ae350_rv32_spl_defconfig create mode 100644 configs/ae350_rv32_spl_xip_defconfig create mode 100644 configs/ae350_rv64_spl_defconfig create mode 100644 configs/ae350_rv64_spl_xip_defconfig
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Support sifive DM based gpio driver for FU540-SoC. - Align boot image header with Linux v5.3 https://travis-ci.org/rickchen36/u-boot-riscv/builds/599424917 Thanks Rick The following changes since commit a2fce50455c9831f36765e5813b0b5e98f55d70b: Merge tag 'for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-ubi (2019-10-17 07:26:16 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 70d64a4c7646aa51c0334618ccb9af0132d9d834: RISC-V: Align boot image header with Linux (2019-10-18 09:04:19 +0800) Atish Patra (1): RISC-V: Align boot image header with Linux Sagar Shrikant Kadam (2): gpio: sifive: add support for DM based gpio driver for FU540-SoC configs: fu540: enable gpio driver arch/riscv/include/asm/arch-generic/gpio.h | 35 + arch/riscv/include/asm/gpio.h | 6 arch/riscv/lib/image.c | 11 --- board/sifive/fu540/Kconfig | 3 ++ drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/sifive-gpio.c | 177 ++ 7 files changed, 235 insertions(+), 5 deletions(-) create mode 100644 arch/riscv/include/asm/arch-generic/gpio.h create mode 100644 arch/riscv/include/asm/gpio.h create mode 100644 drivers/gpio/sifive-gpio.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Skip unavailable hart in the get_count(). - fu540 set serial env from otp. - fu540 add mmc0 as a boot target device. - Update fix_rela_dyn and add absolute reloc addend. - Andestech PLIC driver will skip unavailable hart. - Support Andestech V5L2 cache driver. https://travis-ci.org/rickchen36/u-boot-riscv/builds/579707002 Thanks Rick The following changes since commit d22c8be964a870f59d2fdab6c67cefa0c4799364: Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-01 13:33:12 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 61ce84b2cf1a6672c8e402ce8174554b25629692: riscv: cache: use CCTL to flush d-cache (2019-09-03 09:31:03 +0800) Alistair Francis (1): sifive-fu540: config: Add mmc0 as a boot target device Bin Meng (1): riscv: cpu: Skip unavailable hart in the get_count() op Marcus Comstedt (2): riscv: tools: Handle addend to absolute reloc in prelink-riscv riscv: update fix_rela_dyn Rick Chen (9): riscv: andes_plic: init plic by scanning each cpu node dm: cache: Add enable and disable ops for cache uclass dm: cache: Add enable and disable ops for sandbox and test dm: cache: add v5l2 cache controller driver riscv: ae350: use the v5l2 driver to configure the cache riscv: ax25: add imply v5l2 cache controller riscv: cache: Flush L2 cache before jump to linux riscv: dts: move out AE350 L2 node from cpus node riscv: cache: use CCTL to flush d-cache Sagar Shrikant Kadam (1): riscv: sifive: fu540: set serial environment variable from otp arch/riscv/cpu/ax25/Kconfig | 1 + arch/riscv/cpu/ax25/cache.c | 39 +-- arch/riscv/cpu/start.S | 10 +++--- arch/riscv/dts/ae350_32.dts | 17 ++ arch/riscv/dts/ae350_64.dts | 17 ++ arch/riscv/lib/andes_plic.c | 36 ++--- board/AndesTech/ax25-ae350/ax25-ae350.c | 9 ++ board/sifive/fu540/fu540.c | 18 --- drivers/cache/Kconfig | 9 ++ drivers/cache/Makefile | 1 + drivers/cache/cache-uclass.c| 20 drivers/cache/cache-v5l2.c | 186 + drivers/cache/sandbox_cache.c | 13 drivers/cpu/riscv_cpu.c | 4 +++ include/cache.h | 31 +++ include/configs/sifive-fu540.h | 1 + test/dm/cache.c | 2 ++ tools/prelink-riscv.inc | 8 +++-- 18 files changed, 379 insertions(+), 43 deletions(-) create mode 100644 drivers/cache/cache-v5l2.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Support SPL and OpenSBI (FW_DYNAMIC firmware) boot. - Fix qemu kconfig build warning. https://travis-ci.org/rickchen36/u-boot-riscv/builds/576608303 Thanks Rick The following changes since commit 50b4b80f597b9f59b98adbdbad691b1027bd501a: Merge tag 'u-boot-rockchip-20190823' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2019-08-24 08:33:27 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 44016bc59870c8816fe2cd4721dc5ff11038dd98: riscv: qemu: Fix kconfig build warning (2019-08-26 16:09:02 +0800) Bin Meng (1): riscv: qemu: Fix kconfig build warning Lukas Auer (11): fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL Makefile: support building SPL FIT images without device trees spl: fit: use U-Boot device tree when FIT image has no device tree riscv: add run mode configuration for SPL spl: support booting via RISC-V OpenSBI riscv: add SPL support riscv: support SPL stack and global data relocation riscv: add a generic FIT generator script riscv: set default FIT generator script and build target for SPL builds riscv: qemu: add SPL configuration doc: update QEMU RISC-V documentation Kconfig | 4 +++- Makefile| 8 ++-- arch/Kconfig| 6 ++ arch/riscv/Kconfig | 36 +++- arch/riscv/cpu/ax25/Kconfig | 6 +++--- arch/riscv/cpu/cpu.c| 6 +++--- arch/riscv/cpu/generic/Kconfig | 5 - arch/riscv/cpu/start.S | 62 ++ arch/riscv/cpu/u-boot-spl.lds | 82 ++ arch/riscv/include/asm/encoding.h | 2 +- arch/riscv/include/asm/spl.h| 31 +++ arch/riscv/lib/Makefile | 8 ++-- arch/riscv/lib/mkimage_fit_opensbi.sh | 100 arch/riscv/lib/spl.c| 48 board/emulation/qemu-riscv/Kconfig | 11 +++ board/emulation/qemu-riscv/MAINTAINERS | 2 ++ board/emulation/qemu-riscv/qemu-riscv.c | 17 + common/image.c | 1 + common/spl/Kconfig | 17 + common/spl/Makefile | 1 + common/spl/spl.c| 8 +++- common/spl/spl_fit.c| 37 - common/spl/spl_opensbi.c| 85 + configs/qemu-riscv32_spl_defconfig | 11 +++ configs/qemu-riscv64_spl_defconfig | 12 doc/board/emulation/qemu-riscv.rst | 60 +++- include/configs/qemu-riscv.h| 14 ++ include/fdtdec.h| 2 +- include/image.h | 1 + include/opensbi.h | 40 include/spl.h | 5 + lib/fdtdec.c| 6 ++ 32 files changed, 692 insertions(+), 42 deletions(-) create mode 100644 arch/riscv/cpu/u-boot-spl.lds create mode 100644 arch/riscv/include/asm/spl.h create mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh create mode 100644 arch/riscv/lib/spl.c create mode 100644 common/spl/spl_opensbi.c create mode 100644 configs/qemu-riscv32_spl_defconfig create mode 100644 configs/qemu-riscv64_spl_defconfig create mode 100644 include/opensbi.h ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Fix sifive serial y-modem transfer. - Access CSRs using CSR numbers. - Update doc sifive-fu540 - Support big endian hosts and target. https://travis-ci.org/rickchen36/u-boot-riscv/builds/572159567 Thanks Rick The following changes since commit df33f8646855e65b8e7232c7fd5739e1ae1eb58b: configs: Resync with savedefconfig (2019-08-14 08:11:27 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 4539926a9c47638951f29f550f3a640e4c223032: riscv: tools: Add big endian target support to prelink-riscv (2019-08-15 13:42:28 +0800) Anup Patel (1): doc: sifive-fu540: Update README to explicitly load DTB for Linux Bin Meng (2): riscv: Sync csr.h with Linux kernel v5.2 riscv: Access CSRs using CSR numbers Marcus Comstedt (2): riscv: tools: Fix prelink-riscv to work on big endian hosts riscv: tools: Add big endian target support to prelink-riscv Sagar Shrikant Kadam (1): riscv : serial: use rx watermark to indicate rx data is present arch/riscv/cpu/cpu.c | 9 ++- arch/riscv/cpu/start.S| 3 +- arch/riscv/include/asm/asm.h | 68 arch/riscv/include/asm/csr.h | 74 +- arch/riscv/include/asm/encoding.h | 238 + doc/board/sifive/fu540.rst| 396 --- drivers/serial/serial_sifive.c| 23 +++ tools/prelink-riscv.c | 39 +--- tools/prelink-riscv.inc | 60 ++ 9 files changed, 426 insertions(+), 484 deletions(-) create mode 100644 arch/riscv/include/asm/asm.h ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 4/5] net: mvpp2: use new MVMDIO driver
From: Nevo Hed
This commit ports mvpp2 to use the recently introduced Marvell MDIO
(MVMDIO) driver. It removes direct interaction with the SMI & XSMI
busses. This commit is based in part on earlier work by
Ken Ma in Marvell's own downstream repo:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c81dc39.
The above refrenced work was based on an MVMDIO implementation that
never made it into U-Boot. With this patch the mvpp2 driver switches
to use the new MVMDIO driver that is based on a more universal
mdio-uclass implementation.
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 195
1 file changed, 18 insertions(+), 177 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 4ba6f9be3e..cfd119da37 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -62,8 +63,6 @@ do {
\
#define MTU1500
#define RX_BUFFER_SIZE (ALIGN(MTU + WRAP, ARCH_DMA_MINALIGN))
-#define MVPP2_SMI_TIMEOUT 1
-
/* RX Fifo Registers */
#define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
#define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
@@ -490,23 +489,8 @@ do {
\
#define MVPP2_QUEUE_NEXT_DESC(q, index) \
(((index) < (q)->last_desc) ? ((index) + 1) : 0)
-/* SMI: 0xc0054 -> offset 0x54 to lms_base */
-#define MVPP21_SMI 0x0054
/* PP2.2: SMI: 0x12a200 -> offset 0x1200 to iface_base */
#define MVPP22_SMI 0x1200
-#define MVPP2_PHY_REG_MASK 0x1f
-/* SMI register fields */
-#define MVPP2_SMI_DATA_OFFS0 /* Data */
-#define MVPP2_SMI_DATA_MASK(0x <<
MVPP2_SMI_DATA_OFFS)
-#define MVPP2_SMI_DEV_ADDR_OFFS16 /* PHY device address */
-#define MVPP2_SMI_REG_ADDR_OFFS21 /* PHY device reg addr*/
-#define MVPP2_SMI_OPCODE_OFFS 26 /* Write/Read opcode */
-#define MVPP2_SMI_OPCODE_READ (1 << MVPP2_SMI_OPCODE_OFFS)
-#define MVPP2_SMI_READ_VALID (1 << 27) /* Read Valid */
-#define MVPP2_SMI_BUSY (1 << 28) /* Busy */
-
-#define MVPP2_PHY_ADDR_MASK0x1f
-#define MVPP2_PHY_REG_MASK 0x1f
/* Additional PPv2.2 offsets */
#define MVPP22_MPCS0x007000
@@ -952,7 +936,6 @@ struct mvpp2_port {
/* Per-port registers' base address */
void __iomem *base;
- void __iomem *mdio_base;
struct mvpp2_rx_queue **rxqs;
struct mvpp2_tx_queue **txqs;
@@ -973,9 +956,8 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
- int phy_node;
int phyaddr;
- struct mii_dev *bus;
+ struct udevice *mdio_dev;
#ifdef CONFIG_DM_GPIO
struct gpio_desc phy_reset_gpio;
struct gpio_desc phy_tx_disable_gpio;
@@ -4499,8 +4481,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
struct phy_device *phy_dev;
if (!port->init || port->link == 0) {
- phy_dev = phy_connect(port->bus, port->phyaddr, dev,
- port->phy_interface);
+ phy_dev = dm_mdio_phy_connect(port->mdio_dev, port->phyaddr,
+ dev, port->phy_interface);
/*
* If the phy doesn't match with any existing u-boot drivers the
@@ -4585,7 +4567,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
return err;
}
- if (port->phy_node) {
+ if (port->phyaddr < PHY_MAX_ADDR) {
mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
@@ -4724,35 +4706,25 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
-
- /* Default mdio_base from the same eth base */
- if (port->priv->hw_version == MVPP21)
- port->mdio_base = port->priv->lms_base + MVPP21_SMI;
- else
- port->mdio_base = port->priv->iface_base + MVPP22_SMI;
+ int ret;
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
if (phy_node > 0) {
- ofnode phy_ofnode;
- fdt_addr_t phy_base;
-
+ int parent;
phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
if (phyaddr < 0) {
dev_err(>dev, "could not find phy address\n");
[U-Boot] [PATCH v4 1/5] net: mvpp2x: fix traffic stuck after PHY start error
From: Stefan Chulski
Issue:
- Network stuck if autonegotion fails.
Issue root cause:
- When autonegotiation fails during port open procedure, the packet
processor configuration does not finish and open procedure exits
with error.
- However, this doesn't prevent u-boot network framework from
calling send and receive procedures.
- Using transmit and receive functions of misconfigured packet
processor will cause traffic to get stuck.
Fix:
- Continue packet processor configuration even if autonegotiation
fails. Only error message is triggered in this case.
- Exit transmit and receive functions if there is no PHY link
indication.
- U-boot network framework now calls open procedure again during next
transmit initiation.
Signed-off-by: Stefan Chulski
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
---
drivers/net/mvpp2.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index bd89725e77..f36c8236b1 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,7 @@ static void mvpp2_stop_dev(struct mvpp2_port *port)
gop_port_enable(port, 0);
}
-static int mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
+static void mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
{
struct phy_device *phy_dev;
@@ -4504,7 +4504,7 @@ static int mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
- return -ENODEV;
+ return;
}
phy_dev->supported &= PHY_GBIT_FEATURES;
phy_dev->advertising = phy_dev->supported;
@@ -4516,18 +4516,14 @@ static int mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
phy_config(phy_dev);
phy_startup(phy_dev);
- if (!phy_dev->link) {
+ if (!phy_dev->link)
printf("%s: No link\n", phy_dev->dev->name);
- return -1;
- }
-
- port->init = 1;
+ else
+ port->init = 1;
} else {
mvpp2_egress_enable(port);
mvpp2_ingress_enable(port);
}
-
- return 0;
}
static int mvpp2_open(struct udevice *dev, struct mvpp2_port *port)
@@ -4567,10 +4563,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
}
if (port->phy_node) {
- err = mvpp2_phy_connect(dev, port);
- if (err < 0)
- return err;
-
+ mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
mvpp2_egress_enable(port);
@@ -5175,6 +5168,10 @@ static int mvpp2_recv(struct udevice *dev, int flags,
uchar **packetp)
struct mvpp2_rx_queue *rxq;
u8 *data;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
/* Process RX packets */
rxq = port->rxqs[0];
@@ -5240,6 +5237,10 @@ static int mvpp2_send(struct udevice *dev, void *packet,
int length)
int tx_done;
int timeout;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
txq = port->txqs[0];
aggr_txq = >priv->aggr_txqs[smp_processor_id()];
--
2.21.0
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[U-Boot] [PATCH v4 3/5] arm: dts: armada-cp110-*dtsi: add xmdio nodes
From: Nevo Hed
Based on upstream-linux
See https://github.com/torvalds/linux/commit/f66b2aff.
However made the XSMI register window 0x16 (22) bytes per my reading
of the functional spec. Similar commits in Marvels own repo bump it
to 0x200 (512) bytes but I did not see the reasoning for that.
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4.
Also added device-name attributes to prevent ambiguity in the `mdio`
command.
Signed-off-by: Nevo Hed
---
arch/arm/dts/armada-cp110-master.dtsi | 9 +
arch/arm/dts/armada-cp110-slave.dtsi | 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/armada-cp110-master.dtsi
b/arch/arm/dts/armada-cp110-master.dtsi
index e4c17e9f4b..cd5c974482 100644
--- a/arch/arm/dts/armada-cp110-master.dtsi
+++ b/arch/arm/dts/armada-cp110-master.dtsi
@@ -99,6 +99,15 @@
device-name = "cpm-mdio";
};
+ cpm_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cpm-xmdio";
+ };
+
cpm_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi
b/arch/arm/dts/armada-cp110-slave.dtsi
index 2fbd7b5514..b426a4eb69 100644
--- a/arch/arm/dts/armada-cp110-slave.dtsi
+++ b/arch/arm/dts/armada-cp110-slave.dtsi
@@ -99,6 +99,15 @@
device-name = "cps-mdio";
};
+ cps_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cps-xmdio";
+ };
+
cps_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
--
2.21.0
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[U-Boot] [PATCH v4 0/5] Switch MVPP2 to use new MVMDIO
From: Nevo Hed This patchset includes a couple of commits form Marvell's downstream repo and a change to replace mvpp2's SMI implementation with the new MVMDIO driver. The mvpp2 change is based partially on Ken Ma's mods against an earlier (his) version of MVMDIO that never made it to upstream and has since been re-implemented by Alex Marginean and seems to be in line for inclusion [1]. Puicked a few other mvpp2 patches from the afformentioned Marvell repo as they seemed important yet missing from upstream. Changes since v3: - Squashed the NULL dereference fix - Fixed multi-line comment format - Squashed the two mvpp2.c changes to use MVMDIO tinto a single one that can stand on its own. Changes since v2: - Removed `Reviewed-on` lines from Marvell commits, they are meaningless in upstream U-Boot - Commit messages rewording - Split out Kconfig (select of MVMDIO & DM_MDIO by MVPP2) - reworded heading on dtsi change to match last commit (due to noticing no delegates weere listed on patchworks) Changes since v1: - removes a redaundant fixed-link patch [1] https://patchwork.ozlabs.org/cover/1136769/ Grzegorz Jaszczyk (1): net: mvpp2: mark phy as invalid in case of missing appropriate driver Nevo Hed (3): arm: dts: armada-cp110-*dtsi: add xmdio nodes net: mvpp2: use new MVMDIO driver net: mvpp2: MVPP2 now needs MVMDIO Stefan Chulski (1): net: mvpp2x: fix traffic stuck after PHY start error arch/arm/dts/armada-cp110-master.dtsi | 9 + arch/arm/dts/armada-cp110-slave.dtsi | 9 + drivers/net/Kconfig | 2 + drivers/net/mvpp2.c | 241 ++ 4 files changed, 73 insertions(+), 188 deletions(-) -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 2/5] net: mvpp2: mark phy as invalid in case of missing appropriate driver
From: Grzegorz Jaszczyk
If the phy doesn't match with any existing u-boot drivers, the phy
framework will connect it to the generic one which uid ==
0x. In this case, act as if the phy wouldn't be declared in
dts. Otherwise, in case of 3310 (for which the driver doesn't exist)
the link is marked as always down. Removing phy entry from dts in case
of 3310 is not a good option because it is required for the
phy_fw_down procedure.
This patch fixes the issue with the link always down on MCBIN board.
nhed: added NULL deref test.
Signed-off-by: Grzegorz Jaszczyk
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index f36c8236b1..4ba6f9be3e 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4501,6 +4501,29 @@ static void mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
if (!port->init || port->link == 0) {
phy_dev = phy_connect(port->bus, port->phyaddr, dev,
port->phy_interface);
+
+ /*
+* If the phy doesn't match with any existing u-boot drivers the
+* phy framework will connect it to generic one which
+* uid == 0x. In this case act as if the phy wouldn't be
+* declared in dts. Otherwise in case of 3310 (for which the
+* driver doesn't exist) the link will not be correctly
+* detected. Removing phy entry from dts in case of 3310 is not
+* an option because it is required for the phy_fw_down
+* procedure.
+*/
+ if (phy_dev &&
+ phy_dev->drv->uid == 0x) {/* Generic phy */
+ netdev_warn(port->dev,
+ "Marking phy as invalid, link will not be
checked\n");
+ /* set phy_addr to invalid value */
+ port->phyaddr = PHY_MAX_ADDR;
+ mvpp2_egress_enable(port);
+ mvpp2_ingress_enable(port);
+
+ return;
+ }
+
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
--
2.21.0
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[U-Boot] [PATCH v4 5/5] net: mvpp2: MVPP2 now needs MVMDIO
From: Nevo Hed Changes to mvpp2.c require the MVMDIO module which in turn uses DM_MDIO. Signed-off-by: Nevo Hed --- drivers/net/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5fd31b03cf..81f39d0928 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -297,6 +297,8 @@ config MVPP2 bool "Marvell Armada 375/7K/8K network interface support" depends on ARMADA_375 || ARMADA_8K select PHYLIB + select MVMDIO + select DM_MDIO help This driver supports the network interface units in the Marvell ARMADA 375, 7K and 8K SoCs. -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Fix sifive serial y-modem transfer. - Access CSRs using CSR numbers. - Update doc sifive-fu540 - Support big endian hosts and target. - Support SPL and OpenSBI (FW_DYNAMIC firmware) boot. https://travis-ci.org/rickchen36/u-boot-riscv/builds/570682542 Thanks Rick The following changes since commit feb5a02f869d5678190dfc915ef6c2781b4f7a6c: Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-08-10 17:57:58 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 30c150bae4e3a61f87a159579cd3784f4d64e79e: riscv: qemu: Fix kconfig build warning (2019-08-12 13:30:53 +0800) Anup Patel (1): doc: sifive-fu540: Update README to explicitly load DTB for Linux Bin Meng (3): riscv: Sync csr.h with Linux kernel v5.2 riscv: Access CSRs using CSR numbers riscv: qemu: Fix kconfig build warning Lukas Auer (10): fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL Makefile: support building SPL FIT images without device trees spl: fit: use U-Boot device tree when FIT image has no device tree riscv: add run mode configuration for SPL riscv: add SPL support riscv: support SPL stack and global data relocation riscv: add a generic FIT generator script riscv: set default FIT generator script and build target for SPL builds riscv: qemu: add SPL configuration doc: update QEMU RISC-V documentation Marcus Comstedt (2): riscv: tools: Fix prelink-riscv to work on big endian hosts riscv: tools: Add big endian target support to prelink-riscv Sagar Shrikant Kadam (1): riscv : serial: use rx watermark to indicate rx data is present Kconfig | 4 +- Makefile| 8 ++- arch/Kconfig| 6 ++ arch/riscv/Kconfig | 36 -- arch/riscv/cpu/ax25/Kconfig | 6 +- arch/riscv/cpu/cpu.c| 15 ++--- arch/riscv/cpu/generic/Kconfig | 5 +- arch/riscv/cpu/start.S | 65 -- arch/riscv/cpu/u-boot-spl.lds | 82 +++ arch/riscv/include/asm/asm.h| 68 +++ arch/riscv/include/asm/csr.h| 74 - arch/riscv/include/asm/encoding.h | 240 +- arch/riscv/include/asm/spl.h| 31 + arch/riscv/lib/Makefile | 8 ++- arch/riscv/lib/mkimage_fit_opensbi.sh | 100 arch/riscv/lib/spl.c| 48 ++ board/emulation/qemu-riscv/Kconfig | 11 board/emulation/qemu-riscv/MAINTAINERS | 2 + board/emulation/qemu-riscv/qemu-riscv.c | 17 + common/spl/spl.c| 2 +- common/spl/spl_fit.c| 37 +++ configs/qemu-riscv32_spl_defconfig | 11 configs/qemu-riscv64_spl_defconfig | 12 doc/board/emulation/qemu-riscv.rst | 60 - doc/board/sifive/fu540.rst | 396 + drivers/serial/serial_sifive.c | 23 ++- include/configs/qemu-riscv.h| 14 include/fdtdec.h| 2 +- lib/fdtdec.c| 6 +- tools/prelink-riscv.c | 39 --- tools/prelink-riscv.inc | 60 + 31 files changed, 962 insertions(+), 526 deletions(-) create mode 100644 arch/riscv/cpu/u-boot-spl.lds create mode 100644 arch/riscv/include/asm/asm.h create mode 100644 arch/riscv/include/asm/spl.h create mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh create mode 100644 arch/riscv/lib/spl.c create mode 100644 configs/qemu-riscv32_spl_defconfig create mode 100644 configs/qemu-riscv64_spl_defconfig ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/7] net: mvpp2x: fix traffic stuck after PHY start error
From: Stefan Chulski
Issue:
- Network stuck if autonegotion fails.
Issue root cause:
- When autonegotiation fails during port open procedure, the packet
processor configuration does not finish and open procedure exits
with error.
- However, this doesn't prevent u-boot network framework from
calling send and receive procedures.
- Using transmit and receive functions of misconfigured packet
processor will cause traffic to get stuck.
Fix:
- Continue packet processor configuration even if autonegotiation
fails. Only error message is triggered in this case.
- Exit transmit and receive functions if there is no PHY link
indication.
- U-boot network framework now calls open procedure again during next
transmit initiation.
Signed-off-by: Stefan Chulski
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
---
drivers/net/mvpp2.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index bd89725e77..f36c8236b1 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,7 @@ static void mvpp2_stop_dev(struct mvpp2_port *port)
gop_port_enable(port, 0);
}
-static int mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
+static void mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
{
struct phy_device *phy_dev;
@@ -4504,7 +4504,7 @@ static int mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
- return -ENODEV;
+ return;
}
phy_dev->supported &= PHY_GBIT_FEATURES;
phy_dev->advertising = phy_dev->supported;
@@ -4516,18 +4516,14 @@ static int mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
phy_config(phy_dev);
phy_startup(phy_dev);
- if (!phy_dev->link) {
+ if (!phy_dev->link)
printf("%s: No link\n", phy_dev->dev->name);
- return -1;
- }
-
- port->init = 1;
+ else
+ port->init = 1;
} else {
mvpp2_egress_enable(port);
mvpp2_ingress_enable(port);
}
-
- return 0;
}
static int mvpp2_open(struct udevice *dev, struct mvpp2_port *port)
@@ -4567,10 +4563,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
}
if (port->phy_node) {
- err = mvpp2_phy_connect(dev, port);
- if (err < 0)
- return err;
-
+ mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
mvpp2_egress_enable(port);
@@ -5175,6 +5168,10 @@ static int mvpp2_recv(struct udevice *dev, int flags,
uchar **packetp)
struct mvpp2_rx_queue *rxq;
u8 *data;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
/* Process RX packets */
rxq = port->rxqs[0];
@@ -5240,6 +5237,10 @@ static int mvpp2_send(struct udevice *dev, void *packet,
int length)
int tx_done;
int timeout;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
txq = port->txqs[0];
aggr_txq = >priv->aggr_txqs[smp_processor_id()];
--
2.21.0
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[U-Boot] [PATCH v3 0/7] Switch MVPP2 to use new MVMDIO
From: Nevo Hed This patchset includes several commits form Marvell's downstream repo including Ken Ma's patch to replace the SMI implementation with his own Marvell MDIO impolementation. That MVMDIO implementation never made it to upstream and has since been re-implemented by Alex Marginean and seems to be in line for inclusion [1]. My last patch in this set modified Ken's mvpp2 patch to use this new MVMDIO implementation. Few other mvpp2 patches picked as they seemed important yet missing from upstream. Changes since v2: - Removed `Reviewed-on` lines from Marvell commits, they are meaningless in upstream U-Boot - Commit messages rewording - Split out Kconfig (select of MVMDIO & DM_MDIO by MVPP2) - reworded heading on dtsi change to match last commit (due to noticing no delegates weere listed on patchworks) Changes since v1: - removes a redaundant fixed-link patch [1] https://patchwork.ozlabs.org/cover/1136769/ Grzegorz Jaszczyk (1): net: mvpp2: mark phy as invalid in case of missing appropriate driver Ken Ma (1): net: mvpp2: Replace SMI implementation with marvell MDIO API Nevo Hed (4): net: mvpp2: no deref null arm: dts: armada-cp110-*dtsi: add xmdio nodes net: mvpp2: use new MVMDIO driver net: mvpp2: MVPP2 now needs MVMDIO Stefan Chulski (1): net: mvpp2x: fix traffic stuck after PHY start error arch/arm/dts/armada-cp110-master.dtsi | 9 + arch/arm/dts/armada-cp110-slave.dtsi | 9 + drivers/net/Kconfig | 2 + drivers/net/mvpp2.c | 240 ++ 4 files changed, 72 insertions(+), 188 deletions(-) -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 4/7] net: mvpp2: no deref null
From: Nevo Hed
phy_dev ptr is set from return of phy_connect() and is used before
test to see if NULL. Obviously since the test already sxists someone
made the determination that this NULL is possible.
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index fae7090121..5f908113f2 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
* an option because it is required for the phy_fw_down
* procedure.
*/
- if (phy_dev->drv->uid == 0x) {/* Generic phy */
+ if (phy_dev &&
+ phy_dev->drv->uid == 0x) {/* Generic phy */
netdev_warn(port->dev,
"Marking phy as invalid, link will not be
checked\n");
/* set phy_addr to invalid value */
--
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[U-Boot] [PATCH v3 5/7] arm: dts: armada-cp110-*dtsi: add xmdio nodes
From: Nevo Hed
Based on upstream-linux
See https://github.com/torvalds/linux/commit/f66b2aff.
However made the XSMI register window 0x16 (22) bytes per my reading
of the functional spec. Similar commits in Marvels own repo bump it
to 0x200 (512) bytes but I did not see the reasoning for that.
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4.
Also added device-name attributes to prevent ambiguity in the `mdio`
command.
Signed-off-by: Nevo Hed
---
arch/arm/dts/armada-cp110-master.dtsi | 9 +
arch/arm/dts/armada-cp110-slave.dtsi | 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/armada-cp110-master.dtsi
b/arch/arm/dts/armada-cp110-master.dtsi
index e4c17e9f4b..cd5c974482 100644
--- a/arch/arm/dts/armada-cp110-master.dtsi
+++ b/arch/arm/dts/armada-cp110-master.dtsi
@@ -99,6 +99,15 @@
device-name = "cpm-mdio";
};
+ cpm_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cpm-xmdio";
+ };
+
cpm_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi
b/arch/arm/dts/armada-cp110-slave.dtsi
index 2fbd7b5514..b426a4eb69 100644
--- a/arch/arm/dts/armada-cp110-slave.dtsi
+++ b/arch/arm/dts/armada-cp110-slave.dtsi
@@ -99,6 +99,15 @@
device-name = "cps-mdio";
};
+ cps_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cps-xmdio";
+ };
+
cps_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
--
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[U-Boot] [PATCH v3 6/7] net: mvpp2: use new MVMDIO driver
From: Nevo Hed
An earlier commit in this changeset is taken from Marvells repos but
was based on an MVMDIO implementation that never made it into U-Boot.
With this patch the mvpp2 driver switches to use the new MVMDIO driver
that is based on a more universal mdio-uclass implementation.
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 45 ++---
1 file changed, 10 insertions(+), 35 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 5f908113f2..de1b8fce84 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,7 +32,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -936,7 +936,6 @@ struct mvpp2_port {
/* Per-port registers' base address */
void __iomem *base;
- void __iomem *mdio_base;
struct mvpp2_rx_queue **rxqs;
struct mvpp2_tx_queue **txqs;
@@ -958,7 +957,7 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
int phyaddr;
- struct mii_dev *bus;
+ struct udevice *mdio_dev;
#ifdef CONFIG_DM_GPIO
struct gpio_desc phy_reset_gpio;
struct gpio_desc phy_tx_disable_gpio;
@@ -4482,8 +4481,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
struct phy_device *phy_dev;
if (!port->init || port->link == 0) {
- phy_dev = phy_connect(port->bus, port->phyaddr, dev,
- port->phy_interface);
+ phy_dev = dm_mdio_phy_connect(port->mdio_dev, port->phyaddr,
+ dev, port->phy_interface);
/* If the phy doesn't match with any existing u-boot drivers the
* phy framework will connect it to generic one which
@@ -4708,24 +4707,18 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
int phy_mode = -1;
int ret;
- /* Default mdio_base from the same eth base */
- if (port->priv->hw_version == MVPP21)
- port->mdio_base = port->priv->lms_base + MVPP21_SMI;
- else
- port->mdio_base = port->priv->iface_base + MVPP22_SMI;
-
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
if (phy_node > 0) {
- ofnode phy_ofnode;
- fdt_addr_t phy_base;
-
+ int parent;
phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
if (phyaddr < 0) {
dev_err(>dev, "could not find phy address\n");
return -1;
}
- ret = mdio_mii_bus_get_from_phy(phy_node, >bus);
+ parent = fdt_parent_offset(gd->fdt_blob, phy_node);
+ ret = uclass_get_device_by_of_offset(UCLASS_MDIO, parent,
+>mdio_dev);
if (ret)
return ret;
} else {
@@ -5044,7 +5037,7 @@ static int mvpp2_init(struct udevice *dev, struct mvpp2
*priv)
return 0;
}
-int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
+static int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct mvpp2_port *port = dev_get_priv(dev);
struct mvpp2_rx_desc *rx_desc;
@@ -5309,31 +5302,13 @@ static int mvpp2_probe(struct udevice *dev)
{
struct mvpp2_port *port = dev_get_priv(dev);
struct mvpp2 *priv = dev_get_priv(dev->parent);
- struct mii_dev *bus;
int err;
/* Only call the probe function for the parent once */
if (!priv->probe_done)
err = mvpp2_base_probe(dev->parent);
- port->priv = dev_get_priv(dev->parent);
-
- /* Create and register the MDIO bus driver */
- bus = mdio_alloc();
- if (!bus) {
- printf("Failed to allocate MDIO bus\n");
- return -ENOMEM;
- }
-
- bus->read = mpp2_mdio_read;
- bus->write = mpp2_mdio_write;
- snprintf(bus->name, sizeof(bus->name), dev->name);
- bus->priv = (void *)port;
- port->bus = bus;
-
- err = mdio_register(bus);
- if (err)
- return err;
+ port->priv = priv;
err = phy_info_parse(dev, port);
if (err)
--
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[U-Boot] [PATCH v3 3/7] net: mvpp2: mark phy as invalid in case of missing appropriate driver
From: Grzegorz Jaszczyk
If the phy doesn't match with any existing u-boot drivers, the phy
framework will connect it to the generic one which uid ==
0x. In this case, act as if the phy wouldn't be declared in
dts. Otherwise, in case of 3310 (for which the driver doesn't exist)
the link is marked as always down. Removing phy entry from dts in case
of 3310 is not a good option because it is required for the
phy_fw_down procedure.
This patch fixes the issue with the link always down on MCBIN board.
Signed-off-by: Grzegorz Jaszczyk
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
---
drivers/net/mvpp2.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index b6dfed5c54..fae7090121 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4484,6 +4484,27 @@ static void mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
if (!port->init || port->link == 0) {
phy_dev = phy_connect(port->bus, port->phyaddr, dev,
port->phy_interface);
+
+ /* If the phy doesn't match with any existing u-boot drivers the
+* phy framework will connect it to generic one which
+* uid == 0x. In this case act as if the phy wouldn't be
+* declared in dts. Otherwise in case of 3310 (for which the
+* driver doesn't exist) the link will not be correctly
+* detected. Removing phy entry from dts in case of 3310 is not
+* an option because it is required for the phy_fw_down
+* procedure.
+*/
+ if (phy_dev->drv->uid == 0x) {/* Generic phy */
+ netdev_warn(port->dev,
+ "Marking phy as invalid, link will not be
checked\n");
+ /* set phy_addr to invalid value */
+ port->phyaddr = PHY_MAX_ADDR;
+ mvpp2_egress_enable(port);
+ mvpp2_ingress_enable(port);
+
+ return;
+ }
+
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
--
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[U-Boot] [PATCH v3 2/7] net: mvpp2: Replace SMI implementation with marvell MDIO API
From: Ken Ma
The availability of the marvell MDIO driver enables us to eliminate
the SMI function implementation within the mvpp2 driver.
This replacement also fixes 2 old issues:
1. Each pp2 port device now has its own mdio bus field member since
some pp2 ports may use SMI mdio bus while some other pp2 ports may
use XSMI mdio bus, but the old mvpp2_base device has a shared bus
for all its pp2 ports; this patch moves mdio bus field member from
struct mvpp2 to struct mvpp2_port;
2. Old code uses mvpp2_base device name as mdio bus name; but for
Armada80x0, cp0 ethernet device and cp1 ethernet device have the
same device name - "ethernet@0"; and because mdio_register() checks
unique name, then the second probed mvpp2_base device fails to
register mdio bus; since new marvell MDIO driver has resolved the
unique name issue - different mdio names can be set in fdt and if a
mdio name is not set, the default mdio name is generated from the
mdio bus base address, so this issue is fixed by this replacement.
Signed-off-by: Ken Ma
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 158
1 file changed, 12 insertions(+), 146 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index f36c8236b1..b6dfed5c54 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -62,8 +63,6 @@ do {
\
#define MTU1500
#define RX_BUFFER_SIZE (ALIGN(MTU + WRAP, ARCH_DMA_MINALIGN))
-#define MVPP2_SMI_TIMEOUT 1
-
/* RX Fifo Registers */
#define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
#define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
@@ -490,23 +489,8 @@ do {
\
#define MVPP2_QUEUE_NEXT_DESC(q, index) \
(((index) < (q)->last_desc) ? ((index) + 1) : 0)
-/* SMI: 0xc0054 -> offset 0x54 to lms_base */
-#define MVPP21_SMI 0x0054
/* PP2.2: SMI: 0x12a200 -> offset 0x1200 to iface_base */
#define MVPP22_SMI 0x1200
-#define MVPP2_PHY_REG_MASK 0x1f
-/* SMI register fields */
-#define MVPP2_SMI_DATA_OFFS0 /* Data */
-#define MVPP2_SMI_DATA_MASK(0x <<
MVPP2_SMI_DATA_OFFS)
-#define MVPP2_SMI_DEV_ADDR_OFFS16 /* PHY device address */
-#define MVPP2_SMI_REG_ADDR_OFFS21 /* PHY device reg addr*/
-#define MVPP2_SMI_OPCODE_OFFS 26 /* Write/Read opcode */
-#define MVPP2_SMI_OPCODE_READ (1 << MVPP2_SMI_OPCODE_OFFS)
-#define MVPP2_SMI_READ_VALID (1 << 27) /* Read Valid */
-#define MVPP2_SMI_BUSY (1 << 28) /* Busy */
-
-#define MVPP2_PHY_ADDR_MASK0x1f
-#define MVPP2_PHY_REG_MASK 0x1f
/* Additional PPv2.2 offsets */
#define MVPP22_MPCS0x007000
@@ -973,7 +957,6 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
- int phy_node;
int phyaddr;
struct mii_dev *bus;
#ifdef CONFIG_DM_GPIO
@@ -4562,7 +4545,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
return err;
}
- if (port->phy_node) {
+ if (port->phyaddr < PHY_MAX_ADDR) {
mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
@@ -4701,6 +4684,7 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
+ int ret;
/* Default mdio_base from the same eth base */
if (port->priv->hw_version == MVPP21)
@@ -4719,17 +4703,12 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
dev_err(>dev, "could not find phy address\n");
return -1;
}
-
- phy_ofnode = ofnode_get_parent(offset_to_ofnode(phy_node));
- phy_base = ofnode_get_addr(phy_ofnode);
- port->mdio_base = (void *)phy_base;
-
- if (port->mdio_base < 0) {
- dev_err(>dev, "could not find mdio base
address\n");
- return -1;
- }
+ ret = mdio_mii_bus_get_from_phy(phy_node, >bus);
+ if (ret)
+ return ret;
} else {
- phy_node = 0;
+ /* phy_addr is set to invalid value */
+ phyaddr = PHY_MAX_ADDR;
}
phy_mode_str = fdt_getprop(gd->fdt_blob,
[U-Boot] [PATCH v3 7/7] net: mvpp2: MVPP2 now needs MVMDIO
From: Nevo Hed Changes to mvpp2.c require the MVMDIO module which in turn uses DM_MDIO. Signed-off-by: Nevo Hed --- drivers/net/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5fd31b03cf..81f39d0928 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -297,6 +297,8 @@ config MVPP2 bool "Marvell Armada 375/7K/8K network interface support" depends on ARMADA_375 || ARMADA_8K select PHYLIB + select MVMDIO + select DM_MDIO help This driver supports the network interface units in the Marvell ARMADA 375, 7K and 8K SoCs. -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 6/6] net: mvpp2: use new MVMDIO driver
From: Nevo Hed
An eralier commit in this changeset is taken from Marvells repos but was
based on an MVMDIO implementation that never made it into U-Boot. With
this patch the mvpp2 driver switches to use the new MVMDIO driver that is
based on a more universal mdio-uclass implementation.
Signed-off-by: Nevo Hed
---
drivers/net/Kconfig | 1 +
drivers/net/mvpp2.c | 45 ++---
2 files changed, 11 insertions(+), 35 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index d8c4dd6f4d..81f39d0928 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -298,6 +298,7 @@ config MVPP2
depends on ARMADA_375 || ARMADA_8K
select PHYLIB
select MVMDIO
+ select DM_MDIO
help
This driver supports the network interface units in the
Marvell ARMADA 375, 7K and 8K SoCs.
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 5f908113f2..de1b8fce84 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,7 +32,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -936,7 +936,6 @@ struct mvpp2_port {
/* Per-port registers' base address */
void __iomem *base;
- void __iomem *mdio_base;
struct mvpp2_rx_queue **rxqs;
struct mvpp2_tx_queue **txqs;
@@ -958,7 +957,7 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
int phyaddr;
- struct mii_dev *bus;
+ struct udevice *mdio_dev;
#ifdef CONFIG_DM_GPIO
struct gpio_desc phy_reset_gpio;
struct gpio_desc phy_tx_disable_gpio;
@@ -4482,8 +4481,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
struct phy_device *phy_dev;
if (!port->init || port->link == 0) {
- phy_dev = phy_connect(port->bus, port->phyaddr, dev,
- port->phy_interface);
+ phy_dev = dm_mdio_phy_connect(port->mdio_dev, port->phyaddr,
+ dev, port->phy_interface);
/* If the phy doesn't match with any existing u-boot drivers the
* phy framework will connect it to generic one which
@@ -4708,24 +4707,18 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
int phy_mode = -1;
int ret;
- /* Default mdio_base from the same eth base */
- if (port->priv->hw_version == MVPP21)
- port->mdio_base = port->priv->lms_base + MVPP21_SMI;
- else
- port->mdio_base = port->priv->iface_base + MVPP22_SMI;
-
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
if (phy_node > 0) {
- ofnode phy_ofnode;
- fdt_addr_t phy_base;
-
+ int parent;
phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
if (phyaddr < 0) {
dev_err(>dev, "could not find phy address\n");
return -1;
}
- ret = mdio_mii_bus_get_from_phy(phy_node, >bus);
+ parent = fdt_parent_offset(gd->fdt_blob, phy_node);
+ ret = uclass_get_device_by_of_offset(UCLASS_MDIO, parent,
+>mdio_dev);
if (ret)
return ret;
} else {
@@ -5044,7 +5037,7 @@ static int mvpp2_init(struct udevice *dev, struct mvpp2
*priv)
return 0;
}
-int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
+static int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct mvpp2_port *port = dev_get_priv(dev);
struct mvpp2_rx_desc *rx_desc;
@@ -5309,31 +5302,13 @@ static int mvpp2_probe(struct udevice *dev)
{
struct mvpp2_port *port = dev_get_priv(dev);
struct mvpp2 *priv = dev_get_priv(dev->parent);
- struct mii_dev *bus;
int err;
/* Only call the probe function for the parent once */
if (!priv->probe_done)
err = mvpp2_base_probe(dev->parent);
- port->priv = dev_get_priv(dev->parent);
-
- /* Create and register the MDIO bus driver */
- bus = mdio_alloc();
- if (!bus) {
- printf("Failed to allocate MDIO bus\n");
- return -ENOMEM;
- }
-
- bus->read = mpp2_mdio_read;
- bus->write = mpp2_mdio_write;
- snprintf(bus->name, sizeof(bus->name), dev->name);
- bus->priv = (void *)port;
- port->bus = bus;
-
- err = mdio_register(bus);
- if (err)
- return err;
+ port->priv = priv;
err = phy_info_parse(dev, port);
if (err)
--
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[U-Boot] [PATCH v2 0/6] Switch MVPP2 to use new MVMDIO
From: Nevo Hed This patchset includes several commits form Marvell's downstream repo including Ken Ma's patch to replace the SMI implementation with his own Marvell MDIO impolementation. That MVMDIO implementation never made it to upstream and has since been re-implemented by Alex Marginean and seems to be in line for inclusion [1]. My last patch in this set modified Ken's mvpp2 patch to use this new MVMDIO implementation. Few other mvpp2 patches picked as they seemed important yet missing from upstream. v2 removes a redaundant fixed-link patch [1] https://patchwork.ozlabs.org/cover/1136769/ Grzegorz Jaszczyk (1): net: mvpp2: mark phy as invalid in case of missing appropriate driver Ken Ma (1): net: mvpp2: Replace SMI implementation with marvell MDIO API Nevo Hed (3): net: mvpp2: no deref null arm64: mvebu: armada-cp110-*dtsi: add xmdio nodes net: mvpp2: use new MVMDIO driver Stefan Chulski (1): net: mvpp2x: fix traffic stuck after PHY start error arch/arm/dts/armada-cp110-master.dtsi | 9 + arch/arm/dts/armada-cp110-slave.dtsi | 9 + drivers/net/Kconfig | 2 + drivers/net/mvpp2.c | 240 ++ 4 files changed, 72 insertions(+), 188 deletions(-) -- 2.21.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/6] net: mvpp2: Replace SMI implementation with marvell MDIO API
From: Ken Ma
Since marvell MDIO driver is added, SMI function implementation in
mvpp2 driver can be removed and NETA driver can use marvell MDIO API
directly.
This replacement also fixes 2 old issues:
1. Each pp2 port device should have its own mdio bus field member since
some pp2 ports may use SMI mdio bus while some other pp2 ports may
use XSMI mdio bus, but the old mvpp2_base device has a shared bus
for its all pp2 ports; this patch moves mdio bus field member from
struct mvpp2 to struct mvpp2_port;
2. Old code uses mvpp2_base device name as mdio bus name, but for
Armada80x0, cp0 ethernet device and cp1 ethernet device have the
same device name - "ethernet@0"; and because mdio_register() checks
unique name, then the second probed mvpp2_base device fails to
register mdio bus; since new marvell MDIO driver has resolved the
unique name issue - different mdio names can be set in fdt and if
a mdio name is not set, the default mdio name will be generated from
the mdio bus base address, so this issue is fixed by this
replacement.
Signed-off-by: Ken Ma
Reviewed-on: http://vgitil04.il.marvell.com:8080/55404
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
Signed-off-by: Nevo Hed
---
drivers/net/Kconfig | 1 +
drivers/net/mvpp2.c | 158
2 files changed, 13 insertions(+), 146 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5fd31b03cf..d8c4dd6f4d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -297,6 +297,7 @@ config MVPP2
bool "Marvell Armada 375/7K/8K network interface support"
depends on ARMADA_375 || ARMADA_8K
select PHYLIB
+ select MVMDIO
help
This driver supports the network interface units in the
Marvell ARMADA 375, 7K and 8K SoCs.
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index f36c8236b1..b6dfed5c54 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -62,8 +63,6 @@ do {
\
#define MTU1500
#define RX_BUFFER_SIZE (ALIGN(MTU + WRAP, ARCH_DMA_MINALIGN))
-#define MVPP2_SMI_TIMEOUT 1
-
/* RX Fifo Registers */
#define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
#define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
@@ -490,23 +489,8 @@ do {
\
#define MVPP2_QUEUE_NEXT_DESC(q, index) \
(((index) < (q)->last_desc) ? ((index) + 1) : 0)
-/* SMI: 0xc0054 -> offset 0x54 to lms_base */
-#define MVPP21_SMI 0x0054
/* PP2.2: SMI: 0x12a200 -> offset 0x1200 to iface_base */
#define MVPP22_SMI 0x1200
-#define MVPP2_PHY_REG_MASK 0x1f
-/* SMI register fields */
-#define MVPP2_SMI_DATA_OFFS0 /* Data */
-#define MVPP2_SMI_DATA_MASK(0x <<
MVPP2_SMI_DATA_OFFS)
-#define MVPP2_SMI_DEV_ADDR_OFFS16 /* PHY device address */
-#define MVPP2_SMI_REG_ADDR_OFFS21 /* PHY device reg addr*/
-#define MVPP2_SMI_OPCODE_OFFS 26 /* Write/Read opcode */
-#define MVPP2_SMI_OPCODE_READ (1 << MVPP2_SMI_OPCODE_OFFS)
-#define MVPP2_SMI_READ_VALID (1 << 27) /* Read Valid */
-#define MVPP2_SMI_BUSY (1 << 28) /* Busy */
-
-#define MVPP2_PHY_ADDR_MASK0x1f
-#define MVPP2_PHY_REG_MASK 0x1f
/* Additional PPv2.2 offsets */
#define MVPP22_MPCS0x007000
@@ -973,7 +957,6 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
- int phy_node;
int phyaddr;
struct mii_dev *bus;
#ifdef CONFIG_DM_GPIO
@@ -4562,7 +4545,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
return err;
}
- if (port->phy_node) {
+ if (port->phyaddr < PHY_MAX_ADDR) {
mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
@@ -4701,6 +4684,7 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
+ int ret;
/* Default mdio_base from the same eth base */
if (port->priv->hw_version == MVPP21)
@@ -4719,17 +4703,12 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
dev_err(>dev, "could not find phy address\n");
return -1;
}
-
- phy_ofnode = ofnode_get_parent(offset_to_ofnode(phy_node));
- phy_base =
[U-Boot] [PATCH v2 3/6] net: mvpp2: mark phy as invalid in case of missing appropriate driver
From: Grzegorz Jaszczyk
If the phy doesn't match with any existing u-boot drivers the phy
framework will connect it to generic one which uid == 0x. In
this case act as if the phy wouldn't be declared in dts. Otherwise in
case of 3310 (for which the driver doesn't exist) the link will be
marked as always down. Removing phy entry from dts in case of 3310 is
not good option because it is required for the phy_fw_down procedure.
This patch fixes the issue with the link always down on MCBIN board.
Signed-off-by: Grzegorz Jaszczyk
Reviewed-on: http://vgitil04.il.marvell.com:8080/58907
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
---
drivers/net/mvpp2.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index b6dfed5c54..fae7090121 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4484,6 +4484,27 @@ static void mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
if (!port->init || port->link == 0) {
phy_dev = phy_connect(port->bus, port->phyaddr, dev,
port->phy_interface);
+
+ /* If the phy doesn't match with any existing u-boot drivers the
+* phy framework will connect it to generic one which
+* uid == 0x. In this case act as if the phy wouldn't be
+* declared in dts. Otherwise in case of 3310 (for which the
+* driver doesn't exist) the link will not be correctly
+* detected. Removing phy entry from dts in case of 3310 is not
+* an option because it is required for the phy_fw_down
+* procedure.
+*/
+ if (phy_dev->drv->uid == 0x) {/* Generic phy */
+ netdev_warn(port->dev,
+ "Marking phy as invalid, link will not be
checked\n");
+ /* set phy_addr to invalid value */
+ port->phyaddr = PHY_MAX_ADDR;
+ mvpp2_egress_enable(port);
+ mvpp2_ingress_enable(port);
+
+ return;
+ }
+
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
--
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[U-Boot] [PATCH v2 4/6] net: mvpp2: no deref null
From: Nevo Hed
phy_dev ptr is set from return of phy_connect() and is used before
test to see if NULL. Obviously since the test already sxists someoen
made the determination that this NULL is possible.
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index fae7090121..5f908113f2 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
* an option because it is required for the phy_fw_down
* procedure.
*/
- if (phy_dev->drv->uid == 0x) {/* Generic phy */
+ if (phy_dev &&
+ phy_dev->drv->uid == 0x) {/* Generic phy */
netdev_warn(port->dev,
"Marking phy as invalid, link will not be
checked\n");
/* set phy_addr to invalid value */
--
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[U-Boot] [PATCH v2 5/6] arm64: mvebu: armada-cp110-*dtsi: add xmdio nodes
From: Nevo Hed
Based on upstream-linux
See https://github.com/torvalds/linux/commit/f66b2aff.
However made the XSMI register window 0x16 (22) bytes per my reading
of the functional spec. Similar commits in Marvels own repo bump it
to 0x200 (512) bytes but I did not see the reasoning for that.
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4.
Also added device-name attributes to prevent ambiguity in the `mdio`
command.
Signed-off-by: Nevo Hed
---
arch/arm/dts/armada-cp110-master.dtsi | 9 +
arch/arm/dts/armada-cp110-slave.dtsi | 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/armada-cp110-master.dtsi
b/arch/arm/dts/armada-cp110-master.dtsi
index e4c17e9f4b..cd5c974482 100644
--- a/arch/arm/dts/armada-cp110-master.dtsi
+++ b/arch/arm/dts/armada-cp110-master.dtsi
@@ -99,6 +99,15 @@
device-name = "cpm-mdio";
};
+ cpm_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cpm-xmdio";
+ };
+
cpm_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi
b/arch/arm/dts/armada-cp110-slave.dtsi
index 2fbd7b5514..b426a4eb69 100644
--- a/arch/arm/dts/armada-cp110-slave.dtsi
+++ b/arch/arm/dts/armada-cp110-slave.dtsi
@@ -99,6 +99,15 @@
device-name = "cps-mdio";
};
+ cps_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cps-xmdio";
+ };
+
cps_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
--
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[U-Boot] [PATCH v2 1/6] net: mvpp2x: fix traffic stuck after PHY start error
From: Stefan Chulski
Issue:
- Network stuck if autonegotion fails
Issue root cause:
- During port open procedure if autonegotion fails, configuration of
packet processor won't be finished and open procedure exits with error.
- However this won't prevent u-boot network framework from
calling send and receive procedures.
- Using of transmit and receive function of not configured properly
packet processor will cause traffic stuck.
Fix:
- Don't stop packet processor configuration if autonegotion failed.
Only error message would be triggered.
- Exit transmit and receive function if there are no PHY link
indication.
- U-boot network framework would call open procedure during next
transmit initiation.
Signed-off-by: Stefan Chulski
Reviewed-on: http://vgitil04.il.marvell.com:8080/55398
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
---
drivers/net/mvpp2.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index bd89725e77..f36c8236b1 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,7 @@ static void mvpp2_stop_dev(struct mvpp2_port *port)
gop_port_enable(port, 0);
}
-static int mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
+static void mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
{
struct phy_device *phy_dev;
@@ -4504,7 +4504,7 @@ static int mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
- return -ENODEV;
+ return;
}
phy_dev->supported &= PHY_GBIT_FEATURES;
phy_dev->advertising = phy_dev->supported;
@@ -4516,18 +4516,14 @@ static int mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
phy_config(phy_dev);
phy_startup(phy_dev);
- if (!phy_dev->link) {
+ if (!phy_dev->link)
printf("%s: No link\n", phy_dev->dev->name);
- return -1;
- }
-
- port->init = 1;
+ else
+ port->init = 1;
} else {
mvpp2_egress_enable(port);
mvpp2_ingress_enable(port);
}
-
- return 0;
}
static int mvpp2_open(struct udevice *dev, struct mvpp2_port *port)
@@ -4567,10 +4563,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
}
if (port->phy_node) {
- err = mvpp2_phy_connect(dev, port);
- if (err < 0)
- return err;
-
+ mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
mvpp2_egress_enable(port);
@@ -5175,6 +5168,10 @@ static int mvpp2_recv(struct udevice *dev, int flags,
uchar **packetp)
struct mvpp2_rx_queue *rxq;
u8 *data;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
/* Process RX packets */
rxq = port->rxqs[0];
@@ -5240,6 +5237,10 @@ static int mvpp2_send(struct udevice *dev, void *packet,
int length)
int tx_done;
int timeout;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
txq = port->txqs[0];
aggr_txq = >priv->aggr_txqs[smp_processor_id()];
--
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[U-Boot] [PATCH 3/7] net: mvpp2: mark phy as invalid in case of missing appropriate driver
From: Grzegorz Jaszczyk
If the phy doesn't match with any existing u-boot drivers the phy
framework will connect it to generic one which uid == 0x. In
this case act as if the phy wouldn't be declared in dts. Otherwise in
case of 3310 (for which the driver doesn't exist) the link will be
marked as always down. Removing phy entry from dts in case of 3310 is
not good option because it is required for the phy_fw_down procedure.
This patch fixes the issue with the link always down on MCBIN board.
Signed-off-by: Grzegorz Jaszczyk
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index b6dfed5c54..fae7090121 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4484,6 +4484,27 @@ static void mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
if (!port->init || port->link == 0) {
phy_dev = phy_connect(port->bus, port->phyaddr, dev,
port->phy_interface);
+
+ /* If the phy doesn't match with any existing u-boot drivers the
+* phy framework will connect it to generic one which
+* uid == 0x. In this case act as if the phy wouldn't be
+* declared in dts. Otherwise in case of 3310 (for which the
+* driver doesn't exist) the link will not be correctly
+* detected. Removing phy entry from dts in case of 3310 is not
+* an option because it is required for the phy_fw_down
+* procedure.
+*/
+ if (phy_dev->drv->uid == 0x) {/* Generic phy */
+ netdev_warn(port->dev,
+ "Marking phy as invalid, link will not be
checked\n");
+ /* set phy_addr to invalid value */
+ port->phyaddr = PHY_MAX_ADDR;
+ mvpp2_egress_enable(port);
+ mvpp2_ingress_enable(port);
+
+ return;
+ }
+
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
--
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[U-Boot] [PATCH 6/7] arm64: mvebu: armada-cp110-*dtsi: add xmdio nodes
From: Nevo Hed
Based on upstream-linux
See https://github.com/torvalds/linux/commit/f66b2aff.
However made the XSMI register window 0x16 (22) bytes per my reading
of the functional spec. Similar commits in Marvels own repo bump it
to 0x200 (512) bytes but I did not see the reasoning for that.
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4.
Also added device-name attributes to prevent ambiguity in the `mdio`
command.
Signed-off-by: Nevo Hed
---
arch/arm/dts/armada-cp110-master.dtsi | 9 +
arch/arm/dts/armada-cp110-slave.dtsi | 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/armada-cp110-master.dtsi
b/arch/arm/dts/armada-cp110-master.dtsi
index e4c17e9f4b..cd5c974482 100644
--- a/arch/arm/dts/armada-cp110-master.dtsi
+++ b/arch/arm/dts/armada-cp110-master.dtsi
@@ -99,6 +99,15 @@
device-name = "cpm-mdio";
};
+ cpm_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cpm-xmdio";
+ };
+
cpm_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi
b/arch/arm/dts/armada-cp110-slave.dtsi
index 2fbd7b5514..b426a4eb69 100644
--- a/arch/arm/dts/armada-cp110-slave.dtsi
+++ b/arch/arm/dts/armada-cp110-slave.dtsi
@@ -99,6 +99,15 @@
device-name = "cps-mdio";
};
+ cps_xmdio: mdio@12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x16>;
+ status = "disabled";
+ device-name = "cps-xmdio";
+ };
+
cps_syscon0: system-controller@44 {
compatible = "marvell,cp110-system-controller0",
"syscon";
--
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[U-Boot] [PATCH 1/7] net: mvpp2x: fix traffic stuck after PHY start error
From: Stefan Chulski
Issue:
- Network stuck if autonegotion fails
Issue root cause:
- During port open procedure if autonegotion fails, configuration of
packet processor won't be finished and open procedure exits with error.
- However this won't prevent u-boot network framework from
calling send and receive procedures.
- Using of transmit and receive function of not configured properly
packet processor will cause traffic stuck.
Fix:
- Don't stop packet processor configuration if autonegotion failed.
Only error message would be triggered.
- Exit transmit and receive function if there are no PHY link
indication.
- U-boot network framework would call open procedure during next
transmit initiation.
Signed-off-by: Stefan Chulski
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index bd89725e77..f36c8236b1 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,7 @@ static void mvpp2_stop_dev(struct mvpp2_port *port)
gop_port_enable(port, 0);
}
-static int mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
+static void mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
{
struct phy_device *phy_dev;
@@ -4504,7 +4504,7 @@ static int mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
port->phy_dev = phy_dev;
if (!phy_dev) {
netdev_err(port->dev, "cannot connect to phy\n");
- return -ENODEV;
+ return;
}
phy_dev->supported &= PHY_GBIT_FEATURES;
phy_dev->advertising = phy_dev->supported;
@@ -4516,18 +4516,14 @@ static int mvpp2_phy_connect(struct udevice *dev,
struct mvpp2_port *port)
phy_config(phy_dev);
phy_startup(phy_dev);
- if (!phy_dev->link) {
+ if (!phy_dev->link)
printf("%s: No link\n", phy_dev->dev->name);
- return -1;
- }
-
- port->init = 1;
+ else
+ port->init = 1;
} else {
mvpp2_egress_enable(port);
mvpp2_ingress_enable(port);
}
-
- return 0;
}
static int mvpp2_open(struct udevice *dev, struct mvpp2_port *port)
@@ -4567,10 +4563,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
}
if (port->phy_node) {
- err = mvpp2_phy_connect(dev, port);
- if (err < 0)
- return err;
-
+ mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
mvpp2_egress_enable(port);
@@ -5175,6 +5168,10 @@ static int mvpp2_recv(struct udevice *dev, int flags,
uchar **packetp)
struct mvpp2_rx_queue *rxq;
u8 *data;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
/* Process RX packets */
rxq = port->rxqs[0];
@@ -5240,6 +5237,10 @@ static int mvpp2_send(struct udevice *dev, void *packet,
int length)
int tx_done;
int timeout;
+ if (port->phy_node)
+ if (!port->phy_dev->link)
+ return 0;
+
txq = port->txqs[0];
aggr_txq = >priv->aggr_txqs[smp_processor_id()];
--
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[U-Boot] [PATCH 7/7] net: mvpp2: use new MVMDIO driver
From: Nevo Hed
An eralier commit in this changeset is taken from Marvells repos but was
based on an MVMDIO implementation that never made it into U-Boot. With
this patch the mvpp2 driver switches to use the new MVMDIO driver that is
based on a more universal mdio-uclass implementation.
Signed-off-by: Nevo Hed
---
drivers/net/Kconfig | 1 +
drivers/net/mvpp2.c | 42 ++
2 files changed, 11 insertions(+), 32 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index d8c4dd6f4d..81f39d0928 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -298,6 +298,7 @@ config MVPP2
depends on ARMADA_375 || ARMADA_8K
select PHYLIB
select MVMDIO
+ select DM_MDIO
help
This driver supports the network interface units in the
Marvell ARMADA 375, 7K and 8K SoCs.
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index da550450eb..8091a411a4 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,7 +32,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -936,7 +936,6 @@ struct mvpp2_port {
/* Per-port registers' base address */
void __iomem *base;
- void __iomem *mdio_base;
struct mvpp2_rx_queue **rxqs;
struct mvpp2_tx_queue **txqs;
@@ -958,7 +957,7 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
int phyaddr;
- struct mii_dev *bus;
+ struct udevice *mdio_dev;
#ifdef CONFIG_DM_GPIO
struct gpio_desc phy_reset_gpio;
struct gpio_desc phy_tx_disable_gpio;
@@ -4482,8 +4481,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
struct phy_device *phy_dev;
if (!port->init || port->link == 0) {
- phy_dev = phy_connect(port->bus, port->phyaddr, dev,
- port->phy_interface);
+ phy_dev = dm_mdio_phy_connect(port->mdio_dev, port->phyaddr,
+ dev, port->phy_interface);
/* If the phy doesn't match with any existing u-boot drivers the
* phy framework will connect it to generic one which
@@ -4709,16 +4708,11 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
int ret;
int fixed_link = 0;
- /* Default mdio_base from the same eth base */
- if (port->priv->hw_version == MVPP21)
- port->mdio_base = port->priv->lms_base + MVPP21_SMI;
- else
- port->mdio_base = port->priv->iface_base + MVPP22_SMI;
-
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
fixed_link = fdt_subnode_offset(gd->fdt_blob, port_node, "fixed-link");
if (phy_node > 0) {
+ int parent;
if (fixed_link != -FDT_ERR_NOTFOUND) {
/* phy_addr is set to invalid value for fixed links */
phyaddr = PHY_MAX_ADDR;
@@ -4727,7 +4721,9 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
"reg", 0);
}
- ret = mdio_mii_bus_get_from_phy(phy_node, >bus);
+ parent = fdt_parent_offset(gd->fdt_blob, phy_node);
+ ret = uclass_get_device_by_of_offset(UCLASS_MDIO, parent,
+>mdio_dev);
if (ret)
return ret;
} else {
@@ -5046,7 +5042,7 @@ static int mvpp2_init(struct udevice *dev, struct mvpp2
*priv)
return 0;
}
-int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
+static int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct mvpp2_port *port = dev_get_priv(dev);
struct mvpp2_rx_desc *rx_desc;
@@ -5311,31 +5307,13 @@ static int mvpp2_probe(struct udevice *dev)
{
struct mvpp2_port *port = dev_get_priv(dev);
struct mvpp2 *priv = dev_get_priv(dev->parent);
- struct mii_dev *bus;
int err;
/* Only call the probe function for the parent once */
if (!priv->probe_done)
err = mvpp2_base_probe(dev->parent);
- port->priv = dev_get_priv(dev->parent);
-
- /* Create and register the MDIO bus driver */
- bus = mdio_alloc();
- if (!bus) {
- printf("Failed to allocate MDIO bus\n");
- return -ENOMEM;
- }
-
- bus->read = mpp2_mdio_read;
- bus->write = mpp2_mdio_write;
- snprintf(bus->name, sizeof(bus->name), dev->name);
- bus->priv = (void *)port;
- port->bus = bus;
-
- err = mdio_register(bus);
- if (err)
- return err;
+ port->priv = priv;
err = phy_info_parse(dev, port);
if (err)
--
2.21.0
___
U-Boot
[U-Boot] Switch MVPP2 to use new MVMDIO
This patchset includes several commits form Marvell's downstream repo including Ken Ma's patch to replace the SMI implementation with his own Marvell MDIO impolementation. That MVMDIO implementation never made it to upstream and has since been re-implemented by Alex Marginean and seems to be in line for inclusion [1]. My last patch in this set modified Ken's mvpp2 patch to use this new MVMDIO implementation. Few other mvpp2 patches picked as they seemed important yet missing from upstream. [1] https://patchwork.ozlabs.org/cover/1136769/ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/7] net: mvpp2: Replace SMI implementation with marvell MDIO API
From: Ken Ma
Since marvell MDIO driver is added, SMI function implementation in
mvpp2 driver can be removed and NETA driver can use marvell MDIO API
directly.
This replacement also fixes 2 old issues:
1. Each pp2 port device should have its own mdio bus field member since
some pp2 ports may use SMI mdio bus while some other pp2 ports may
use XSMI mdio bus, but the old mvpp2_base device has a shared bus
for its all pp2 ports; this patch moves mdio bus field member from
struct mvpp2 to struct mvpp2_port;
2. Old code uses mvpp2_base device name as mdio bus name, but for
Armada80x0, cp0 ethernet device and cp1 ethernet device have the
same device name - "ethernet@0"; and because mdio_register() checks
unique name, then the second probed mvpp2_base device fails to
register mdio bus; since new marvell MDIO driver has resolved the
unique name issue - different mdio names can be set in fdt and if
a mdio name is not set, the default mdio name will be generated from
the mdio bus base address, so this issue is fixed by this
replacement.
Signed-off-by: Ken Ma
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
Signed-off-by: Nevo Hed
---
drivers/net/Kconfig | 1 +
drivers/net/mvpp2.c | 158
2 files changed, 13 insertions(+), 146 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5fd31b03cf..d8c4dd6f4d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -297,6 +297,7 @@ config MVPP2
bool "Marvell Armada 375/7K/8K network interface support"
depends on ARMADA_375 || ARMADA_8K
select PHYLIB
+ select MVMDIO
help
This driver supports the network interface units in the
Marvell ARMADA 375, 7K and 8K SoCs.
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index f36c8236b1..b6dfed5c54 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -62,8 +63,6 @@ do {
\
#define MTU1500
#define RX_BUFFER_SIZE (ALIGN(MTU + WRAP, ARCH_DMA_MINALIGN))
-#define MVPP2_SMI_TIMEOUT 1
-
/* RX Fifo Registers */
#define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
#define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
@@ -490,23 +489,8 @@ do {
\
#define MVPP2_QUEUE_NEXT_DESC(q, index) \
(((index) < (q)->last_desc) ? ((index) + 1) : 0)
-/* SMI: 0xc0054 -> offset 0x54 to lms_base */
-#define MVPP21_SMI 0x0054
/* PP2.2: SMI: 0x12a200 -> offset 0x1200 to iface_base */
#define MVPP22_SMI 0x1200
-#define MVPP2_PHY_REG_MASK 0x1f
-/* SMI register fields */
-#define MVPP2_SMI_DATA_OFFS0 /* Data */
-#define MVPP2_SMI_DATA_MASK(0x <<
MVPP2_SMI_DATA_OFFS)
-#define MVPP2_SMI_DEV_ADDR_OFFS16 /* PHY device address */
-#define MVPP2_SMI_REG_ADDR_OFFS21 /* PHY device reg addr*/
-#define MVPP2_SMI_OPCODE_OFFS 26 /* Write/Read opcode */
-#define MVPP2_SMI_OPCODE_READ (1 << MVPP2_SMI_OPCODE_OFFS)
-#define MVPP2_SMI_READ_VALID (1 << 27) /* Read Valid */
-#define MVPP2_SMI_BUSY (1 << 28) /* Busy */
-
-#define MVPP2_PHY_ADDR_MASK0x1f
-#define MVPP2_PHY_REG_MASK 0x1f
/* Additional PPv2.2 offsets */
#define MVPP22_MPCS0x007000
@@ -973,7 +957,6 @@ struct mvpp2_port {
struct phy_device *phy_dev;
phy_interface_t phy_interface;
- int phy_node;
int phyaddr;
struct mii_dev *bus;
#ifdef CONFIG_DM_GPIO
@@ -4562,7 +4545,7 @@ static int mvpp2_open(struct udevice *dev, struct
mvpp2_port *port)
return err;
}
- if (port->phy_node) {
+ if (port->phyaddr < PHY_MAX_ADDR) {
mvpp2_phy_connect(dev, port);
mvpp2_link_event(port);
} else {
@@ -4701,6 +4684,7 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
+ int ret;
/* Default mdio_base from the same eth base */
if (port->priv->hw_version == MVPP21)
@@ -4719,17 +4703,12 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
dev_err(>dev, "could not find phy address\n");
return -1;
}
-
- phy_ofnode = ofnode_get_parent(offset_to_ofnode(phy_node));
- phy_base = ofnode_get_addr(phy_ofnode);
- port->mdio_base = (void
[U-Boot] [PATCH 4/7] net: mvpp2: no deref null
From: Nevo Hed
phy_dev ptr is set from return of phy_connect() and is used before
test to see if NULL. Obviously since the test already sxists someoen
made the determination that this NULL is possible.
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index fae7090121..5f908113f2 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4494,7 +4494,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct
mvpp2_port *port)
* an option because it is required for the phy_fw_down
* procedure.
*/
- if (phy_dev->drv->uid == 0x) {/* Generic phy */
+ if (phy_dev &&
+ phy_dev->drv->uid == 0x) {/* Generic phy */
netdev_warn(port->dev,
"Marking phy as invalid, link will not be
checked\n");
/* set phy_addr to invalid value */
--
2.21.0
___
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U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 5/7] net: mvpp2: allow MDIO registration for fixed links
From: Igal Liberman
Currently, there are 2 valid cases for interface, PHY
and mdio relation:
- If an interface has PHY handler, it'll call
mdio_mii_bus_get_from_phy(), which will register
MDIO bus.
- If we want to use fixed-link for an interface,
PHY handle is not defined in the DTS, and no
MDIO is registered.
There is a third case, for some boards (with switch),
the MDIO is used for switch configuration, but the interface
itself uses fixed link. This patch allows this option by
checking if fixed-link subnode is defined, in this case,
MDIO bus is registers, but the PHY address is set to
PHY_MAX_ADDR for this interface, so this interface will
not try to access the PHY later on.
In addition, remove unnecessary check after
calling fdtdec_get_int().
This squahses a subsequent fix by same author
Signed-off-by: Igal Liberman
Reviewed-by: Kostya Porotchkin
Reviewed-by: Stefan Chulski
Signed-off-by: Nevo Hed
---
drivers/net/mvpp2.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 5f908113f2..da550450eb 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4707,6 +4707,7 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
u32 phyaddr = 0;
int phy_mode = -1;
int ret;
+ int fixed_link = 0;
/* Default mdio_base from the same eth base */
if (port->priv->hw_version == MVPP21)
@@ -4715,16 +4716,17 @@ static int phy_info_parse(struct udevice *dev, struct
mvpp2_port *port)
port->mdio_base = port->priv->iface_base + MVPP22_SMI;
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
+ fixed_link = fdt_subnode_offset(gd->fdt_blob, port_node, "fixed-link");
if (phy_node > 0) {
- ofnode phy_ofnode;
- fdt_addr_t phy_base;
-
- phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
- if (phyaddr < 0) {
- dev_err(>dev, "could not find phy address\n");
- return -1;
+ if (fixed_link != -FDT_ERR_NOTFOUND) {
+ /* phy_addr is set to invalid value for fixed links */
+ phyaddr = PHY_MAX_ADDR;
+ } else {
+ phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node,
+"reg", 0);
}
+
ret = mdio_mii_bus_get_from_phy(phy_node, >bus);
if (ret)
return ret;
--
2.21.0
___
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[U-Boot] Pull request: u-boot-nds32/master
Hi Tom, Please pull some nds32 updates: - Update nds32 MAINTAINERS from Macpaul to Rick. https://travis-ci.org/rickchen36/u-boot-nds32/builds/560328107 Thanks Rick The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2: Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-nds32.git for you to fetch changes up to 995fa61fc3769222eac79946890c721bdc27f82b: MAINTAINERS: Remove Macpaul and add Rick as nds32 maintainer (2019-07-19 15:09:57 +0800) Rick Chen (1): MAINTAINERS: Remove Macpaul and add Rick as nds32 maintainer MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom,
Please pull some riscv updates:
- Update SiFive Unleashed clock driver.
- Enables SiFive SPI driver and MMC SPI driver for SiFive Unleashed board
https://travis-ci.org/rickchen36/u-boot-riscv/builds/560423274
Thanks
Rick
The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2:
Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400)
are available in the Git repository at:
g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 8911a22aee1e2a176af93ebf502477f2df2fc912:
doc: sifive-fu540: Update README for SiFive SPI and MMC SPI drivers
(2019-07-19 14:25:06 +0800)
Anup Patel (8):
clk: sifive: Factor-out PLL library as separate module
clk: sifive: Sync-up WRPLL library with upstream Linux
clk: sifive: Sync-up DT bindings header with upstream Linux
clk: sifive: Sync-up main driver with upstream Linux
clk: sifive: Drop GEMGXL clock driver
riscv: sifive: fu540: Setup ethaddr env variable using OTP
doc: sifive-fu540: Update README for steps to create FW_PAYLOAD
doc: sifive-fu540: Update README for SiFive SPI and MMC SPI drivers
Bhargav Shah (1):
riscv: sifive: fu540: Enable SiFive SPI and MMC SPI drivers
board/sifive/fu540/Kconfig| 7 +-
board/sifive/fu540/fu540.c| 122
+++
configs/sifive_fu540_defconfig| 1 +
doc/README.sifive-fu540 | 356
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/analogbits/Kconfig| 4 +
drivers/clk/analogbits/Makefile | 3 +
drivers/clk/{sifive => analogbits}/wrpll-cln28hpc.c | 168
-
drivers/clk/sifive/Kconfig| 10 ---
drivers/clk/sifive/Makefile | 4 -
drivers/clk/sifive/fu540-prci.c | 123
---
drivers/clk/sifive/gemgxl-mgmt.c | 60
--
include/dt-bindings/clk/sifive-fu540-prci.h | 29
---
include/dt-bindings/clock/sifive-fu540-prci.h | 18
{drivers/clk/sifive => include/linux/clk}/analogbits-wrpll-cln28hpc.h | 70
++--
16 files changed, 487 insertions(+), 490 deletions(-)
create mode 100644 drivers/clk/analogbits/Kconfig
create mode 100644 drivers/clk/analogbits/Makefile
rename drivers/clk/{sifive => analogbits}/wrpll-cln28hpc.c (69%)
delete mode 100644 drivers/clk/sifive/gemgxl-mgmt.c
delete mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h
create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h
rename {drivers/clk/sifive => include/linux/clk}/analogbits-wrpll-cln28hpc.h
(52%)
___
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[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Support Microchip MPFS Icicle board. - Enable e1000 and nvme support for qemu. - Enable PCI host ECAM generic driver for qemu. - Increase the environment size to 128kB for qemu. https://travis-ci.org/rickchen36/u-boot-riscv/builds/541565696 Thanks Rick The following changes since commit 38c2a8a00132b4dcc6a0bb5baf5146b9eb9eb2d2: Merge tag 'efi-2019-07-rc4' of git://git.denx.de/u-boot-efi (2019-06-02 18:19:45 -0400) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 39494822e3a639c8b5d60538d1dcae17bcf3c5f6: riscv: Add Microchip MPFS Icicle board support (2019-06-05 13:19:24 +0800) Bin Meng (2): riscv: qemu: Enable PCI host ECAM generic driver riscv: qemu: Enable e1000 and nvme support Karsten Merker (1): riscv: increase the environment size for the qemu-riscv platform to 128kB Padmarao Begari (1): riscv: Add Microchip MPFS Icicle board support arch/riscv/Kconfig| 4 board/emulation/qemu-riscv/Kconfig| 6 ++ board/microchip/mpfs_icicle/Kconfig | 26 ++ board/microchip/mpfs_icicle/MAINTAINERS | 7 +++ board/microchip/mpfs_icicle/Makefile | 7 +++ board/microchip/mpfs_icicle/mpfs_icicle.c | 30 ++ configs/microchip_mpfs_icicle_defconfig | 8 include/configs/microchip_mpfs_icicle.h | 63 +++ include/configs/qemu-riscv.h | 2 +- 9 files changed, 152 insertions(+), 1 deletion(-) create mode 100644 board/microchip/mpfs_icicle/Kconfig create mode 100644 board/microchip/mpfs_icicle/MAINTAINERS create mode 100644 board/microchip/mpfs_icicle/Makefile create mode 100644 board/microchip/mpfs_icicle/mpfs_icicle.c create mode 100644 configs/microchip_mpfs_icicle_defconfig create mode 100644 include/configs/microchip_mpfs_icicle.h ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom,
Please pull some riscv update:
1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
2. Support SiFive UART
3. Rename ax25-ae350 defconfig
https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551
Thanks
Rick
The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71:
doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800)
Anup Patel (4):
riscv: Introduce a Kconfig option for machine mode
riscv: Implement riscv_get_time() API using rdtime instruction
drivers: serial: Add SiFive UART driver
riscv: qemu: Imply SIFIVE_SERIAL for emulation
Bin Meng (22):
dm: cpu: Add timebase frequency to the platdata
riscv: qemu: Create a simple-bus driver for the soc node
cpu: Add a RISC-V CPU driver
timer: Add generic driver for RISC-V privileged architecture defined timer
riscv: ax25: Hide the ax25-specific Kconfig option
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
riscv: qemu: Add platform-specific Kconfig options
riscv: Enlarge the default SYS_MALLOC_F_LEN
riscv: Probe cpus during boot
riscv: Remove non-DM version of print_cpuinfo()
riscv: Add CSR numbers
riscv: Add exception codes for xcause register
riscv: Update supports_extension() to use desc from cpu driver
riscv: Add indirect stringification to csr_xxx ops
riscv: Do some basic architecture level cpu initialization
riscv: Move trap handler codes to mtrap.S
riscv: Fix context restore before returning from trap handler
riscv: Return to previous privilege level after trap handling
riscv: Adjust the _exit_trap() position to come before handle_trap()
riscv: Save boot hart id to the global data
riscv: bootm: Change to use boot_hart from global data
riscv: Remove ae350.dts
Lukas Auer (1):
riscv: add Kconfig entries for the code model
Rick Chen (2):
riscv: configs: Rename ax25-ae350 defconfig
doc: README.ae350: Sync for ax25-ae350 rename
arch/riscv/Kconfig| 60
+--
arch/riscv/Makefile | 9 +++-
arch/riscv/cpu/Makefile | 2 +-
arch/riscv/cpu/ax25/Kconfig | 17 +--
arch/riscv/cpu/ax25/cache.c | 12 ++---
arch/riscv/cpu/cpu.c | 98
++
arch/riscv/cpu/mtrap.S| 103
arch/riscv/cpu/qemu/Kconfig | 12 +
arch/riscv/cpu/qemu/cpu.c | 14 ++
arch/riscv/cpu/start.S| 93
++--
arch/riscv/dts/ae350.dts | 229
arch/riscv/include/asm/csr.h | 16 ---
arch/riscv/include/asm/encoding.h | 236
+++
arch/riscv/include/asm/global_data.h | 4 ++
arch/riscv/include/asm/syscon.h | 19
arch/riscv/lib/Makefile | 2 +
arch/riscv/lib/asm-offsets.c | 19
arch/riscv/lib/bootm.c| 2 +-
arch/riscv/lib/interrupts.c | 62
arch/riscv/lib/rdtime.c | 38 +++
arch/riscv/lib/sifive_clint.c | 84
+
board/AndesTech/ax25-ae350/Kconfig| 4 ++
board/AndesTech/ax25-ae350/MAINTAINERS| 5 +-
board/emulation/qemu-riscv/Kconfig| 2 +
configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} | 0
configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} | 0
doc/README.ae350 | 2 +-
drivers/cpu/Kconfig | 6 +++
drivers/cpu/Makefile | 1 +
drivers/cpu/riscv_cpu.c | 116
+
drivers/serial/Kconfig| 13 +
drivers/serial/Makefile | 1 +
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: - Correct SYS_TEXT_BASE for qemu. - Support booti. - Increase SYSBOOTM_LEN for Fedora/RISCV kernel. - Support SMP booting from flash. https://travis-ci.org/rickchen36/u-boot-riscv/builds/530082266 Thanks Rick The following changes since commit 504bf790da08db9b4a443566cf6ef577f9c7996a: Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2019-05-08 16:21:43 -0400) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 3cedc97479ff44cdc00485de7517a833e3dfb630: RISCV: image: Add booti support (2019-05-09 16:47:52 +0800) Anup Patel (1): riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system Atish Patra (1): RISCV: image: Add booti support David Abdurachmanov (2): riscv: set CONFIG_SYS_BOOTM_LEN to SZ_64M riscv: qemu-riscv.h: define CONFIG_PREBOOT (enables extlinux) Rick Chen (5): riscv: Introduce CONFIG_XIP to support booting from flash riscv: configs: Support AE350 SMP booting from flash flow riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled riscv: configs: AE350 will use CONFIG_OF_PRIOR_STAGE when boots from ram riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flash arch/riscv/Kconfig | 7 +++ arch/riscv/cpu/cpu.c| 4 arch/riscv/cpu/start.S | 8 arch/riscv/include/asm/global_data.h| 2 ++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/asm-offsets.c| 2 ++ arch/riscv/lib/image.c | 55 +++ arch/riscv/lib/smp.c| 2 ++ board/AndesTech/ax25-ae350/MAINTAINERS | 2 ++ board/AndesTech/ax25-ae350/ax25-ae350.c | 4 board/emulation/qemu-riscv/Kconfig | 3 ++- cmd/Kconfig | 2 +- cmd/booti.c | 8 ++-- configs/ae350_rv32_defconfig| 2 +- configs/ae350_rv32_xip_defconfig| 37 + configs/ae350_rv64_defconfig| 2 +- configs/ae350_rv64_xip_defconfig| 38 ++ include/configs/ax25-ae350.h| 2 +- include/configs/qemu-riscv.h| 16 ++-- 19 files changed, 180 insertions(+), 17 deletions(-) create mode 100644 arch/riscv/lib/image.c create mode 100644 configs/ae350_rv32_xip_defconfig create mode 100644 configs/ae350_rv64_xip_defconfig ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: 1. RISC-V arch support SMP. 2. Support Andestech's PLIC and PLMT. 2. qemu, fu54e, ae350 boards enable SMP by default. 3. Fix CONFIG_DEFAULT_DEVICE_TREE failure. https://travis-ci.org/rickchen36/u-boot-riscv/builds/517045091 Thanks Rick The following changes since commit 0e62d5b2abb69ddc9e58215e2d8dfa5d33996b8a: Merge tag 'u-boot-imx-20190405' of git://git.denx.de/u-boot-imx (2019-04-05 09:09:56 -0400) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 48b90d9db5d32e587901c4f33175488dd20fe0a5: riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure (2019-04-08 09:46:00 +0800) Lukas Auer (11): riscv: add infrastructure for calling functions on other harts riscv: import the supervisor binary interface header file riscv: implement IPI platform functions using SBI riscv: delay initialization of caches and debug UART riscv: save hart ID in register tp instead of s0 riscv: add support for multi-hart systems riscv: boot images passed to bootm on all harts riscv: do not rely on hart ID passed by previous boot stage riscv: hang if relocation of secondary harts fails riscv: fu540: enable SMP riscv: qemu: enable SMP Rick Chen (7): riscv: Add a SYSCON driver for Andestech's PLIC riscv: Add a SYSCON driver for Andestech's PLMT riscv: ax25: Add platform-specific Kconfig options riscv: ax25: Andes specific cache shall only support in M-mode riscv: dts: ae350 support SMP riscv: ae350: enable SMP riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure arch/riscv/Kconfig | 46 +++ arch/riscv/cpu/ax25/Kconfig | 7 + arch/riscv/cpu/cpu.c | 9 +- arch/riscv/cpu/start.S | 167 +--- arch/riscv/dts/Makefile | 2 ++ arch/riscv/dts/ae350_32.dts | 81 +++--- arch/riscv/dts/ae350_64.dts | 81 +++--- arch/riscv/include/asm/csr.h | 1 + arch/riscv/include/asm/global_data.h | 12 arch/riscv/include/asm/sbi.h | 94 +++ arch/riscv/include/asm/smp.h | 53 arch/riscv/include/asm/syscon.h | 4 +-- arch/riscv/lib/Makefile | 4 +++ arch/riscv/lib/andes_plic.c | 113 arch/riscv/lib/andes_plmt.c | 53 arch/riscv/lib/asm-offsets.c | 1 + arch/riscv/lib/bootm.c | 13 - arch/riscv/lib/sbi_ipi.c | 25 + arch/riscv/lib/smp.c | 118 +++ board/AndesTech/ax25-ae350/Kconfig | 1 + board/emulation/qemu-riscv/Kconfig | 1 + board/sifive/fu540/Kconfig | 1 + configs/ae350_rv32_defconfig | 1 - configs/ae350_rv64_defconfig | 1 - 24 files changed, 829 insertions(+), 60 deletions(-) create mode 100644 arch/riscv/include/asm/sbi.h create mode 100644 arch/riscv/include/asm/smp.h create mode 100644 arch/riscv/lib/andes_plic.c create mode 100644 arch/riscv/lib/andes_plmt.c create mode 100644 arch/riscv/lib/sbi_ipi.c create mode 100644 arch/riscv/lib/smp.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom,
Please pull some riscv updates:
SiFive FU540 Support
https://travis-ci.org/rickchen36/u-boot-riscv/builds/499037971
Thanks
Rick
The following changes since commit b3820ba997f004a376efc5446683101ff42b05af:
Merge tag 'efi-2019-04-rc3' of https://github.com/xypron2/u-boot (2019-02-26
08:45:08 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 98a66ffa3aafd20d38f357d624e470e20fbb1839:
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd (2019-02-27
09:12:34 +0800)
Anup Patel (10):
riscv: Enable create symlink using kconfig
riscv: Rename cpu/qemu to cpu/generic
riscv: Add asm/dma-mapping.h for DMA mappings
riscv: Add place-holder asm/arch/clk.h for driver compilation
riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems
net: macb: Fix clk API usage for RISC-V systems
clk: Add SiFive FU540 PRCI clock driver
clk: Add fixed-factor clock driver
riscv: Add SiFive FU540 board support
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd
Atish Patra (5):
net: macb: Fix GEM hardware detection
drivers: serial_sifive: Fix baud rate calculation
drivers: serial_sifive: Skip baudrate config if no input clock
cpu: Bind timer driver for boot hart
doc: Add a readme guide for SiFive FU540
arch/Kconfig | 1 +
arch/riscv/Kconfig| 6 +-
arch/riscv/cpu/{qemu => generic}/Kconfig | 2 +-
arch/riscv/cpu/{qemu => generic}/Makefile | 0
arch/riscv/cpu/{qemu => generic}/cpu.c| 0
arch/riscv/cpu/generic/dram.c | 37 ++
arch/riscv/cpu/qemu/dram.c| 17 ---
arch/riscv/include/asm/arch-generic/clk.h | 14 +++
arch/riscv/include/asm/config.h | 1 +
arch/riscv/include/asm/dma-mapping.h | 38 ++
arch/sandbox/dts/test.dts | 8 ++
board/emulation/qemu-riscv/Kconfig| 4 +-
board/sifive/fu540/Kconfig| 42 +++
board/sifive/fu540/MAINTAINERS| 9 ++
board/sifive/fu540/Makefile | 5 +
board/sifive/fu540/fu540.c| 17 +++
configs/sifive_fu540_defconfig| 11 ++
doc/README.sifive-fu540 | 303
doc/device-tree-bindings/clock/fixed-factor-clock.txt | 24
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 5 +-
drivers/clk/clk_fixed_factor.c| 74
drivers/clk/sifive/Kconfig| 19 +++
drivers/clk/sifive/Makefile | 5 +
drivers/clk/sifive/analogbits-wrpll-cln28hpc.h| 101
drivers/clk/sifive/fu540-prci.c | 604
+++
drivers/clk/sifive/wrpll-cln28hpc.c | 390
+
drivers/cpu/riscv_cpu.c | 7 +-
drivers/net/macb.c| 11 +-
drivers/serial/serial_sifive.c| 60 +++---
include/configs/sifive-fu540.h| 43 +++
include/dt-bindings/clk/sifive-fu540-prci.h | 29 +
test/dm/clk.c | 5 +-
33 files changed, 1843 insertions(+), 50 deletions(-)
rename arch/riscv/cpu/{qemu => generic}/Kconfig (91%)
rename arch/riscv/cpu/{qemu => generic}/Makefile (100%)
rename arch/riscv/cpu/{qemu => generic}/cpu.c (100%)
create mode 100644 arch/riscv/cpu/generic/dram.c
delete mode 100644 arch/riscv/cpu/qemu/dram.c
create mode 100644 arch/riscv/include/asm/arch-generic/clk.h
create mode 100644 arch/riscv/include/asm/dma-mapping.h
create mode 100644 board/sifive/fu540/Kconfig
create mode 100644 board/sifive/fu540/MAINTAINERS
create mode 100644 board/sifive/fu540/Makefile
create mode 100644 board/sifive/fu540/fu540.c
create mode 100644 configs/sifive_fu540_defconfig
create mode 100644 doc/README.sifive-fu540
create mode 100644 doc/device-tree-bindings/clock/fixed-factor-clock.txt
create mode 100644 drivers/clk/clk_fixed_factor.c
create mode 100644 drivers/clk/sifive/Kconfig
create mode 100644 drivers/clk/sifive/Makefile
create mode 100644 drivers/clk/sifive/analogbits-wrpll-cln28hpc.h
create mode 100644 drivers/clk/sifive/fu540-prci.c
create mode 100644 drivers/clk/sifive/wrpll-cln28hpc.c
create mode 100644 include/configs/sifive-fu540.h
[U-Boot] Pull request: u-boot-nds32/master
Hi Tom, Please pull some nds32 updates: 1. Support nds32 prebuilt toolchain. 2. Fix some compile issues. 3. Fix dts mmc node compatible string. https://travis-ci.org/rickchen36/u-boot-nds32/builds/482800645 Thanks Rick The following changes since commit e8ddbefccd0193340ebbe6fe53c5490624b7c110: Merge git://git.denx.de/u-boot-marvell (2019-01-21 11:59:21 -0500) are available in the Git repository at: git://git.denx.de/u-boot-nds32.git for you to fetch changes up to 866ab879c94f837150af6c5094372de23ca3bd17: nds32: dts: Fix mmc node compatible string (2019-01-22 17:36:20 +0800) Rick Chen (5): .travis.yml: Support nds32 prebuilt toolchain nds32: Remove gcc unused option nds32: Generate SW fpu instruction. nds32: Fix boot fail issue when build with elf-mculib. nds32: dts: Fix mmc node compatible string .travis.yml | 9 + arch/nds32/config.mk | 6 +++--- arch/nds32/dts/ae3xx.dts | 2 +- arch/nds32/dts/ag101p.dts | 2 +- 4 files changed, 14 insertions(+), 5 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-riscv/master
Hi Tom, Please pull some riscv updates: 1. Improve cache implementation. 2. Fix and improve standalone applications https://travis-ci.org/rickchen36/u-boot-riscv/builds/479684449 Thanks Rick The following changes since commit d3689267f92c5956e09cc7d1baa4700141662bff: Prepare v2019.01 (2019-01-14 17:02:36 -0500) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 91882c472d8c0aef4db699d3f2de55bf43d4ae4b: riscv: qemu: define standalone load address (2019-01-15 09:36:31 +0800) Lukas Auer (7): riscv: clarify error message on undefined exceptions riscv: move the AX25-specific implementation of flush_dcache_all riscv: use invalidate/flush_*cache_range functions in cache.c riscv: remove RISC-V standalone linker script riscv: replace use of callee-saved register in standalone riscv: support standalone applications on RV64I systems riscv: qemu: define standalone load address arch/riscv/config.mk | 3 +-- arch/riscv/cpu/ax25/cache.c | 22 ++ arch/riscv/lib/cache.c| 14 ++ arch/riscv/lib/interrupts.c | 3 ++- examples/standalone/riscv.lds | 40 examples/standalone/stubs.c | 21 - include/configs/qemu-riscv.h | 2 ++ 7 files changed, 49 insertions(+), 56 deletions(-) delete mode 100644 examples/standalone/riscv.lds ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom,
Please pull some riscv update:
1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
2. Support SiFive UART
3. Rename ax25-ae350 defconfig
https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551
Thanks
Rick
The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71:
doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800)
Anup Patel (4):
riscv: Introduce a Kconfig option for machine mode
riscv: Implement riscv_get_time() API using rdtime instruction
drivers: serial: Add SiFive UART driver
riscv: qemu: Imply SIFIVE_SERIAL for emulation
Bin Meng (22):
dm: cpu: Add timebase frequency to the platdata
riscv: qemu: Create a simple-bus driver for the soc node
cpu: Add a RISC-V CPU driver
timer: Add generic driver for RISC-V privileged architecture defined timer
riscv: ax25: Hide the ax25-specific Kconfig option
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
riscv: qemu: Add platform-specific Kconfig options
riscv: Enlarge the default SYS_MALLOC_F_LEN
riscv: Probe cpus during boot
riscv: Remove non-DM version of print_cpuinfo()
riscv: Add CSR numbers
riscv: Add exception codes for xcause register
riscv: Update supports_extension() to use desc from cpu driver
riscv: Add indirect stringification to csr_xxx ops
riscv: Do some basic architecture level cpu initialization
riscv: Move trap handler codes to mtrap.S
riscv: Fix context restore before returning from trap handler
riscv: Return to previous privilege level after trap handling
riscv: Adjust the _exit_trap() position to come before handle_trap()
riscv: Save boot hart id to the global data
riscv: bootm: Change to use boot_hart from global data
riscv: Remove ae350.dts
Lukas Auer (1):
riscv: add Kconfig entries for the code model
Rick Chen (2):
riscv: configs: Rename ax25-ae350 defconfig
doc: README.ae350: Sync for ax25-ae350 rename
arch/riscv/Kconfig| 60
+--
arch/riscv/Makefile | 9 +++-
arch/riscv/cpu/Makefile | 2 +-
arch/riscv/cpu/ax25/Kconfig | 17 +--
arch/riscv/cpu/ax25/cache.c | 12 ++---
arch/riscv/cpu/cpu.c | 98
++
arch/riscv/cpu/mtrap.S| 103
arch/riscv/cpu/qemu/Kconfig | 12 +
arch/riscv/cpu/qemu/cpu.c | 14 ++
arch/riscv/cpu/start.S| 93
++--
arch/riscv/dts/ae350.dts | 229
arch/riscv/include/asm/csr.h | 16 ---
arch/riscv/include/asm/encoding.h | 236
+++
arch/riscv/include/asm/global_data.h | 4 ++
arch/riscv/include/asm/syscon.h | 19
arch/riscv/lib/Makefile | 2 +
arch/riscv/lib/asm-offsets.c | 19
arch/riscv/lib/bootm.c| 2 +-
arch/riscv/lib/interrupts.c | 62
arch/riscv/lib/rdtime.c | 38 +++
arch/riscv/lib/sifive_clint.c | 84
+
board/AndesTech/ax25-ae350/Kconfig| 4 ++
board/AndesTech/ax25-ae350/MAINTAINERS| 5 +-
board/emulation/qemu-riscv/Kconfig| 2 +
configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} | 0
configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} | 0
doc/README.ae350 | 2 +-
drivers/cpu/Kconfig | 6 +++
drivers/cpu/Makefile | 1 +
drivers/cpu/riscv_cpu.c | 116
+
drivers/serial/Kconfig| 13 +
drivers/serial/Makefile | 1 +
[U-Boot] Uboot send pull request
Hi Tom, Please pull some riscv update: 1. Fix BBL may be corrupted problem. 2. Support U-Boot run ib S-mode. https://travis-ci.org/rickchen36/u-boot-riscv/builds/463646974 Thanks Rick The following changes since commit 2e2a2a5d4f0c2e2642326d9000ce1f1553632e6a: Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-12-04 19:22:31 -0500) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 48cbf6246052de10d35b616b5efb2f783904a49d: riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-12-05 14:14:16 +0800) Anup Patel (3): riscv: Add kconfig option to run U-Boot in S-mode riscv: qemu: Use different SYS_TEXT_BASE for S-mode riscv: Add S-mode defconfigs for QEMU virt machine Rick Chen (1): riscv: ax25-ae350: Pass dtb address to u-boot with a1 register arch/riscv/Kconfig | 5 + arch/riscv/cpu/start.S | 25 +++-- arch/riscv/include/asm/encoding.h | 6 ++ arch/riscv/lib/interrupts.c | 31 ++- board/AndesTech/ax25-ae350/ax25-ae350.c | 3 ++- board/emulation/qemu-riscv/Kconfig | 3 ++- board/emulation/qemu-riscv/MAINTAINERS | 2 ++ configs/qemu-riscv32_smode_defconfig| 10 ++ configs/qemu-riscv64_smode_defconfig| 11 +++ 9 files changed, 75 insertions(+), 21 deletions(-) create mode 100644 configs/qemu-riscv32_smode_defconfig create mode 100644 configs/qemu-riscv64_smode_defconfig ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom,
Please pull the following patch from u-boot-riscv into your tree.
Thanks!
The following changes since commit 5830791d91d1200854ef78fcb32f808c8080f0f0:
Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm (2018-11-23 17:25:27
-0500)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 52923c6db7f00e0197ec894c8c1bb8a7681974bb:
riscv: cache: Implement i/dcache [status, enable, disable] (2018-11-26
13:58:01 +0800)
Bin Meng (1):
Drop CONFIG_INIT_CRITICAL
Lukas Auer (27):
tools: .gitignore: add prelink-riscv
dts: riscv: update makefile to also clean the RISC-V dts directory
riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
riscv: select CONFIG_PHYS_64BIT on RV64I systems
riscv: add Kconfig entries for the C and A ISA extensions
riscv: set -march and -mabi based on the Kconfig configuration
riscv: enable -fdata-sections
riscv: fix use of incorrectly sized variables
riscv: make use of the barrier functions from Linux
riscv: do not reimplement generic io functions
riscv: complete the list of exception codes
riscv: treat undefined exception codes as reserved
riscv: hang on unhandled exceptions
riscv: implement the invalidate_icache_* functions
riscv: fix inconsistent use of spaces and tabs in start.S
riscv: align mtvec on a 4-byte boundary
riscv: remove unused labels in start.S
riscv: do not blindly modify the mstatus CSR
riscv: save hart ID and device tree passed by prior boot stage
riscv: qemu: use device tree passed by prior boot stage
riscv: qemu: support booting Linux
riscv: align bootm implementation with that of other architectures
distro_bootcmd: add VirtIO distro boot command
riscv: qemu: enable distro boot
dm: core: add missing prototype for ofnode_read_u64
riscv: qemu: detect and boot the kernel passed by QEMU
riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
Rick Chen (4):
riscv: dts: Sync to Linux Kernel ae350 dts.
configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
riscv: dts: Add ae350_32.dts for RV32I
riscv: cache: Implement i/dcache [status, enable, disable]
arch/nds32/cpu/n1213/start.S | 51 --
arch/riscv/Kconfig | 34 ++---
arch/riscv/Makefile | 20 ++
arch/riscv/config.mk | 7 +-
arch/riscv/cpu/ax25/Kconfig | 7 ++
arch/riscv/cpu/ax25/Makefile | 1 +
arch/riscv/cpu/ax25/cache.c | 95
+
arch/riscv/cpu/ax25/cpu.c| 4 ++
arch/riscv/cpu/cpu.c | 6 ++
arch/riscv/cpu/qemu/cpu.c| 2 +-
arch/riscv/cpu/start.S | 346
+---
arch/riscv/dts/Makefile | 1 -
arch/riscv/dts/ae350.dts | 107
+
arch/riscv/dts/ae350_32.dts | 229
+
arch/riscv/dts/ae350_64.dts | 229
+
arch/riscv/include/asm/barrier.h | 67
++
arch/riscv/include/asm/cache.h | 3 +
arch/riscv/include/asm/io.h | 48 +++--
arch/riscv/include/asm/posix_types.h | 6 +-
arch/riscv/include/asm/types.h | 4 ++
arch/riscv/lib/bootm.c | 97
++
arch/riscv/lib/cache.c | 36 --
arch/riscv/lib/interrupts.c | 31 +++--
arch/riscv/lib/setjmp.S | 2 +-
board/armltd/integrator/README | 4 +-
board/emulation/qemu-riscv/Kconfig | 2 +
board/emulation/qemu-riscv/qemu-riscv.c | 73
+---
configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} | 3 +-
configs/ax25-ae350_64_defconfig | 37 ++
configs/qemu-riscv32_defconfig | 5 +-
configs/qemu-riscv64_defconfig | 7 +-
doc/README.distro| 3 +-
dts/Makefile | 2 +-
include/common.h
[U-Boot] Uboot send pull request
Hi Tom,
Please pull the following patch from u-boot-riscv into your tree.
Thanks!
The following changes since commit d73d81fd85e4a030ade42c4b2d13466d45090aa3:
Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips (2018-11-18
15:47:16 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to f1b8761952aca2cdd91f42dbfd26c656072f2d11:
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-11-20
14:37:31 +0800)
Bin Meng (1):
Drop CONFIG_INIT_CRITICAL
Lukas Auer (26):
tools: .gitignore: add prelink-riscv
dts: riscv: update makefile to also clean the RISC-V dts directory
riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
riscv: select CONFIG_PHYS_64BIT on RV64I systems
riscv: add Kconfig entries for the C and A ISA extensions
riscv: set -march and -mabi based on the Kconfig configuration
riscv: fix use of incorrectly sized variables
riscv: make use of the barrier functions from Linux
riscv: do not reimplement generic io functions
riscv: complete the list of exception codes
riscv: treat undefined exception codes as reserved
riscv: hang on unhandled exceptions
riscv: implement the invalidate_icache_* functions
riscv: fix inconsistent use of spaces and tabs in start.S
riscv: align mtvec on a 4-byte boundary
riscv: remove unused labels in start.S
riscv: do not blindly modify the mstatus CSR
riscv: save hart ID and device tree passed by prior boot stage
riscv: qemu: use device tree passed by prior boot stage
riscv: qemu: support booting Linux
riscv: align bootm implementation with that of other architectures
distro_bootcmd: add VirtIO distro boot command
riscv: qemu: enable distro boot
dm: core: add missing prototype for ofnode_read_u64
riscv: qemu: detect and boot the kernel passed by QEMU
riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
Rick Chen (7):
riscv: enable -fdata-sections
riscv: dts: Sync to Linux Kernel ae350 dts.
configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
riscv: dts: Add ae350_32.dts for RV32I
configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
riscv: cache: Implement i/dcache [status, enable, disable]
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
arch/nds32/cpu/n1213/start.S | 51 --
arch/riscv/Kconfig | 34 ++---
arch/riscv/Makefile | 20 ++
arch/riscv/config.mk | 7 +-
arch/riscv/cpu/ax25/Kconfig | 7 ++
arch/riscv/cpu/ax25/Makefile | 1 +
arch/riscv/cpu/ax25/cache.c | 95
++
arch/riscv/cpu/ax25/cpu.c| 4 ++
arch/riscv/cpu/cpu.c | 6 ++
arch/riscv/cpu/qemu/cpu.c| 2 +-
arch/riscv/cpu/start.S | 344
+---
arch/riscv/dts/Makefile | 1 -
arch/riscv/dts/ae350.dts | 107
+
arch/riscv/dts/ae350_32.dts | 229
+
arch/riscv/dts/ae350_64.dts | 229
+
arch/riscv/include/asm/barrier.h | 67
++
arch/riscv/include/asm/cache.h | 3 +
arch/riscv/include/asm/io.h | 48 +++--
arch/riscv/include/asm/posix_types.h | 6 +-
arch/riscv/include/asm/types.h | 4 ++
arch/riscv/lib/bootm.c | 97
++
arch/riscv/lib/cache.c | 36 --
arch/riscv/lib/interrupts.c | 31 +++--
arch/riscv/lib/setjmp.S | 2 +-
board/AndesTech/ax25-ae350/ax25-ae350.c | 3 +-
board/armltd/integrator/README | 4 +-
board/emulation/qemu-riscv/Kconfig | 2 +
board/emulation/qemu-riscv/qemu-riscv.c | 73
+---
configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} | 5 +-
configs/ax25-ae350_64_defconfig | 39 +++
configs/qemu-riscv32_defconfig | 5
[U-Boot] Uboot send pull request
Hi Tom,
Please pull the following patch from u-boot-riscv into your tree.
Thanks!
The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02 17:01:46
-0400)
are available in the git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 5845f6612372a63877b2175e058a841e1237ffd6:
riscv: allow native compilation (2018-10-03 17:49:44 +0800)
Bin Meng (17):
riscv: kconfig: Normalize architecture name spelling
riscv: Remove setup.h
riscv: bootm: Correct the 1st kernel argument to hart id
riscv: Remove mach type
riscv: cmd: bdinfo: Print the relocation address
riscv: Move the linker script to the CPU root directory
riscv: Fix coding style issues in the linker script
riscv: Explicitly pass -march and -mabi to the compiler
riscv: Add a helper routine to print CPU information
riscv: Remove CSR read/write defines in encoding.h
riscv: bootm: Pass mhartid CSR value to kernel
riscv: Make start.S available for all targets
riscv: ae350: Clean up mixed tabs and spaces in the dts
riscv: kconfig: Select DM and OF_CONTROL
riscv: kconfig: Imply DM support for some common drivers
riscv: Add QEMU virt board support
riscv: Move do_reset() to a common place
Heinrich Schuchardt (1):
riscv: allow native compilation
Rick Chen (1):
riscv: cosmetic: Reword do_reset() printf message.
arch/Kconfig| 14 +++-
arch/riscv/Kconfig | 10 --
arch/riscv/Makefile | 3 +-
arch/riscv/config.mk| 12 +++
arch/riscv/cpu/Makefile | 7
arch/riscv/cpu/ax25/Makefile| 2 --
arch/riscv/cpu/ax25/cpu.c | 9 --
arch/riscv/cpu/cpu.c| 49
arch/riscv/cpu/qemu/Makefile| 6
arch/riscv/cpu/qemu/cpu.c | 21
arch/riscv/cpu/qemu/dram.c | 17 ++
arch/riscv/cpu/{ax25 => }/start.S | 0
arch/riscv/cpu/{ax25 => }/u-boot.lds| 60
+-
arch/riscv/dts/ae350.dts| 177
++-
arch/riscv/include/asm/bootm.h | 13
arch/riscv/include/asm/csr.h| 124
++
arch/riscv/include/asm/encoding.h | 50 +++-
arch/riscv/include/asm/mach-types.h | 29 -
arch/riscv/include/asm/setup.h | 194
-
arch/riscv/include/asm/u-boot.h | 1 -
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/bootm.c | 20
arch/riscv/lib/reset.c | 17 ++
board/AndesTech/ax25-ae350/ax25-ae350.c | 2 --
board/emulation/qemu-riscv/Kconfig | 22 +
board/emulation/qemu-riscv/MAINTAINERS | 7
board/emulation/qemu-riscv/Makefile | 5 +++
board/emulation/qemu-riscv/qemu-riscv.c | 23 +
cmd/bdinfo.c| 3 +-
configs/ax25-ae350_defconfig| 10 --
configs/qemu-riscv32_defconfig | 6
configs/qemu-riscv64_defconfig | 7
doc/README.qemu-riscv | 46 ++
include/configs/qemu-riscv.h| 21
34 files changed, 538 insertions(+), 450 deletions(-)
create mode 100644 arch/riscv/cpu/Makefile
create mode 100644 arch/riscv/cpu/cpu.c
create mode 100644 arch/riscv/cpu/qemu/Makefile
create mode 100644 arch/riscv/cpu/qemu/cpu.c
create mode 100644 arch/riscv/cpu/qemu/dram.c
rename arch/riscv/cpu/{ax25 => }/start.S (100%)
rename arch/riscv/cpu/{ax25 => }/u-boot.lds (54%)
delete mode 100644 arch/riscv/include/asm/bootm.h
create mode 100644 arch/riscv/include/asm/csr.h
delete mode 100644 arch/riscv/include/asm/mach-types.h
delete mode 100644 arch/riscv/include/asm/setup.h
create mode 100644 arch/riscv/lib/reset.c
create mode 100644 board/emulation/qemu-riscv/Kconfig
create mode 100644 board/emulation/qemu-riscv/MAINTAINERS
create mode 100644 board/emulation/qemu-riscv/Makefile
create mode 100644 board/emulation/qemu-riscv/qemu-riscv.c
create mode 100644 configs/qemu-riscv32_defconfig
create mode 100644 configs/qemu-riscv64_defconfig
create mode 100644 doc/README.qemu-riscv
create mode 100644 include/configs/qemu-riscv.h
___
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[U-Boot] Uboot send pull request
Hi Tom,
Please pull the following patch from u-boot-riscv into your tree.
Thanks!
The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
add FIT data-position & data-offset property support (2018-05-26 18:19:19
-0400)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 6ffea11b89099d72029bc644f7664736ee7ca667:
travis.yml: Support RISC-V 64-bit (2018-05-30 16:21:30 +0800)
Alexander Graf (7):
riscv: Add setjmp/longjmp code
riscv: Enable function sections
riscv: Add EFI application infrastructure
riscv: Add board_quiesce_devices stub
efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
distro: Extend with RISC-V defines
riscv: nx25: Enable distro boot
Rick Chen (16):
efi_loader: Enable RISC-V support
SPDX: Convert single license tags to Linux Kernel style
riscv: cpu: nx25: Rename as ax25
board: nx25-ae250: Rename as ax25-ae350
configs: nx25-ae250:Rename as ax25-ae350
doc: ae250: Rename as ae350
configs: ax25-ae350: Set 64-bit as default configuration
spi: atcspi200: Fix compiler warning
net: ftmac100: Fix compiler warning
riscv: dts: Sync DT with Linux Kernel
mmc: ftsdc010_mci: Sync compatible with DT mmc node
configs: ax25-ae350: Support cfi flash
riscv: dts: Support cfi flash
board: ax25-ae350: Support cfi flash
mtd: ftsmc020: Drop unsed code
travis.yml: Support RISC-V 64-bit
.travis.yml | 6 ++--
arch/riscv/Kconfig | 6 ++--
arch/riscv/config.mk | 7 +++-
arch/riscv/cpu/{nx25 => ax25}/Makefile | 0
arch/riscv/cpu/{nx25 => ax25}/cpu.c | 2 +-
arch/riscv/cpu/{nx25 => ax25}/start.S| 0
arch/riscv/cpu/{nx25 => ax25}/u-boot.lds | 18
+-
arch/riscv/dts/Makefile | 2 +-
arch/riscv/dts/ae250.dts | 97
---
arch/riscv/dts/ae350.dts | 149
++
arch/riscv/include/asm/mach-types.h | 10
+++---
arch/riscv/include/asm/setjmp.h | 25
++
arch/riscv/include/asm/u-boot-riscv.h| 1 +
arch/riscv/lib/Makefile | 12
+++
arch/riscv/lib/bootm.c | 4 +++
arch/riscv/lib/crt0_riscv_efi.S | 151
arch/riscv/lib/elf_riscv32_efi.lds | 71
++
arch/riscv/lib/elf_riscv64_efi.lds | 71
++
arch/riscv/lib/reloc_riscv_efi.c | 98
arch/riscv/lib/setjmp.S | 65
+++
board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig | 10
+++---
board/AndesTech/ax25-ae350/MAINTAINERS | 6
board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile | 2 +-
board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} | 36
++-
board/AndesTech/nx25-ae250/MAINTAINERS | 6
cmd/Kconfig | 2 +-
configs/{nx25-ae250_defconfig => ax25-ae350_defconfig} | 11
--
doc/{README.NX25 => README.AX25} | 2 +-
doc/{README.ae250 => README.ae350} | 34
+-
drivers/mmc/ftsdc010_mci.c | 2 +-
drivers/mtd/Makefile | 1 -
drivers/mtd/ftsmc020.c | 37
drivers/net/ftmac100.c | 14
drivers/spi/atcspi200_spi.c | 6 ++--
include/config_distro_bootcmd.h | 11
++
include/configs/{nx25-ae250.h => ax25-ae350.h} | 55
+
include/efi_loader.h
[U-Boot] Uboot send pull request
Hi Tom,
Please pull the following patch from u-boot-riscv into your tree.
Thanks!
The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
add FIT data-position & data-offset property support (2018-05-26 18:19:19
-0400)
are available in the Git repository at:
git://git.denx.de/u-boot-riscv.git
for you to fetch changes up to 9171ab8836511ab1e65e120b7288acd6d5baac70:
mtd: ftsmc020: Drop unsed code (2018-05-29 14:45:04 +0800)
Alexander Graf (7):
riscv: Add setjmp/longjmp code
riscv: Enable function sections
riscv: Add EFI application infrastructure
riscv: Add board_quiesce_devices stub
efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
distro: Extend with RISC-V defines
riscv: nx25: Enable distro boot
Rick Chen (15):
efi_loader: Enable RISC-V support
SPDX: Convert single license tags to Linux Kernel style
riscv: cpu: nx25: Rename as ax25
board: nx25-ae250: Rename as ax25-ae350
configs: nx25-ae250:Rename as ax25-ae350
doc: ae250: Rename as ae350
configs: ax25-ae350: Set 64-bit as default configuration
spi: atcspi200: Fix compiler warning
net: ftmac100: Fix compiler warning
riscv: dts: Sync DT with Linux Kernel
mmc: ftsdc010_mci: Sync compatible with DT mmc node
configs: ax25-ae350: Support cfi flash
riscv: dts: Support cfi flash
board: ax25-ae350: Support cfi flash
mtd: ftsmc020: Drop unsed code
arch/riscv/Kconfig | 6 ++--
arch/riscv/config.mk | 7 +++-
arch/riscv/cpu/{nx25 => ax25}/Makefile | 0
arch/riscv/cpu/{nx25 => ax25}/cpu.c | 2 +-
arch/riscv/cpu/{nx25 => ax25}/start.S| 0
arch/riscv/cpu/{nx25 => ax25}/u-boot.lds | 18
+-
arch/riscv/dts/Makefile | 2 +-
arch/riscv/dts/ae250.dts | 97
---
arch/riscv/dts/ae350.dts | 149
++
arch/riscv/include/asm/mach-types.h | 10
+++---
arch/riscv/include/asm/setjmp.h | 25
++
arch/riscv/include/asm/u-boot-riscv.h| 1 +
arch/riscv/lib/Makefile | 12
+++
arch/riscv/lib/bootm.c | 4 +++
arch/riscv/lib/crt0_riscv_efi.S | 151
arch/riscv/lib/elf_riscv32_efi.lds | 71
++
arch/riscv/lib/elf_riscv64_efi.lds | 71
++
arch/riscv/lib/reloc_riscv_efi.c | 98
arch/riscv/lib/setjmp.S | 65
+++
board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig | 10
+++---
board/AndesTech/ax25-ae350/MAINTAINERS | 6
board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile | 2 +-
board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} | 36
++-
board/AndesTech/nx25-ae250/MAINTAINERS | 6
cmd/Kconfig | 2 +-
configs/{nx25-ae250_defconfig => ax25-ae350_defconfig} | 11
--
doc/{README.NX25 => README.AX25} | 2 +-
doc/{README.ae250 => README.ae350} | 34
+-
drivers/mmc/ftsdc010_mci.c | 2 +-
drivers/mtd/Makefile | 1 -
drivers/mtd/ftsmc020.c | 37
drivers/net/ftmac100.c | 14
drivers/spi/atcspi200_spi.c | 6 ++--
include/config_distro_bootcmd.h | 11
++
include/configs/{nx25-ae250.h => ax25-ae350.h} | 55
+
include/efi_loader.h | 7
lib/efi_loader/Kconfig | 2 +-
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-riscv into your tree. Thanks! The following changes since commit 81cf7c8d45935a295991fe2cd1df286f0f47511f: Merge git://git.denx.de/u-boot-ubi (2018-03-25 12:02:13 -0400) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to d58717e42559189a226ea800173147399c8edef9: riscv: ae250: Support DT provided by the board at runtime (2018-03-30 13:13:56 +0800) Rick Chen (20): riscv: checkpatch: Fix Macro argument reuse riscv: checkpatch: Fix use of volatile riscv: checkpatch: Fix alignment should match open parenthesis riscv: checkpatch: Fix missing a blank line after declarations riscv: checkpatch: Fix static const char * array declarations riscv: bootm: Support to boot riscv-linux riscv: bootm: Remove ATAGS tools: mkimage: Support RISC-V arch doc: ae250: Describe riscv-linux booting via u-boot mmc: ftsdc010: Support High-Speed mode riscv: dts: AE250 support sd High-Speed mode nds32: dts: AG101P support sd High-Speed mode mmc: ftsdc010: Drop non-dm code board: Drop ftsdc010 non-dm code Drop CONFIG_FTSDC010_BASE Drop CONFIG_FTSDC010_NUMBER mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig mmc: ftsdc010: Merge nds32_mmc to ftsdc010 configs: Drop CONFIG_MMC_NDS32 riscv: ae250: Support DT provided by the board at runtime arch/nds32/dts/ag101p.dts | 1 + arch/nds32/include/asm/arch-ae3xx/ae3xx.h | 2 - arch/nds32/include/asm/arch-ag101/ag101.h | 2 - arch/nds32/include/asm/arch-ag102/ag102.h | 2 - arch/riscv/cpu/nx25/start.S | 2 + arch/riscv/dts/ae250.dts | 1 + arch/riscv/include/asm/bootm.h| 49 arch/riscv/include/asm/encoding.h | 16 +--- arch/riscv/include/asm/global_data.h | 2 +- arch/riscv/include/asm/io.h | 23 +--- arch/riscv/include/asm/posix_types.h | 12 -- arch/riscv/include/asm/ptrace.h | 9 ++--- arch/riscv/include/asm/setup.h| 10 +++-- arch/riscv/include/asm/string.h | 12 -- arch/riscv/lib/bootm.c| 185 +++--- arch/riscv/lib/interrupts.c | 2 +- board/AndesTech/adp-ae3xx/adp-ae3xx.c | 11 -- board/AndesTech/adp-ag101p/adp-ag101p.c | 11 -- board/AndesTech/nx25-ae250/nx25-ae250.c | 14 +++ common/image.c| 1 + configs/adp-ae3xx_defconfig | 2 +- configs/adp-ag101p_defconfig | 2 +- configs/nx25-ae250_defconfig | 3 +- doc/README.ae250 | 148 +--- drivers/mmc/Kconfig | 14 +++ drivers/mmc/Makefile | 1 - drivers/mmc/ftsdc010_mci.c| 219 +-- drivers/mmc/ftsdc010_mci.h| 15 drivers/mmc/nds32_mmc.c | 136 -- include/configs/adp-ae3xx.h | 6 --- include/configs/adp-ag101p.h | 6 --- include/configs/nx25-ae250.h | 18 ++--- scripts/config_whitelist.txt | 4 -- 33 files changed, 347 insertions(+), 594 deletions(-) delete mode 100644 drivers/mmc/nds32_mmc.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom,
Please pull the following patch from u-boot-nds32 into your tree.
Thanks!
The following changes since commit b06c46de632c55f4c39d404c6f0f65e414b31050:
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze
(2017-11-29 08:26:07 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-nds32.git
for you to fetch changes up to 872cd42e706983b2efa928ec038f1f80d5eb5e87:
dt-bindings: spi: Add andestech atcspi200 spi binding doc (2017-11-30
09:45:29 +0800)
Rick Chen (9):
ae3xx: timer: Fix ae3xx timer work abnormal in 64 bit.
ae3xx: timer: Rename AE3XX to ATCPIT100
cosmetic: atcpit100_timer: Rename function name as atcpit100
cosmetic: atcpit100_timer: Use device api to get platdata
dt-bindings: timer: Add andestech atcpit100 timer
atcpit100: timer: Remove arch dependency.
spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
cosmetic: atcspi200: Rename function name as atcspi200
dt-bindings: spi: Add andestech atcspi200 spi binding doc
configs/adp-ae3xx_defconfig|4 +-
doc/device-tree-bindings/spi/spi-atcspi200.txt | 37
doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 +++
drivers/spi/Kconfig| 10 +-
drivers/spi/Makefile |2 +-
drivers/spi/{nds_ae3xx_spi.c => atcspi200_spi.c} | 96 ++--
drivers/timer/Kconfig |9 +-
drivers/timer/Makefile |2 +-
drivers/timer/{ae3xx_timer.c => atcpit100_timer.c} | 38
9 files changed, 149 insertions(+), 80 deletions(-)
create mode 100644 doc/device-tree-bindings/spi/spi-atcspi200.txt
create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt
rename drivers/spi/{nds_ae3xx_spi.c => atcspi200_spi.c} (80%)
rename drivers/timer/{ae3xx_timer.c => atcpit100_timer.c} (67%)
warn: No branch of git://git.denx.de/u-boot-nds32.git is at:
warn: 872cd42: dt-bindings: spi: Add andestech atcspi200 spi binding doc
___
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[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 6e9b109aa9bcdd094e77da9fb03de8b44da8eb9d: Merge git://git.denx.de/u-boot-usb (2017-09-27 09:39:48 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to 9c7ffc94dce3d7438a19576a833d96956ca7f3eb: nds32: Fix io.h warning message about readb (2017-09-28 13:16:54 +0800) rick (1): nds32: Fix io.h warning message about readb arch/nds32/include/asm/io.h | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit e884656c2c0b2406b9bf99ea76f5a8c75128a331: Merge git://www.denx.de/git/u-boot-imx (2017-09-20 12:32:34 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to 7155cd2e6e7824ab60fbfc755d546d45b1d15e7b: nds32: spi: Support spi dm driver. (2017-09-21 10:30:22 +0800) rick (8): nds32: board: Fix andestech adp-ae3xx.c make fail problem. nds32: bootm: Fix warning of struct tag_serialnr declared nds32: ftmac100: support cache enable. nds32: ftmac100 support cache enable. nds32: ftmac100: Fix write mac addr fail problem. nds32: mtd: add spi flash id MX25U16335E. nds32: board: Support SPI driver. nds32: spi: Support spi dm driver. arch/nds32/cpu/n1213/start.S | 29 +- arch/nds32/dts/ae3xx.dts | 23 ++ arch/nds32/include/asm/bootm.h|2 + arch/nds32/include/asm/io.h | 21 ++ arch/nds32/lib/bootm.c|1 - board/AndesTech/adp-ae3xx/adp-ae3xx.c |1 + configs/adp-ae3xx_defconfig | 10 +- drivers/mtd/spi/spi_flash_ids.c |1 + drivers/net/ftmac100.c| 12 +- drivers/spi/Kconfig |7 + drivers/spi/Makefile |1 + drivers/spi/nds_ae3xx_spi.c | 499 + include/configs/adp-ae3xx.h | 18 +- include/configs/adp-ag101p.h |3 +- 14 files changed, 615 insertions(+), 13 deletions(-) create mode 100644 drivers/spi/nds_ae3xx_spi.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 8a33cb8b6bdf8a35f931fcc3d8aa15254cfc4b23: Merge git://git.denx.de/u-boot-fsl-qoriq (2017-09-12 12:02:50 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to 2d7417f517d734b53b6f1906d9b28cdcaf0cb7eb: nds32: bootm: Fix warning of struct tag_serialnr declared (2017-09-13 09:20:52 +0800) rick (2): nds32: board: Fix andestech adp-ae3xx.c make fail problem. nds32: bootm: Fix warning of struct tag_serialnr declared arch/nds32/include/asm/bootm.h|2 ++ arch/nds32/lib/bootm.c|1 - board/AndesTech/adp-ae3xx/adp-ae3xx.c |1 + 3 files changed, 3 insertions(+), 1 deletion(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278: Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30 14:07:23 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to 4099090fd0ed9c03d6b90c1382921e7184946878: nds32: board: Support ftsdc010 DM. (2017-06-01 09:11:19 +0800) rick (3): nds32: mmc: Support ftsdc010 DM. nds32: dts: Support ftsdc010 DM. nds32: board: Support ftsdc010 DM. arch/nds32/dts/ae3xx.dts|8 ++ arch/nds32/dts/ag101p.dts |8 ++ board/AndesTech/adp-ae3xx/adp-ae3xx.c |4 +- board/AndesTech/adp-ag101p/adp-ag101p.c |7 +- configs/adp-ae3xx_defconfig |5 ++ configs/adp-ag101p_defconfig|5 ++ drivers/mmc/Kconfig | 12 +++ drivers/mmc/Makefile|1 + drivers/mmc/ftsdc010_mci.c | 140 --- drivers/mmc/ftsdc010_mci.h | 54 drivers/mmc/nds32_mmc.c | 139 ++ include/configs/adp-ae3xx.h |1 - include/configs/adp-ag101p.h|1 - 13 files changed, 344 insertions(+), 41 deletions(-) create mode 100644 drivers/mmc/ftsdc010_mci.h create mode 100644 drivers/mmc/nds32_mmc.c ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit be71a179bdd935336fb0bee8283be729144ac965: nds32: eth: Support ftmac100 DM. (2017-05-23 13:48:27 +0800) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to be71a179bdd935336fb0bee8283be729144ac965: nds32: eth: Support ftmac100 DM. (2017-05-23 13:48:27 +0800) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 9ae0e14350758e6447c90615ff4df530549a45e2: Merge git://www.denx.de/git/u-boot-marvell (2016-12-01 09:24:02 -0500) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to 07ce9147e919be25d8928e54b4cd23460ff44a7f: nds32: Support eth DM. (2016-12-02 14:46:15 +0800) rick (6): nds32: Support serial DM. nds32: Support timer DM. nds32: mmc: Support mmc DM. nds32: mmc: Support mmc DM. nds32: mmc: Support mmc DM. nds32: Support eth DM. arch/Kconfig|1 + arch/nds32/cpu/n1213/ag101/timer.c |3 +- arch/nds32/cpu/n1213/start.S| 13 +- arch/nds32/dts/Makefile | 14 ++ arch/nds32/dts/ag101p.dts | 71 arch/nds32/include/asm/config.h |1 + board/AndesTech/adp-ag101p/adp-ag101p.c |7 +- configs/adp-ag101p_defconfig| 14 ++ drivers/mmc/Kconfig |7 + drivers/mmc/Makefile|1 + drivers/mmc/ftsdc010_mci.c | 106 +--- drivers/mmc/nds32_mmc.c | 140 +++ drivers/net/Kconfig |5 + drivers/net/ftmac100.c | 281 +-- drivers/timer/Kconfig |6 + drivers/timer/Makefile |1 + drivers/timer/ag101p_timer.c| 122 ++ include/configs/adp-ag101p.h| 14 +- include/faraday/ftsdc010.h | 41 + 19 files changed, 752 insertions(+), 96 deletions(-) create mode 100644 arch/nds32/dts/Makefile create mode 100644 arch/nds32/dts/ag101p.dts create mode 100644 drivers/mmc/nds32_mmc.c create mode 100644 drivers/timer/ag101p_timer.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nds32: Support mmc DM.
Hi Jaehoon,
I will split it to three pars.
And thank you for remind and review.
Any comment please tell me to improve.
Best Regards,
Rick CHen
從: Jaehoon Chung [jh80.ch...@samsung.com]
寄件日期: 2016年12月1日 下午 12:20
至: Open Source Project uboot; u-boot@lists.denx.de; w...@denx.de; d...@denx.de
主旨: Re: [U-Boot] [PATCH] nds32: Support mmc DM.
Hi,
On 12/01/2016 11:06 AM, Andes wrote:
> From: rick <r...@andestech.com>
>
> Add Andestech mmc DM driver for ag101p board.
> Do not use get_timer() to check mmc state can
> improve throughput performance.
>
> Signed-off-by: rick <r...@andestech.com>
> Cc: Andes <ub...@andestech.com>
I think that it can be split the some patches.
(devicetree, mmc side and board side)
Could you send the patches after splitting? After that, i will review mmc side.
Best Regards,
Jaehoon Chung
> ---
> arch/nds32/dts/ag101p.dts |8 ++
> board/AndesTech/adp-ag101p/adp-ag101p.c |2 +
> configs/adp-ag101p_defconfig|4 +
> drivers/mmc/Kconfig |7 ++
> drivers/mmc/Makefile|1 +
> drivers/mmc/ftsdc010_mci.c | 104 +--
> drivers/mmc/nds32_mmc.c | 138
> +++
> include/faraday/ftsdc010.h | 40 +
> 8 files changed, 277 insertions(+), 27 deletions(-)
> create mode 100644 drivers/mmc/nds32_mmc.c
>
> diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts
> index 8099665..c87d0bd 100644
> --- a/arch/nds32/dts/ag101p.dts
> +++ b/arch/nds32/dts/ag101p.dts
> @@ -59,4 +59,12 @@
> reg = <0x9090 0x1000>;
> interrupts = <25 4>;
> };
> +
> + mmc0: mmc@98e0 {
> + compatible = "andestech,atsdc010";
> + clock-freq-min-max = <40 3000>;
> + fifo-depth = <0x10>;
> + reg = <0x98e0 0x1000>;
> + interrupts = <5 4>;
> + };
> };
> diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c
> b/board/AndesTech/adp-ag101p/adp-ag101p.c
> index 84c77f7..dbeb662 100644
> --- a/board/AndesTech/adp-ag101p/adp-ag101p.c
> +++ b/board/AndesTech/adp-ag101p/adp-ag101p.c
> @@ -76,6 +76,8 @@ ulong board_flash_get_legacy(ulong base, int banknum,
> flash_info_t *info)
>
> int board_mmc_init(bd_t *bis)
> {
> +#ifndef CONFIG_DM_MMC
> ftsdc010_mmc_init(0);
> +#endif
> return 0;
> }
> diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig
> index 8c2fc0b..f22a85b 100644
> --- a/configs/adp-ag101p_defconfig
> +++ b/configs/adp-ag101p_defconfig
> @@ -12,6 +12,10 @@ CONFIG_CMD_EXT2=y
> CONFIG_CMD_FAT=y
> CONFIG_OF_CONTROL=y
> CONFIG_DM=y
> +CONFIG_BLK=y
> +CONFIG_DM_MMC=y
> +CONFIG_DM_MMC_OPS=y
> +CONFIG_NDS32_MMC=y
> CONFIG_DM_SERIAL=y
> CONFIG_SYS_NS16550=y
> CONFIG_TIMER=y
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index ba9a723..e50109d 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -53,6 +53,13 @@ config ROCKCHIP_DWMMC
> SD 3.0, SDIO 3.0 and MMC 4.5 and supports common eMMC chips as well
> as removeable SD and micro-SD cards.
>
> +config NDS32_MMC
> + bool "Andestech SD/MMC controller support"
> + depends on DM_MMC && OF_CONTROL
> + help
> + This enables support for the Andestech SD/MMM controller, which is
> + based on Faraday IP.
> +
> config SH_SDHI
> bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
> depends on RMOBILE
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 18351fb..e81fe58 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -40,6 +40,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
> obj-$(CONFIG_X86) += pci_mmc.o
> obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
> obj-$(CONFIG_ROCKCHIP_DWMMC) += rockchip_dw_mmc.o
> +obj-$(CONFIG_NDS32_MMC) += nds32_mmc.o
> obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
> obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
> obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
> diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
> index e88c632..7ba4f39 100644
> --- a/drivers/mmc/ftsdc010_mci.c
> +++ b/drivers/mmc/ftsdc010_mci.c
> @@ -11,7 +11,6 @@
> #include
> #include
> #include
> -
> #include
> #include
> #include
> @@ -20,16 +19,6 @@
> #define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 4) /* 250 ms */
> #define CFG_RST_TIMEOUT CONFIG_SYS_HZ /* 1 sec reset timeout */
>
> -struct ftsdc010_chip {
> - void __iomem *regs
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 06572f0301c18e63b887efc91803bb9467e55dbe: Merge git://www.denx.de/git/u-boot-ppc4xx (2016-09-27 12:48:18 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to d607f6fa99a67dd1b40c08ba21ca6f3aaff933ce: nds32: Support relocation. (2016-09-29 15:38:10 +0800) rick (1): nds32: Support relocation. arch/nds32/config.mk |2 +- arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 13 ++- arch/nds32/cpu/n1213/start.S | 120 +++- arch/nds32/cpu/n1213/u-boot.lds| 13 +-- arch/nds32/include/asm/config.h|2 - include/configs/adp-ag101p.h |1 - 6 files changed, 77 insertions(+), 74 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 077678eb0c226e52a1f90edabd3369ab26065b32: Merge git://git.denx.de/u-boot-dm (2016-01-12 18:12:42 -0500) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to b19cc6bf2160e09607e141fe0fc571701070d1d6: nds32: Fix compile error. (2016-01-21 10:41:43 +0800) rick (1): nds32: Fix compile error. arch/nds32/cpu/n1213/start.S |2 +- arch/nds32/include/asm/macro.h | 22 +++--- arch/nds32/include/asm/posix_types.h |4 3 files changed, 16 insertions(+), 12 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 077678eb0c226e52a1f90edabd3369ab26065b32: Merge git://git.denx.de/u-boot-dm (2016-01-12 18:12:42 -0500) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to b19cc6bf2160e09607e141fe0fc571701070d1d6: nds32: Fix compile error. (2016-01-21 10:41:43 +0800) rick (1): nds32: Fix compile error. arch/nds32/cpu/n1213/start.S |2 +- arch/nds32/include/asm/macro.h | 22 +++--- arch/nds32/include/asm/posix_types.h |4 3 files changed, 16 insertions(+), 12 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Uboot send pull request
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit d05bfd0586ccebe96e31976459c8ef45ec65e109: Merge branch 'master' of git://git.denx.de/u-boot-i2c (2013-08-06 09:49:06 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master Andes (1): nds32: Change of NDS32 Custodian ken kuo (2): nds32: introduce DMA allocation API nds32: fix the missing COBJS-y change MAINTAINERS |2 +- arch/nds32/include/asm/dma-mapping.h | 33 + board/AndesTech/adp-ag102/Makefile |2 +- 3 files changed, 35 insertions(+), 2 deletions(-) create mode 100644 arch/nds32/include/asm/dma-mapping.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Sorry for the mistake of sending Uboot send pull request
Hi Tom, Sorry for the mistake of sending mail of Uboot send pull request. Please forget and ignore this mail. Following is the content of previous Uboot send pull request mail: = Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit d05bfd0586ccebe96e31976459c8ef45ec65e109: Merge branch 'master' of git://git.denx.de/u-boot-i2c (2013-08-06 09:49:06 -0400) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master Andes (1): nds32: Change of NDS32 Custodian ken kuo (2): nds32: introduce DMA allocation API nds32: fix the missing COBJS-y change MAINTAINERS |2 +- arch/nds32/include/asm/dma-mapping.h | 33 + board/AndesTech/adp-ag102/Makefile |2 +- 3 files changed, 35 insertions(+), 2 deletions(-) create mode 100644 arch/nds32/include/asm/dma-mapping.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-nds32
Hi Tom, Please pull the following patch from u-boot-nds32 into your tree. Thanks! The following changes since commit 0876703cf2ee107372b56037d4eeeb7604c56796: boards.cfg: Keep the entries sorted (2014-01-27 08:28:35 -0500) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master for you to fetch changes up to f889cc81c1572f4af0be950fd49bb6b67bc580fb: nds32: add support for leopard and orca board boot flow auto detect (2014-01-28 19:23:01 +0800) rick (1): nds32: add support for leopard and orca board boot flow auto detect arch/nds32/cpu/n1213/ag101/asm-offsets.c |1 + arch/nds32/cpu/n1213/ag101/lowlevel_init.S | 88 ++- 2 files changed, 85 insertions(+), 4 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nds32: Enable FPU if the version of CPU supported
Hi Kuan-Yu Kuo, 2013/7/18 Kuan-Yu Kuo ken.ku...@gmail.com: + /* +* enable_fpu: +* Some of Andes CPU version support FPU coprocessor, if so, +* we should enable it. +*/ +enable_fpu: + mfsr$r0, $CPU_VER /* enable FPU if it exists */ + srli$r0, $r0, 3 + andi$r0, $r0, 1 + beqz$r0, 1f /* skip if no COP */ + mfsr$r0, $FUCOP_EXIST + srli$r0, $r0, 31 + beqz$r0, 1f /* skip if no FPU */ + mfsr$r0, $FUCOP_CTL + ori $r0, $r0, 1 + mtsr$r0, $FUCOP_CTL There are two kinds of toolchain in Andes architecture, one is FPU supported and the other is not, for the latter one, there is no need to enable FPU even if the processor supports it. This code snippet only useful for the toolchain that will generate FPU instructions, so add compile option to determine Andes predefined macros would be better. For example: #if defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP) Andes Technology Corporation ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/5] Resync libfdt with dtc upstream
From: Gerald Van Baren vanba...@cideas.com The following patchset resynchronizes the u-boot libfdt files with the upstream dtc updates plus one minor u-boot cleanup. Cleanup: Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h * That was placed in the wrong .h file. My bad. :-/ Trivia: I picked up Justin Sobata's patch to apply a copyright notice only to the fdt.h file, not the libfdt_env.h file (I kept the full subject line so that it will be easier to match up dtc vs. u-boot patchsets in the future). The libfdt_env.h file is for application customizations... I wrote the original libfdt_env.h file and included a copyright notice. François Revol (1): Fix typo Gerald Van Baren (1): Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h Justin Sobota (1): Added license header to dtc/libfdt/fdt.h and libfdt_env.h Simon Glass (2): Export fdt_stringlist_contains() libfdt: Add fdt_next_subnode() to permit easy subnode iteration include/fdt.h| 53 -- include/libfdt.h | 38 +++- include/libfdt_env.h |3 +++ lib/libfdt/fdt.c | 28 ++ lib/libfdt/fdt_ro.c |5 ++--- 5 files changed, 121 insertions(+), 6 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/5] Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h
From: Gerald Van Baren g...@unssw.com
The define should not have been put in fdt.h originally, libfdt_env.h
is the proper place for target-specific customizations.
Signed-off-by: Gerald Van Baren vanba...@cideas.com
---
include/fdt.h|2 --
include/libfdt_env.h |3 +++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/fdt.h b/include/fdt.h
index 488343c..526aedb 100644
--- a/include/fdt.h
+++ b/include/fdt.h
@@ -108,6 +108,4 @@ struct fdt_property {
#define FDT_V16_SIZE FDT_V3_SIZE
#define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(fdt32_t))
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD 0x80
#endif /* _FDT_H */
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index 3e3defc..0821258 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -35,4 +35,7 @@ typedef __be64 fdt64_t;
#define fdt64_to_cpu(x)be64_to_cpu(x)
#define cpu_to_fdt64(x)cpu_to_be64(x)
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD 0x80
+
#endif /* _LIBFDT_ENV_H */
--
1.7.9.5
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[U-Boot] [PATCH 4/5] libfdt: Add fdt_next_subnode() to permit easy subnode iteration
From: Simon Glass s...@chromium.org
Iterating through subnodes with libfdt is a little painful to write as we
need something like this:
for (depth = 0, count = 0,
offset = fdt_next_node(fdt, parent_offset, depth);
(offset = 0) (depth 0);
offset = fdt_next_node(fdt, offset, depth)) {
if (depth == 1) {
/* code body */
}
}
Using fdt_next_subnode() we can instead write this, which is shorter and
easier to get right:
for (offset = fdt_first_subnode(fdt, parent_offset);
offset = 0;
offset = fdt_next_subnode(fdt, offset)) {
/* code body */
}
Also, it doesn't require two levels of indentation for the loop body.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: David Gibson da...@gibson.dropbear.id.au
---
include/libfdt.h | 22 ++
lib/libfdt/fdt.c | 28
2 files changed, 50 insertions(+)
diff --git a/include/libfdt.h b/include/libfdt.h
index 7403d5a..c5ec2ac 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -136,6 +136,28 @@ uint32_t fdt_next_tag(const void *fdt, int offset, int
*nextoffset);
int fdt_next_node(const void *fdt, int offset, int *depth);
+/**
+ * fdt_first_subnode() - get offset of first direct subnode
+ *
+ * @fdt: FDT blob
+ * @offset:Offset of node to check
+ * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+ */
+int fdt_first_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_next_subnode() - get offset of next direct subnode
+ *
+ * After first calling fdt_first_subnode(), call this function repeatedly to
+ * get direct subnodes of a parent node.
+ *
+ * @fdt: FDT blob
+ * @offset:Offset of previous subnode
+ * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
+ * subnodes
+ */
+int fdt_next_subnode(const void *fdt, int offset);
+
/**/
/* General functions */
/**/
diff --git a/lib/libfdt/fdt.c b/lib/libfdt/fdt.c
index 387e354..154e9a4 100644
--- a/lib/libfdt/fdt.c
+++ b/lib/libfdt/fdt.c
@@ -202,6 +202,34 @@ int fdt_next_node(const void *fdt, int offset, int *depth)
return offset;
}
+int fdt_first_subnode(const void *fdt, int offset)
+{
+ int depth = 0;
+
+ offset = fdt_next_node(fdt, offset, depth);
+ if (offset 0 || depth != 1)
+ return -FDT_ERR_NOTFOUND;
+
+ return offset;
+}
+
+int fdt_next_subnode(const void *fdt, int offset)
+{
+ int depth = 1;
+
+ /*
+* With respect to the parent, the depth of the next subnode will be
+* the same as the last.
+*/
+ do {
+ offset = fdt_next_node(fdt, offset, depth);
+ if (offset 0 || depth 1)
+ return -FDT_ERR_NOTFOUND;
+ } while (depth 1);
+
+ return offset;
+}
+
const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
{
int len = strlen(s) + 1;
--
1.7.9.5
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[U-Boot] [PATCH 1/5] Export fdt_stringlist_contains()
From: Simon Glass s...@chromium.org
This function is useful outside libfdt, so export it.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: David Gibson da...@gibson.dropbear.id.au
---
include/libfdt.h| 14 ++
lib/libfdt/fdt_ro.c |5 ++---
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/include/libfdt.h b/include/libfdt.h
index fc7f75b..b153cc3 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -816,6 +816,20 @@ int fdt_node_check_compatible(const void *fdt, int
nodeoffset,
int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
const char *compatible);
+/**
+ * fdt_stringlist_contains - check a string list property for a string
+ * @strlist: Property containing a list of strings to check
+ * @listlen: Length of property
+ * @str: String to search for
+ *
+ * This is a utility function provided for convenience. The list contains
+ * one or more strings, each terminated by \0, as is found in a device tree
+ * compatible property.
+ *
+ * @return: 1 if the string is found in the list, 0 not found, or invalid list
+ */
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
+
/**/
/* Write-in-place functions */
/**/
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 1a461c3..b65f4e2 100644
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -519,8 +519,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t
phandle)
return offset; /* error from fdt_next_node() */
}
-static int _fdt_stringlist_contains(const char *strlist, int listlen,
- const char *str)
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
{
int len = strlen(str);
const char *p;
@@ -546,7 +545,7 @@ int fdt_node_check_compatible(const void *fdt, int
nodeoffset,
prop = fdt_getprop(fdt, nodeoffset, compatible, len);
if (!prop)
return len;
- if (_fdt_stringlist_contains(prop, len, compatible))
+ if (fdt_stringlist_contains(prop, len, compatible))
return 0;
else
return 1;
--
1.7.9.5
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[U-Boot] [PATCH 3/5] Added license header to dtc/libfdt/fdt.h and libfdt_env.h
From: Justin Sobota jsob...@ti.com This commit adds a license header to fdt.h and libfdt_env.h because the license was omitted. U-Boot note: the u-boot libfdt_env.h header portion was not applied to the u-boot libfdt_env.h because that file was created by Gerald Van Baren (with a license header). - gvb Signed-off-by: Justin Sobota jsob...@ti.com Acked-by: David Gibson da...@gibson.dropbear.id.au Signed-off-by: Gerald Van Baren vanba...@cideas.com --- include/fdt.h | 51 +++ 1 file changed, 51 insertions(+) diff --git a/include/fdt.h b/include/fdt.h index f9612ed..488343c 100644 --- a/include/fdt.h +++ b/include/fdt.h @@ -1,5 +1,56 @@ #ifndef _FDT_H #define _FDT_H +/* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2006 David Gibson, IBM Corporation. + * Copyright 2012 Kim Phillips, Freescale Semiconductor. + * + * libfdt is dual licensed: you can use it either under the terms of + * the GPL, or the BSD license, at your option. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Alternatively, + * + * b) Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * 1. Redistributions of source code must retain the above + *copyright notice, this list of conditions and the following + *disclaimer. + * 2. Redistributions in binary form must reproduce the above + *copyright notice, this list of conditions and the following + *disclaimer in the documentation and/or other materials + *provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS AS IS AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #ifndef __ASSEMBLY__ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5] Fix typo
From: François Revol re...@free.fr Signed-off-by: François Revol re...@free.fr --- include/libfdt.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/libfdt.h b/include/libfdt.h index b153cc3..7403d5a 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -582,7 +582,7 @@ const char *fdt_get_alias_namelen(const void *fdt, * value of the property named 'name' in the node /aliases. * * returns: - * a pointer to the expansion of the alias named 'name', of it exists + * a pointer to the expansion of the alias named 'name', if it exists * NULL, if the given alias or the /aliases node does not exist */ const char *fdt_get_alias(const void *fdt, const char *name); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fix IDE_BUS(dev) macro
Hi Tom, Albert, Prafulla and others, On Tue, Apr 17, 2012 at 09:06:49PM +0200, Luka Perkov wrote: IDE_BUS assumes that each bus has two devices and thus returns the first bus even when the second one should be probed. Signed-off-by: Simon Baatz gmbno...@gmail.com Tested-by: Luka Perkov ub...@lukaperkov.net --- Simon discovered this while adding support for new board IB NAS6210. More info can be found here: http://lists.denx.de/pipermail/u-boot/2012-April/122525.html When this is commited I will do a coding style cleanup. There are tabs after few #define parts in include/ide.h. include/ide.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/ide.h b/include/ide.h index 8ecc9dd..385e909 100644 --- a/include/ide.h +++ b/include/ide.h @@ -24,7 +24,7 @@ #ifndef _IDE_H #define _IDE_H -#define IDE_BUS(dev)(dev 1) +#define IDE_BUS(dev) (dev / (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS)) #define ATA_CURR_BASE(dev) (CONFIG_SYS_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)]) I have assigned this patch to Tom in patchwork here: http://patchwork.ozlabs.org/patch/159129/ From when it was submitted we have got confirmations that this patch does the job for kirkwood boards on the u-boot mailing list: http://lists.denx.de/pipermail/u-boot/2012-April/122684.html http://lists.denx.de/pipermail/u-boot/2012-June/125658.html It would be nice if this patch would enter v2012.10 release. At least someone could pull it into his repo so it can find it's way into master eventually. Regards, Luka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/5] tools/env: Serialize calls to fw_*env
On Wed, Oct 03, 2012 at 02:38:49PM -0500, Joe Hershberger wrote: Use a lock file at /var/lock/fw_printenv.lock. Avoids seriously confusing the MTD driver. Signed-off-by: Joe Hershberger joe.hershber...@ni.com --- tools/env/fw_env_main.c | 59 +++-- 1 file changed, 37 insertions(+), 22 deletions(-) I thing we should document usage and location of lock file in tools/env/README. Luka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
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[U-Boot] [PATCH 6/7] libfdt: Implement fdt_get_property_namelen() and fdt_getprop_namelen()
From: David Gibson [EMAIL PROTECTED]
As well as fdt_subnode_offset(), libfdt includes an
fdt_subnode_offset_namelen() function that takes the subnode name to
look up not as a NUL-terminated string, but as a string with an
explicit length. This can be useful when the caller has the name as
part of a longer string, such as a full path.
However, we don't have corresponding 'namelen' versions for
fdt_get_property() and fdt_getprop(). There are less obvious use
cases for these variants on property names, but there are
circumstances where they can be useful e.g. looking up property names
which need to be parsed from a longer string buffer such as user input
or a configuration file, or looking up an alias in a path with
IEEE1275 style aliases.
So, since it's very easy to implement such variants, this patch does
so. The original NUL-terminated variants are, of course, implemented
in terms of the namelen versions.
Signed-off-by: David Gibson [EMAIL PROTECTED]
---
include/libfdt.h | 30 ++
libfdt/fdt_ro.c | 37 ++---
2 files changed, 60 insertions(+), 7 deletions(-)
diff --git a/include/libfdt.h b/include/libfdt.h
index 0747981..94c35e3 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -343,6 +343,22 @@ int fdt_path_offset(const void *fdt, const char *path);
const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
/**
+ * fdt_get_property_namelen - find a property based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_get_property_namelen(), but only examine the first
+ * namelen characters of name for matching the property name.
+ */
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+ int nodeoffset,
+ const char *name,
+ int namelen, int *lenp);
+
+/**
* fdt_get_property - find a given property in a given node
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to find
@@ -380,6 +396,20 @@ static inline struct fdt_property *fdt_get_property_w(void
*fdt, int nodeoffset,
}
/**
+ * fdt_getprop_namelen - get property value based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_getprop(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+ const char *name, int namelen, int *lenp);
+
+/**
* fdt_getprop - retrieve the value of a given property
* @fdt: pointer to the device tree blob
* @nodeoffset: offset of the node whose property to find
diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index 6292a00..d566eba 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -84,6 +84,14 @@ const char *fdt_string(const void *fdt, int stroffset)
return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
}
+static int _fdt_string_eq(const void *fdt, int stroffset,
+ const char *s, int len)
+{
+ const char *p = fdt_string(fdt, stroffset);
+
+ return (strlen(p) == len) (memcmp(p, s, len) == 0);
+}
+
int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
{
FDT_CHECK_HEADER(fdt);
@@ -179,9 +187,10 @@ const char *fdt_get_name(const void *fdt, int nodeoffset,
int *len)
return NULL;
}
-const struct fdt_property *fdt_get_property(const void *fdt,
- int nodeoffset,
- const char *name, int *lenp)
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+ int nodeoffset,
+ const char *name,
+ int namelen, int *lenp)
{
uint32_t tag;
const struct fdt_property *prop;
@@ -214,7 +223,7 @@ const struct fdt_property *fdt_get_property(const void *fdt,
if (! prop)
goto fail;
namestroff = fdt32_to_cpu(prop-nameoff);
- if (strcmp(fdt_string(fdt, namestroff), name) == 0) {
+ if (_fdt_string_eq(fdt, namestroff, name, namelen)) {
/* Found it! */
int len =
[U-Boot] [PATCH 0/7] libfdt: Update to resync with dtc/libfdt
The following changesets resynchronize u-boot with the master libfdt. Best regards, gvb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/7] libfdt: Increase namespace-pollution paranoia
From: David Gibson [EMAIL PROTECTED]
libfdt is supposed to easy to embed in projects all and sundry.
Often, it won't be practical to separate the embedded libfdt's
namespace from that of the surrounding project. Which means there can
be namespace conflicts between even libfdt's internal/static functions
and functions or macros coming from the surrounding project's headers
via libfdt_env.h.
This patch, therefore, renames a bunch of libfdt internal functions
and macros and makes a few other chances to reduce the chances of
namespace collisions with embedding projects. Specifically:
- Internal functions (even static ones) are now named _fdt_*()
- The type and (static) global for the error table in
fdt_strerror() gain an fdt_ prefix
- The unused macro PALIGN is removed
- The memeq and streq macros are removed and open-coded in the
users (they were only used once each)
- Other macros gain an FDT_ prefix
- To save some of the bulk from the previous change, an
FDT_TAGALIGN() macro is introduced, where FDT_TAGALIGN(x) ==
FDT_ALIGN(x, FDT_TAGSIZE)
Signed-off-by: David Gibson [EMAIL PROTECTED]
---
libfdt/fdt.c |8 ++--
libfdt/fdt_ro.c | 22
libfdt/fdt_rw.c | 121 +++---
libfdt/fdt_strerror.c| 34 +++---
libfdt/fdt_sw.c | 38 +++---
libfdt/fdt_wip.c |7 ++-
libfdt/libfdt_internal.h | 11 ++---
7 files changed, 119 insertions(+), 122 deletions(-)
diff --git a/libfdt/fdt.c b/libfdt/fdt.c
index 18e8d3c..732103b 100644
--- a/libfdt/fdt.c
+++ b/libfdt/fdt.c
@@ -67,7 +67,7 @@ int fdt_check_header(const void *fdt)
return -FDT_ERR_BADVERSION;
if (fdt_last_comp_version(fdt) FDT_LAST_SUPPORTED_VERSION)
return -FDT_ERR_BADVERSION;
- } else if (fdt_magic(fdt) == SW_MAGIC) {
+ } else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
/* Unfinished sequential-write blob */
if (fdt_size_dt_struct(fdt) == 0)
return -FDT_ERR_BADSTATE;
@@ -128,7 +128,7 @@ uint32_t fdt_next_tag(const void *fdt, int offset, int
*nextoffset)
}
if (nextoffset)
- *nextoffset = ALIGN(offset, FDT_TAGSIZE);
+ *nextoffset = FDT_TAGALIGN(offset);
return tag;
}
@@ -188,14 +188,14 @@ const char *_fdt_find_string(const char *strtab, int
tabsize, const char *s)
const char *p;
for (p = strtab; p = last; p++)
- if (memeq(p, s, len))
+ if (memcmp(p, s, len) == 0)
return p;
return NULL;
}
int fdt_move(const void *fdt, void *buf, int bufsize)
{
- CHECK_HEADER(fdt);
+ FDT_CHECK_HEADER(fdt);
if (fdt_totalsize(fdt) bufsize)
return -FDT_ERR_NOSPACE;
diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index 1c897c5..326d19c 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -59,8 +59,8 @@
#include libfdt_internal.h
-static int nodename_eq(const void *fdt, int offset,
- const char *s, int len)
+static int _fdt_nodename_eq(const void *fdt, int offset,
+ const char *s, int len)
{
const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1);
@@ -86,7 +86,7 @@ const char *fdt_string(const void *fdt, int stroffset)
int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
{
- CHECK_HEADER(fdt);
+ FDT_CHECK_HEADER(fdt);
*address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)-address);
*size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)-size);
return 0;
@@ -106,7 +106,7 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset,
{
int depth;
- CHECK_HEADER(fdt);
+ FDT_CHECK_HEADER(fdt);
for (depth = 0;
offset = 0;
@@ -114,7 +114,7 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset,
if (depth 0)
return -FDT_ERR_NOTFOUND;
else if ((depth == 1)
- nodename_eq(fdt, offset, name, namelen))
+ _fdt_nodename_eq(fdt, offset, name, namelen))
return offset;
}
@@ -133,7 +133,7 @@ int fdt_path_offset(const void *fdt, const char *path)
const char *p = path;
int offset = 0;
- CHECK_HEADER(fdt);
+ FDT_CHECK_HEADER(fdt);
if (*path != '/')
return -FDT_ERR_BADPATH;
@@ -214,7 +214,7 @@ const struct fdt_property *fdt_get_property(const void *fdt,
if (! prop)
goto fail;
namestroff = fdt32_to_cpu(prop-nameoff);
- if (streq(fdt_string(fdt, namestroff), name)) {
+ if (strcmp(fdt_string(fdt, namestroff), name)
