From: Nitin Yadav
Errata doc: https://www.ti.com/lit/pdf/sprz457
Errata ID i2331 CPSW: Device lockup when reading CPSW registers
Details: A device lockup can occur during the second read of any CPSW
subsystem register after any MAIN domain power on reset (POR). A MAIN
domain POR occurs using the hardware MCU_PORz signal, or via software
using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR.
After these resets, the processor and internal bus structures may get
into a state which is only recoverable with full device reset using
MCU_PORz.
Due to this errata, Ethernet boot should not be used on this device.
Workaround(s): To avoid the lockup, a warm reset should be issued after
a MAIN domain POR and before any access to the CPSW registers. The warm
reset realigns internal clocks and prevents the lockup from happening.
Workaround above errata by calling do_reset() in case of cold boot in
order to trigger warm reset. This needs enabling SYSRESET driver in R5
SPL to enable TI SCI reset driver.
Signed-off-by: Nitin Yadav
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/am642_init.c | 33 +
configs/am64x_evm_r5_defconfig | 3 +++
2 files changed, 36 insertions(+)
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index 1bf7e163cc46..093a68b63077 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -22,9 +22,15 @@
#include
#include
#include
+#include
#define CTRLMMR_MCU_RST_CTRL 0x04518170
+#define CTRLMMR_MCU_RST_SRC(MCU_CTRL_MMR0_BASE + 0x18178)
+#define COLD_BOOT 0
+#define SW_POR_MCU BIT(24)
+#define SW_POR_MAINBIT(25)
+
static void ctrl_mmr_unlock(void)
{
/* Unlock all PADCFG_MMR1 module registers */
@@ -166,6 +172,7 @@ void board_init_f(ulong dummy)
#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) ||
defined(CONFIG_ESM_K3)
struct udevice *dev;
int ret;
+ int rst_src;
#endif
#if defined(CONFIG_CPU_V7R)
@@ -210,6 +217,32 @@ void board_init_f(ulong dummy)
k3_mmc_restart_clock);
#endif
+#if defined(CONFIG_CPU_V7R)
+ /*
+* Errata ID i2331 CPSW: A device lockup can occur during the second
+* read of any CPSW subsystem register after any MAIN domain power on
+* reset (POR). A MAIN domain POR occurs using the hardware MCU_PORz
+* signal, or via software using CTRLMMR_RST_CTRL.SW_MAIN_POR or
+* CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR. After these resets, the processor
+* and internal bus structures may get into a state which is only
+* recoverable with full device reset using MCU_PORz.
+* Workaround(s): To avoid the lockup, a warm reset should be issued
+* after a MAIN domain POR and before any access to the CPSW registers.
+* The warm reset realigns internal clocks and prevents the lockup from
+* happening.
+*/
+ ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
+ if (ret)
+ printf("\n%s:uclass device error [%d]\n",__func__,ret);
+
+ rst_src = readl(CTRLMMR_MCU_RST_SRC);
+ if (rst_src == COLD_BOOT || rst_src & (SW_POR_MCU | SW_POR_MAIN)) {
+ printf("Resetting on cold boot to workaround ErrataID:i2331\n");
+ printf("Please resend tiboot3.bin in case of UART/DFU boot\n");
+ do_reset(NULL, 0, 0, NULL);
+ }
+#endif
+
/* Output System Firmware version info */
k3_sysfw_print_ver();
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig
index b75cae6d803e..bb705a1c3ce2 100644
--- a/configs/am64x_evm_r5_defconfig
+++ b/configs/am64x_evm_r5_defconfig
@@ -169,3 +169,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451
CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
--
2.40.0
