RE: [PATCH] riscv: timer: Add support for an early timer
Hi Rick, >-Original Message- >From: Rick Chen >Sent: 10 December 2020 08:36 >To: Pragnesh Patel >Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ; Bin Meng >; Paul Walmsley ( Sifive) ; >Anup Patel ; Sagar Kadam >; Palmer Dabbelt ; rick >; Alan Kao ; Leo Liang > >Subject: Re: [PATCH] riscv: timer: Add support for an early timer > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >Hi Pragnesh > > >> Hi Rick, >> >> [...] >> >> >> >>Following are the configurations, steps and debug logs: >> >> >> >>+++ b/configs/ae350_rv64_defconfig >> >>q+CONFIG_TRACE=y >> >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 >> >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >> >>+CONFIG_CMD_TRACE=y >> >>+CONFIG_TIMER_EARLY=y >> >> >> >>+++ b/configs/ae350_rv64_spl_defconfig >> >>+CONFIG_TRACE=y >> >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 >> >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >> >>+CONFIG_CMD_TRACE=y >> >>+CONFIG_TIMER_EARLY=y >> >> >> >> case 1 >> >>/// >> >>ae350_rv64_defconfig with FTRACE=1, kernel booting is ok >> >> case 1 >> >>/// >> >>make FTRACE=1 ae350_rv64_defconfig >> >>make FTRACE=1 >> >> >> >>/// >> [...] >> >> case 2 >> >>/// >> >>ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail >> >> case 2 >> >>/// >> >>make FTRACE=1 ae350_rv64_spl_defconfig make FTRACE=1 >> >> >> >>/// >> >>/// >> >>/ >> [...] >> >>(hang here) >> > >> >Thanks for the logs. >> > >> >From logs, I can't find where it got stuck. Can you please use gdb to >> >see where it got stuck ? >> > >> >Meanwhile I will give it a try on HiFive Unleashed board. >> >> On HiFive Unleashed it works fine with tracing. >> >> U-Boot 2021.01-rc2-00049-gb2a38d1d0f (Dec 01 2020 - 15:04:41 +0530) >> CPU: rv64imafdc >> Model: SiFive HiFive Unleashed A00 >> DRAM: 8 GiB >> trace: enabled >> MMC: spi@1005:mmc@0: 0 >> Loading Environment from SPIFlash... SF: Detected is25wp256 with page >> size 256 Bytes, erase size 4 KiB, total 32 MiB >> *** Warning - bad CRC, using default environment >> In:serial@1001 >> Out: serial@1001 >> Err: serial@1001 >> Net: eth0: ethernet@1009 >> Hit any key to stop autoboot: 0 >> => >> => trace stats >> 178,750 function sites >> 25,359,991 function calls >> 1 untracked function calls >> 1,278,927 traced function calls (24358307 dropped due to overflow) >> 19 maximum observed call depth >> 15 call depth limit >> 25,238,922 calls not traced due to depth => fatload mmc 0:3 >> 0x8600 hifive-unleashed-a00.dtb >> 7199 bytes read in 27 ms (259.8 KiB/s) => fatload mmc 0:3 0x8400 >> uImage >> 21421212 bytes read in 19496 ms (1 MiB/s) => bootm 0x8400 - >> 0x8600 ## Booting kernel from Legacy Image at 8400 ... >>Image Name: Linux >>Image Type: RISC-V Linux Kernel Image (uncompressed) >>Data Size:21421148 Bytes = 20.4 MiB >>Load Address: 8020 >>Entry Point: 8020 >>Verifying Checksum ... OK >> ## Flattened Device Tree blob at 8600 >>Booting using the fdt blob at 0x8600 >>Loading Kernel Image >>Using Device Tree in place at 8600, end >> 86004c1e Starting kernel ...(fake run for tracing) Starting >> kernel ... >> [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 >> [0.00] Linux version 5.8.0-rc3-16077-g9ebcfadb0610-dirty >(pragneshp@sachinj2-OptiPlex-7010) (riscv64-unknown-linux-gnu-gcc (crosstool- >NG 1.24.0.37-3f461da) 9.2.0,
Re: [PATCH] riscv: timer: Add support for an early timer
Hi Pragnesh > Hi Rick, > > [...] > >> > >>Following are the configurations, steps and debug logs: > >> > >>+++ b/configs/ae350_rv64_defconfig > >>q+CONFIG_TRACE=y > >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 > >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 > >>+CONFIG_CMD_TRACE=y > >>+CONFIG_TIMER_EARLY=y > >> > >>+++ b/configs/ae350_rv64_spl_defconfig > >>+CONFIG_TRACE=y > >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 > >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 > >>+CONFIG_CMD_TRACE=y > >>+CONFIG_TIMER_EARLY=y > >> > >> case 1 > >>/// > >>ae350_rv64_defconfig with FTRACE=1, kernel booting is ok > >> case 1 > >>/// > >>make FTRACE=1 ae350_rv64_defconfig > >>make FTRACE=1 > >>/// > [...] > >> case 2 > >>/// > >>ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail > >> case 2 > >>/// > >>make FTRACE=1 ae350_rv64_spl_defconfig > >>make FTRACE=1 > >>/// > >>/// > >>/ > [...] > >>(hang here) > > > >Thanks for the logs. > > > >From logs, I can't find where it got stuck. Can you please use gdb to see > >where it > >got stuck ? > > > >Meanwhile I will give it a try on HiFive Unleashed board. > > On HiFive Unleashed it works fine with tracing. > > U-Boot 2021.01-rc2-00049-gb2a38d1d0f (Dec 01 2020 - 15:04:41 +0530) > CPU: rv64imafdc > Model: SiFive HiFive Unleashed A00 > DRAM: 8 GiB > trace: enabled > MMC: spi@1005:mmc@0: 0 > Loading Environment from SPIFlash... SF: Detected is25wp256 with page size > 256 Bytes, erase size 4 KiB, total 32 MiB > *** Warning - bad CRC, using default environment > In:serial@1001 > Out: serial@1001 > Err: serial@1001 > Net: eth0: ethernet@1009 > Hit any key to stop autoboot: 0 > => > => trace stats > 178,750 function sites > 25,359,991 function calls > 1 untracked function calls > 1,278,927 traced function calls (24358307 dropped due to overflow) > 19 maximum observed call depth > 15 call depth limit > 25,238,922 calls not traced due to depth > => fatload mmc 0:3 0x8600 hifive-unleashed-a00.dtb > 7199 bytes read in 27 ms (259.8 KiB/s) > => fatload mmc 0:3 0x8400 uImage > 21421212 bytes read in 19496 ms (1 MiB/s) > => bootm 0x8400 - 0x8600 > ## Booting kernel from Legacy Image at 8400 ... >Image Name: Linux >Image Type: RISC-V Linux Kernel Image (uncompressed) >Data Size:21421148 Bytes = 20.4 MiB >Load Address: 8020 >Entry Point: 8020 >Verifying Checksum ... OK > ## Flattened Device Tree blob at 8600 >Booting using the fdt blob at 0x8600 >Loading Kernel Image >Using Device Tree in place at 8600, end 86004c1e > Starting kernel ...(fake run for tracing) > Starting kernel ... > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > [0.00] Linux version 5.8.0-rc3-16077-g9ebcfadb0610-dirty > (pragneshp@sachinj2-OptiPlex-7010) (riscv64-unknown-linux-gnu-gcc > (crosstool-NG 1.24.0.37-3f461da) 9.2.0, GNU ld (crosstool-NG > 1.24.0.37-3f461da) 2.32) #34 SMP Tue Jul 21 15:56:29 IST 2020 > [0.00] initrd not found or empty - disabling initrd > [0.00] Zone ranges: > [0.00] DMA32[mem 0x8020-0x] > [0.00] Normal [mem 0x0001-0x00027fff] > [0.00] Movable zone start for each node > [0.00] Early memory node ranges > [0.00] node 0: [mem 0x8020-0x00027fff] > [0.00] Initmem setup node 0 [mem > 0x8020-0x00027fff] > > Welcome to Buildroot > buildroot login: root > Password: > Please check about the CI failure item Job #95.56 https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/748298543 Thanks, Rick
RE: [PATCH] riscv: timer: Add support for an early timer
Hi Rick, [...] >> >>Following are the configurations, steps and debug logs: >> >>+++ b/configs/ae350_rv64_defconfig >>q+CONFIG_TRACE=y >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >>+CONFIG_CMD_TRACE=y >>+CONFIG_TIMER_EARLY=y >> >>+++ b/configs/ae350_rv64_spl_defconfig >>+CONFIG_TRACE=y >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >>+CONFIG_CMD_TRACE=y >>+CONFIG_TIMER_EARLY=y >> >> case 1 >>/// >>ae350_rv64_defconfig with FTRACE=1, kernel booting is ok >> case 1 >>/// >>make FTRACE=1 ae350_rv64_defconfig >>make FTRACE=1 >>/// [...] >> case 2 >>/// >>ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail >> case 2 >>/// >>make FTRACE=1 ae350_rv64_spl_defconfig >>make FTRACE=1 >>/// >>/// >>/ [...] >>(hang here) > >Thanks for the logs. > >From logs, I can't find where it got stuck. Can you please use gdb to see >where it >got stuck ? > >Meanwhile I will give it a try on HiFive Unleashed board. On HiFive Unleashed it works fine with tracing. U-Boot 2021.01-rc2-00049-gb2a38d1d0f (Dec 01 2020 - 15:04:41 +0530) CPU: rv64imafdc Model: SiFive HiFive Unleashed A00 DRAM: 8 GiB trace: enabled MMC: spi@1005:mmc@0: 0 Loading Environment from SPIFlash... SF: Detected is25wp256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB *** Warning - bad CRC, using default environment In:serial@1001 Out: serial@1001 Err: serial@1001 Net: eth0: ethernet@1009 Hit any key to stop autoboot: 0 => => trace stats 178,750 function sites 25,359,991 function calls 1 untracked function calls 1,278,927 traced function calls (24358307 dropped due to overflow) 19 maximum observed call depth 15 call depth limit 25,238,922 calls not traced due to depth => fatload mmc 0:3 0x8600 hifive-unleashed-a00.dtb 7199 bytes read in 27 ms (259.8 KiB/s) => fatload mmc 0:3 0x8400 uImage 21421212 bytes read in 19496 ms (1 MiB/s) => bootm 0x8400 - 0x8600 ## Booting kernel from Legacy Image at 8400 ... Image Name: Linux Image Type: RISC-V Linux Kernel Image (uncompressed) Data Size:21421148 Bytes = 20.4 MiB Load Address: 8020 Entry Point: 8020 Verifying Checksum ... OK ## Flattened Device Tree blob at 8600 Booting using the fdt blob at 0x8600 Loading Kernel Image Using Device Tree in place at 8600, end 86004c1e Starting kernel ...(fake run for tracing) Starting kernel ... [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 [0.00] Linux version 5.8.0-rc3-16077-g9ebcfadb0610-dirty (pragneshp@sachinj2-OptiPlex-7010) (riscv64-unknown-linux-gnu-gcc (crosstool-NG 1.24.0.37-3f461da) 9.2.0, GNU ld (crosstool-NG 1.24.0.37-3f461da) 2.32) #34 SMP Tue Jul 21 15:56:29 IST 2020 [0.00] initrd not found or empty - disabling initrd [0.00] Zone ranges: [0.00] DMA32[mem 0x8020-0x] [0.00] Normal [mem 0x0001-0x00027fff] [0.00] Movable zone start for each node [0.00] Early memory node ranges [0.00] node 0: [mem 0x8020-0x00027fff] [0.00] Initmem setup node 0 [mem 0x8020-0x00027fff] Welcome to Buildroot buildroot login: root Password: > >> >> case 3 >>/// >>ae350_rv64_spl_defconfig without FTRACE=1, kernel booting ok >> case 2 >>/// >>make ae350_rv64_spl_defconfig >>make >>///
RE: [PATCH] riscv: timer: Add support for an early timer
Hi Rick, [] >> >After add CONFIG_TIMER_EARLY, U-Boot boots ok. >> >But When I try to booting kernel with FTRACE=1, following are the test >> >stats: >> > >> >ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok. >> >ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail. >> >ae350_rv64_defconfig with FTRACE=1, kernel booting is ok >> > >> >The failure case seems not reasonable. >> >Any suggestions ? Can you please enable debug logs by adding below in ae350_rv64_spl_defconfig ? CONFIG_LOG=y CONFIG_LOG_MAX_LEVEL=9 CONFIG_LOG_DEFAULT_LEVEL=9 CONFIG_LOG_CONSOLE=y CONFIG_SPL_LOG=y CONFIG_SPL_LOG_MAX_LEVEL=9 CONFIG_SPL_LOG_CONSOLE=y >> >> Strange, Can you please tell me which steps you follow and also send some >debug logs if possible. >> > >Following are the configurations, steps and debug logs: > >+++ b/configs/ae350_rv64_defconfig >q+CONFIG_TRACE=y >+CONFIG_TRACE_BUFFER_SIZE=0x0100 >+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >+CONFIG_CMD_TRACE=y >+CONFIG_TIMER_EARLY=y > >+++ b/configs/ae350_rv64_spl_defconfig >+CONFIG_TRACE=y >+CONFIG_TRACE_BUFFER_SIZE=0x0100 >+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >+CONFIG_CMD_TRACE=y >+CONFIG_TIMER_EARLY=y > > case 1 >/// >ae350_rv64_defconfig with FTRACE=1, kernel booting is ok > case 1 >/// >make FTRACE=1 ae350_rv64_defconfig >make FTRACE=1 >// >/ >U-Boot 2021.01-rc2-00139-gb3d3d69-dirty (Nov 25 2020 - 11:14:28 +0800) > >DRAM: 1 GiB >trace: enabled >Flash: 64 MiB >MMC: mmc@f0e0: 0 >Loading Environment from SPIFlash... SF: Detected mx25u1635e with page >size 256 Bytes, erase size 4 KiB, total 2 MiB >OK >In:serial@f030 >Out: serial@f030 >Err: serial@f030 >Net: no alias for ethernet0 >Warning: mac@e010 (eth0) using random MAC address - de:fa:3e:1b:11:42 >eth0: mac@e010 >Hit any key to stop autoboot: 0 >RISC-V # fatload mmc 0:1 0x2000 ae350_rv64_smp_4_no_fd_coherent.dtb >6455 bytes read in 67 ms (93.8 KiB/s) >RISC-V # fatload mmc 0:1 0x0060 bootm_ae350_rv64_smp_bbl.bin >22518836 bytes read in 11915 ms (1.8 MiB/s) >RISC-V # bootm 0x0060 - 0x2000 >## Booting kernel from Legacy Image at 0060 ... > Image Name: > Image Type: RISC-V Linux Kernel Image (uncompressed) > Data Size:22518772 Bytes = 21.5 MiB > Load Address: > Entry Point: > Verifying Checksum ... OK >## Flattened Device Tree blob at 2000 > Booting using the fdt blob at 0x2000 > Loading Kernel Image > Loading Device Tree to 1effb000, end 1efff936 ... OK > >Starting kernel ...(fake run for tracing) > >Starting kernel ... > >OF: fdt: Ignoring memory range 0x0 - 0x20 >Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version >7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT >Sat Apr 6 23:41:49 CST 2019 >bootconsole [early0] enabled >Initial ramdisk at: 0x(ptrval) (13665712 bytes) >Zone ranges: > DMA32[mem 0x0020-0x3fff] > Normal empty >Movable zone start for each node >Early memory node ranges >... >... > > case 2 >/// >ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail > case 2 >/// >make FTRACE=1 ae350_rv64_spl_defconfig >make FTRACE=1 >// >/ >U-Boot SPL 2020.10-rc2-00175-gfa50824 (Sep 15 2020 - 19:26:29 +0800) >Trying to boot from MMC1 >U-Boot SPL 2021.01-rc2-00139-gb3d3d69-dirty (Nov 25 2020 - 13:48:05 +0800) >Trying to boot from RAM >U-Boot 2021.01-rc2-00139-gb3d3d69-dirty (Nov 25 2020 - 13:48:05 +0800) >DRAM: 1 GiB >trace: enabled >Flash: 64 MiB >MMC: mmc@f0e0: 0 >Loading Environment from SPIFlash... SF: Detected mx25u1635e with page >size 256 Bytes, erase size 4 KiB, total 2 MiB >OK >In:serial@f030 >Out: serial@f030 >Err: serial@f030 >Net: no alias for ethernet0 >Warning: mac@e010 (eth0) using random MAC address - 36:86:da:0f:8e:8d >eth0: mac@e010 >Hit any key to stop autoboot: 0 >27689996 bytes read in 15024 ms (1.8 MiB/s) >6435 bytes read in 25 ms (251 KiB/s) >## Booting kernel from Legacy Image at 0060 ... > Image Name: > Image Type: RISC-V Linux Kernel Image (uncompressed) > Data Size:27689932 Bytes = 26.4 MiB > Load Address: 0020 > Entry Point: 0020 > Verifying Checksum ... OK >## Flattened Device Tree blob at 2000 > Booting using the fdt blob at 0x2000 > Loading Kernel Image > Loading Device Tree to
RE: [PATCH] riscv: timer: Add support for an early timer
Hi Rick, >-Original Message- [...] >> >After add CONFIG_TIMER_EARLY, U-Boot boots ok. >> >But When I try to booting kernel with FTRACE=1, following are the test >> >stats: >> > >> >ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok. >> >ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail. >> >ae350_rv64_defconfig with FTRACE=1, kernel booting is ok >> > >> >The failure case seems not reasonable. >> >Any suggestions ? >> >> Strange, Can you please tell me which steps you follow and also send some >debug logs if possible. >> > >Following are the configurations, steps and debug logs: > >+++ b/configs/ae350_rv64_defconfig >q+CONFIG_TRACE=y >+CONFIG_TRACE_BUFFER_SIZE=0x0100 >+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >+CONFIG_CMD_TRACE=y >+CONFIG_TIMER_EARLY=y > >+++ b/configs/ae350_rv64_spl_defconfig >+CONFIG_TRACE=y >+CONFIG_TRACE_BUFFER_SIZE=0x0100 >+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 >+CONFIG_CMD_TRACE=y >+CONFIG_TIMER_EARLY=y > > case 1 >/// >ae350_rv64_defconfig with FTRACE=1, kernel booting is ok > case 1 >/// >make FTRACE=1 ae350_rv64_defconfig >make FTRACE=1 >// >/ >U-Boot 2021.01-rc2-00139-gb3d3d69-dirty (Nov 25 2020 - 11:14:28 +0800) > >DRAM: 1 GiB >trace: enabled >Flash: 64 MiB >MMC: mmc@f0e0: 0 >Loading Environment from SPIFlash... SF: Detected mx25u1635e with page >size 256 Bytes, erase size 4 KiB, total 2 MiB >OK >In:serial@f030 >Out: serial@f030 >Err: serial@f030 >Net: no alias for ethernet0 >Warning: mac@e010 (eth0) using random MAC address - de:fa:3e:1b:11:42 >eth0: mac@e010 >Hit any key to stop autoboot: 0 >RISC-V # fatload mmc 0:1 0x2000 ae350_rv64_smp_4_no_fd_coherent.dtb >6455 bytes read in 67 ms (93.8 KiB/s) >RISC-V # fatload mmc 0:1 0x0060 bootm_ae350_rv64_smp_bbl.bin >22518836 bytes read in 11915 ms (1.8 MiB/s) >RISC-V # bootm 0x0060 - 0x2000 >## Booting kernel from Legacy Image at 0060 ... > Image Name: > Image Type: RISC-V Linux Kernel Image (uncompressed) > Data Size:22518772 Bytes = 21.5 MiB > Load Address: > Entry Point: > Verifying Checksum ... OK >## Flattened Device Tree blob at 2000 > Booting using the fdt blob at 0x2000 > Loading Kernel Image > Loading Device Tree to 1effb000, end 1efff936 ... OK > >Starting kernel ...(fake run for tracing) > >Starting kernel ... > >OF: fdt: Ignoring memory range 0x0 - 0x20 >Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version >7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT >Sat Apr 6 23:41:49 CST 2019 >bootconsole [early0] enabled >Initial ramdisk at: 0x(ptrval) (13665712 bytes) >Zone ranges: > DMA32[mem 0x0020-0x3fff] > Normal empty >Movable zone start for each node >Early memory node ranges >... >... > > case 2 >/// >ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail > case 2 >/// >make FTRACE=1 ae350_rv64_spl_defconfig >make FTRACE=1 >// >/ >U-Boot SPL 2020.10-rc2-00175-gfa50824 (Sep 15 2020 - 19:26:29 +0800) >Trying to boot from MMC1 >U-Boot SPL 2021.01-rc2-00139-gb3d3d69-dirty (Nov 25 2020 - 13:48:05 +0800) >Trying to boot from RAM >U-Boot 2021.01-rc2-00139-gb3d3d69-dirty (Nov 25 2020 - 13:48:05 +0800) >DRAM: 1 GiB >trace: enabled >Flash: 64 MiB >MMC: mmc@f0e0: 0 >Loading Environment from SPIFlash... SF: Detected mx25u1635e with page >size 256 Bytes, erase size 4 KiB, total 2 MiB >OK >In:serial@f030 >Out: serial@f030 >Err: serial@f030 >Net: no alias for ethernet0 >Warning: mac@e010 (eth0) using random MAC address - 36:86:da:0f:8e:8d >eth0: mac@e010 >Hit any key to stop autoboot: 0 >27689996 bytes read in 15024 ms (1.8 MiB/s) >6435 bytes read in 25 ms (251 KiB/s) >## Booting kernel from Legacy Image at 0060 ... > Image Name: > Image Type: RISC-V Linux Kernel Image (uncompressed) > Data Size:27689932 Bytes = 26.4 MiB > Load Address: 0020 > Entry Point: 0020 > Verifying Checksum ... OK >## Flattened Device Tree blob at 2000 > Booting using the fdt blob at 0x2000 > Loading Kernel Image > Loading Device Tree to 1effb000, end 1efff922 ... OK > >Starting kernel ...(fake run for tracing) > >Starting kernel ... > >(hang here) Thanks for the logs. From logs, I can't find where it got stuck. Can you please use gdb to
Re: [PATCH] riscv: timer: Add support for an early timer
Hi, Pragnesh > Hi Rick, > > >-Original Message- > >From: Rick Chen > >Sent: 26 November 2020 14:44 > >To: Pragnesh Patel > >Cc: Simon Glass ; U-Boot Mailing List >b...@lists.denx.de>; Atish Patra ; Bin Meng > >; Paul Walmsley ( Sifive) ; > >Anup Patel ; Sagar Kadam > >; Palmer Dabbelt ; rick > >; Alan Kao ; Leo Liang > > > >Subject: Re: [PATCH] riscv: timer: Add support for an early timer > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >Hi Pragnesh > > > >> Hi Rick, > >> > >> >-Original Message- > >> >From: Rick Chen > >> >Sent: 24 November 2020 13:08 > >> >To: Pragnesh Patel > >> >Cc: U-Boot Mailing List ; Atish Patra > >> >; Bin Meng ; Paul Walmsley ( > >> >Sifive) ; Anup Patel ; > >> >Sagar Kadam ; Palmer Dabbelt > >> >; Simon Glass ; rick > >> >; Alan Kao ; Leo Liang > >> > > >> >Subject: Re: [PATCH] riscv: timer: Add support for an early timer > >> > > >> >[External Email] Do not click links or attachments unless you > >> >recognize the sender and know the content is safe > >> > > >> >Hi Pragnesh, > >> > > >> >> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com] > >> >> Sent: Tuesday, November 17, 2020 7:05 PM > >> >> To: u-boot@lists.denx.de > >> >> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; > >> >bmeng...@gmail.com; > >> >> paul.walms...@sifive.com; anup.pa...@wdc.com; > >> >> sagar.ka...@sifive.com; Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; > >> >> Palmer Dabbelt; Sean Anderson; Simon Glass; Bin Meng > >> >> Subject: [PATCH] riscv: timer: Add support for an early timer > >> >> > >> >> Added support for timer_early_get_count() and > >> >> timer_early_get_rate() This is mostly useful in tracing. > >> >> > >> >> Signed-off-by: Pragnesh Patel > >> >> --- > >> >> drivers/timer/andes_plmt_timer.c | 21 - > >> >> drivers/timer/riscv_timer.c| 21 - > >> >> drivers/timer/sifive_clint_timer.c | 21 - > >> >> include/configs/ax25-ae350.h | 5 + > >> >> include/configs/sifive-fu540.h | 5 + > >> >> 5 files changed, 70 insertions(+), 3 deletions(-) > >> >> > >> > > >> >I verify with ae350_rv64_defconfig > >> > > >> >make FTRACE=1 ae350_rv64_defconfig > >> >make FTRACE=1 > >> > > >> >and it boot fail as below: > >> > > >> >U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800) > >> > > >> >DRAM: 1 GiB > >> >trace: enabled > >> > > >> >DO you have any suggestions ? > >> > >> Please enable CONFIG_TIMER_EARLY=y in ae350_rv64_defconfig > >> > >> Actually in v2, I will make TRACE to select TIMER_EARLY like below, > >> > >> --- a/lib/Kconfig > >> +++ b/lib/Kconfig > >> @@ -210,6 +210,7 @@ config BITREVERSE > >> config TRACE > >> bool "Support for tracing of function calls and timing" > >> imply CMD_TRACE > >> + select TIMER_EARLY > >> > >> Let me know if you have any suggestion. > > > >OK. > > > >After add CONFIG_TIMER_EARLY, U-Boot boots ok. > >But When I try to booting kernel with FTRACE=1, following are the test stats: > > > >ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok. > >ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail. > >ae350_rv64_defconfig with FTRACE=1, kernel booting is ok > > > >The failure case seems not reasonable. > >Any suggestions ? > > Strange, Can you please tell me which steps you follow and also send some > debug logs if possible. > Following are the configurations, steps and debug logs: +++ b/configs/ae350_rv64_defconfig q+CONFIG_TRACE=y +CONFIG_TRACE_BUFFER_SIZE=0x0100 +CONFIG_TRACE_CALL_DEPTH_LIMIT=15 +CONFIG_CMD_TRACE=y +CONFIG_TIMER_EARLY=y +++ b/configs/ae350_rv64_spl_defconfig +CONFIG_TRACE=y +CONFIG_TRACE_BUFFER_SIZE=0x0100 +CONFIG_TRACE_CALL_DEPTH_LIMIT=15 +CONFIG_CMD_TRACE=y +CONFIG_TIMER_EARLY=y case 1
RE: [PATCH] riscv: timer: Add support for an early timer
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 26 November 2020 14:44
>To: Pragnesh Patel
>Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ; Bin Meng
>; Paul Walmsley ( Sifive) ;
>Anup Patel ; Sagar Kadam
>; Palmer Dabbelt ; rick
>; Alan Kao ; Leo Liang
>
>Subject: Re: [PATCH] riscv: timer: Add support for an early timer
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>Hi Pragnesh
>
>> Hi Rick,
>>
>> >-Original Message-
>> >From: Rick Chen
>> >Sent: 24 November 2020 13:08
>> >To: Pragnesh Patel
>> >Cc: U-Boot Mailing List ; Atish Patra
>> >; Bin Meng ; Paul Walmsley (
>> >Sifive) ; Anup Patel ;
>> >Sagar Kadam ; Palmer Dabbelt
>> >; Simon Glass ; rick
>> >; Alan Kao ; Leo Liang
>> >
>> >Subject: Re: [PATCH] riscv: timer: Add support for an early timer
>> >
>> >[External Email] Do not click links or attachments unless you
>> >recognize the sender and know the content is safe
>> >
>> >Hi Pragnesh,
>> >
>> >> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
>> >> Sent: Tuesday, November 17, 2020 7:05 PM
>> >> To: u-boot@lists.denx.de
>> >> Cc: atish.pa...@wdc.com; palmerdabb...@google.com;
>> >bmeng...@gmail.com;
>> >> paul.walms...@sifive.com; anup.pa...@wdc.com;
>> >> sagar.ka...@sifive.com; Rick Jian-Zhi Chen(陳建志); Pragnesh Patel;
>> >> Palmer Dabbelt; Sean Anderson; Simon Glass; Bin Meng
>> >> Subject: [PATCH] riscv: timer: Add support for an early timer
>> >>
>> >> Added support for timer_early_get_count() and
>> >> timer_early_get_rate() This is mostly useful in tracing.
>> >>
>> >> Signed-off-by: Pragnesh Patel
>> >> ---
>> >> drivers/timer/andes_plmt_timer.c | 21 -
>> >> drivers/timer/riscv_timer.c| 21 -
>> >> drivers/timer/sifive_clint_timer.c | 21 -
>> >> include/configs/ax25-ae350.h | 5 +
>> >> include/configs/sifive-fu540.h | 5 +
>> >> 5 files changed, 70 insertions(+), 3 deletions(-)
>> >>
>> >
>> >I verify with ae350_rv64_defconfig
>> >
>> >make FTRACE=1 ae350_rv64_defconfig
>> >make FTRACE=1
>> >
>> >and it boot fail as below:
>> >
>> >U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800)
>> >
>> >DRAM: 1 GiB
>> >trace: enabled
>> >
>> >DO you have any suggestions ?
>>
>> Please enable CONFIG_TIMER_EARLY=y in ae350_rv64_defconfig
>>
>> Actually in v2, I will make TRACE to select TIMER_EARLY like below,
>>
>> --- a/lib/Kconfig
>> +++ b/lib/Kconfig
>> @@ -210,6 +210,7 @@ config BITREVERSE
>> config TRACE
>> bool "Support for tracing of function calls and timing"
>> imply CMD_TRACE
>> + select TIMER_EARLY
>>
>> Let me know if you have any suggestion.
>
>OK.
>
>After add CONFIG_TIMER_EARLY, U-Boot boots ok.
>But When I try to booting kernel with FTRACE=1, following are the test stats:
>
>ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok.
>ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail.
>ae350_rv64_defconfig with FTRACE=1, kernel booting is ok
>
>The failure case seems not reasonable.
>Any suggestions ?
Strange, Can you please tell me which steps you follow and also send some debug
logs if possible.
>
>Thanks,
>Rick
>
>>
>> >
>> >Thanks,
>> >Rick
>> >
>> >> diff --git a/drivers/timer/andes_plmt_timer.c
>> >> b/drivers/timer/andes_plmt_timer.c
>> >> index cec86718c7..74b795c97a 100644
>> >> --- a/drivers/timer/andes_plmt_timer.c
>> >> +++ b/drivers/timer/andes_plmt_timer.c
>> >> @@ -17,11 +17,30 @@
>> >> /* mtime register */
>> >> #define MTIME_REG(base)((ulong)(base))
>> >>
>> >> -static u64 andes_plmt_get_count(struct udevice *dev)
>> >> +static u64 notrace andes_plmt_get_count(struct udevice *dev)
>> >> {
>> >> return readq((void __iomem *)MTIME_REG(dev->priv)); }
>> >>
>> >> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
>> >> +/**
>> >> + * timer_early_get_rate() - Get the timer rate bef
Re: [PATCH] riscv: timer: Add support for an early timer
Hi Pragnesh
> Hi Rick,
>
> >-Original Message-
> >From: Rick Chen
> >Sent: 24 November 2020 13:08
> >To: Pragnesh Patel
> >Cc: U-Boot Mailing List ; Atish Patra
> >; Bin Meng ; Paul Walmsley (
> >Sifive) ; Anup Patel ; Sagar
> >Kadam ; Palmer Dabbelt ;
> >Simon Glass ; rick ; Alan Kao
> >; Leo Liang
> >Subject: Re: [PATCH] riscv: timer: Add support for an early timer
> >
> >[External Email] Do not click links or attachments unless you recognize the
> >sender and know the content is safe
> >
> >Hi Pragnesh,
> >
> >> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> >> Sent: Tuesday, November 17, 2020 7:05 PM
> >> To: u-boot@lists.denx.de
> >> Cc: atish.pa...@wdc.com; palmerdabb...@google.com;
> >bmeng...@gmail.com;
> >> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com;
> >> Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; Palmer Dabbelt; Sean
> >> Anderson; Simon Glass; Bin Meng
> >> Subject: [PATCH] riscv: timer: Add support for an early timer
> >>
> >> Added support for timer_early_get_count() and timer_early_get_rate()
> >> This is mostly useful in tracing.
> >>
> >> Signed-off-by: Pragnesh Patel
> >> ---
> >> drivers/timer/andes_plmt_timer.c | 21 -
> >> drivers/timer/riscv_timer.c| 21 -
> >> drivers/timer/sifive_clint_timer.c | 21 -
> >> include/configs/ax25-ae350.h | 5 +
> >> include/configs/sifive-fu540.h | 5 +
> >> 5 files changed, 70 insertions(+), 3 deletions(-)
> >>
> >
> >I verify with ae350_rv64_defconfig
> >
> >make FTRACE=1 ae350_rv64_defconfig
> >make FTRACE=1
> >
> >and it boot fail as below:
> >
> >U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800)
> >
> >DRAM: 1 GiB
> >trace: enabled
> >
> >DO you have any suggestions ?
>
> Please enable CONFIG_TIMER_EARLY=y in ae350_rv64_defconfig
>
> Actually in v2, I will make TRACE to select TIMER_EARLY like below,
>
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -210,6 +210,7 @@ config BITREVERSE
> config TRACE
> bool "Support for tracing of function calls and timing"
> imply CMD_TRACE
> + select TIMER_EARLY
>
> Let me know if you have any suggestion.
OK.
After add CONFIG_TIMER_EARLY, U-Boot boots ok.
But When I try to booting kernel with FTRACE=1, following are the test stats:
ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok.
ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail.
ae350_rv64_defconfig with FTRACE=1, kernel booting is ok
The failure case seems not reasonable.
Any suggestions ?
Thanks,
Rick
>
> >
> >Thanks,
> >Rick
> >
> >> diff --git a/drivers/timer/andes_plmt_timer.c
> >> b/drivers/timer/andes_plmt_timer.c
> >> index cec86718c7..74b795c97a 100644
> >> --- a/drivers/timer/andes_plmt_timer.c
> >> +++ b/drivers/timer/andes_plmt_timer.c
> >> @@ -17,11 +17,30 @@
> >> /* mtime register */
> >> #define MTIME_REG(base)((ulong)(base))
> >>
> >> -static u64 andes_plmt_get_count(struct udevice *dev)
> >> +static u64 notrace andes_plmt_get_count(struct udevice *dev)
> >> {
> >> return readq((void __iomem *)MTIME_REG(dev->priv)); }
> >>
> >> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
> >> +/**
> >> + * timer_early_get_rate() - Get the timer rate before driver model
> >> +*/ unsigned long notrace timer_early_get_rate(void) {
> >> + return RISCV_MMODE_TIMER_FREQ; }
> >> +
> >> +/**
> >> + * timer_early_get_count() - Get the timer count before driver model
> >> + *
> >> + */
> >> +u64 notrace timer_early_get_count(void) {
> >> + return readq((void __iomem
> >> +*)MTIME_REG(RISCV_MMODE_TIMERBASE));
> >> +}
> >> +#endif
> >> +
> >> static const struct timer_ops andes_plmt_ops = {
> >> .get_count = andes_plmt_get_count, }; diff --git
> >> a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c index
> >> 21ae184057..a0f71ca897 100644
> >> --- a/drivers/timer/riscv_timer.c
> >> +++ b/drivers/timer/riscv_timer.c
> >> @@ -16,7 +16,7 @@
> >> #include
> >> #include
> >>
> >> -static u64 riscv_timer_get_count(struct udevice *dev)
> >> +static u64 notrace riscv_timer_get_count(stru
RE: [PATCH] riscv: timer: Add support for an early timer
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 24 November 2020 13:08
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Paul Walmsley (
>Sifive) ; Anup Patel ; Sagar
>Kadam ; Palmer Dabbelt ;
>Simon Glass ; rick ; Alan Kao
>; Leo Liang
>Subject: Re: [PATCH] riscv: timer: Add support for an early timer
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>Hi Pragnesh,
>
>> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
>> Sent: Tuesday, November 17, 2020 7:05 PM
>> To: u-boot@lists.denx.de
>> Cc: atish.pa...@wdc.com; palmerdabb...@google.com;
>bmeng...@gmail.com;
>> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com;
>> Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; Palmer Dabbelt; Sean
>> Anderson; Simon Glass; Bin Meng
>> Subject: [PATCH] riscv: timer: Add support for an early timer
>>
>> Added support for timer_early_get_count() and timer_early_get_rate()
>> This is mostly useful in tracing.
>>
>> Signed-off-by: Pragnesh Patel
>> ---
>> drivers/timer/andes_plmt_timer.c | 21 -
>> drivers/timer/riscv_timer.c| 21 -
>> drivers/timer/sifive_clint_timer.c | 21 -
>> include/configs/ax25-ae350.h | 5 +
>> include/configs/sifive-fu540.h | 5 +
>> 5 files changed, 70 insertions(+), 3 deletions(-)
>>
>
>I verify with ae350_rv64_defconfig
>
>make FTRACE=1 ae350_rv64_defconfig
>make FTRACE=1
>
>and it boot fail as below:
>
>U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800)
>
>DRAM: 1 GiB
>trace: enabled
>
>DO you have any suggestions ?
Please enable CONFIG_TIMER_EARLY=y in ae350_rv64_defconfig
Actually in v2, I will make TRACE to select TIMER_EARLY like below,
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -210,6 +210,7 @@ config BITREVERSE
config TRACE
bool "Support for tracing of function calls and timing"
imply CMD_TRACE
+ select TIMER_EARLY
Let me know if you have any suggestion.
>
>Thanks,
>Rick
>
>> diff --git a/drivers/timer/andes_plmt_timer.c
>> b/drivers/timer/andes_plmt_timer.c
>> index cec86718c7..74b795c97a 100644
>> --- a/drivers/timer/andes_plmt_timer.c
>> +++ b/drivers/timer/andes_plmt_timer.c
>> @@ -17,11 +17,30 @@
>> /* mtime register */
>> #define MTIME_REG(base)((ulong)(base))
>>
>> -static u64 andes_plmt_get_count(struct udevice *dev)
>> +static u64 notrace andes_plmt_get_count(struct udevice *dev)
>> {
>> return readq((void __iomem *)MTIME_REG(dev->priv)); }
>>
>> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
>> +/**
>> + * timer_early_get_rate() - Get the timer rate before driver model
>> +*/ unsigned long notrace timer_early_get_rate(void) {
>> + return RISCV_MMODE_TIMER_FREQ; }
>> +
>> +/**
>> + * timer_early_get_count() - Get the timer count before driver model
>> + *
>> + */
>> +u64 notrace timer_early_get_count(void) {
>> + return readq((void __iomem
>> +*)MTIME_REG(RISCV_MMODE_TIMERBASE));
>> +}
>> +#endif
>> +
>> static const struct timer_ops andes_plmt_ops = {
>> .get_count = andes_plmt_get_count, }; diff --git
>> a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c index
>> 21ae184057..a0f71ca897 100644
>> --- a/drivers/timer/riscv_timer.c
>> +++ b/drivers/timer/riscv_timer.c
>> @@ -16,7 +16,7 @@
>> #include
>> #include
>>
>> -static u64 riscv_timer_get_count(struct udevice *dev)
>> +static u64 notrace riscv_timer_get_count(struct udevice *dev)
>> {
>> __maybe_unused u32 hi, lo;
>>
>> @@ -31,6 +31,25 @@ static u64 riscv_timer_get_count(struct udevice *dev)
>> return ((u64)hi << 32) | lo;
>> }
>>
>> +#if CONFIG_IS_ENABLED(RISCV_SMODE)
>> +/**
>> + * timer_early_get_rate() - Get the timer rate before driver model
>> +*/ unsigned long notrace timer_early_get_rate(void) {
>> + return RISCV_SMODE_TIMER_FREQ; }
>> +
>> +/**
>> + * timer_early_get_count() - Get the timer count before driver model
>> + *
>> + */
>> +u64 notrace timer_early_get_count(void) {
>> + return riscv_timer_get_count(NULL); } #endif
>> +
>> static int riscv_timer_probe(struct udevice *dev) {
>> struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
>> diff --git a/drivers/timer/sifive_clint_timer.c
>> b/drivers/timer
Re: [PATCH] riscv: timer: Add support for an early timer
Hi Pragnesh,
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Tuesday, November 17, 2020 7:05 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick
> Jian-Zhi Chen(陳建志); Pragnesh Patel; Palmer Dabbelt; Sean Anderson; Simon
> Glass; Bin Meng
> Subject: [PATCH] riscv: timer: Add support for an early timer
>
> Added support for timer_early_get_count() and timer_early_get_rate()
> This is mostly useful in tracing.
>
> Signed-off-by: Pragnesh Patel
> ---
> drivers/timer/andes_plmt_timer.c | 21 -
> drivers/timer/riscv_timer.c| 21 -
> drivers/timer/sifive_clint_timer.c | 21 -
> include/configs/ax25-ae350.h | 5 +
> include/configs/sifive-fu540.h | 5 +
> 5 files changed, 70 insertions(+), 3 deletions(-)
>
I verify with ae350_rv64_defconfig
make FTRACE=1 ae350_rv64_defconfig
make FTRACE=1
and it boot fail as below:
U-Boot 2021.01-rc2-00140-geb42715 (Nov 24 2020 - 15:02:18 +0800)
DRAM: 1 GiB
trace: enabled
DO you have any suggestions ?
Thanks,
Rick
> diff --git a/drivers/timer/andes_plmt_timer.c
> b/drivers/timer/andes_plmt_timer.c
> index cec86718c7..74b795c97a 100644
> --- a/drivers/timer/andes_plmt_timer.c
> +++ b/drivers/timer/andes_plmt_timer.c
> @@ -17,11 +17,30 @@
> /* mtime register */
> #define MTIME_REG(base)((ulong)(base))
>
> -static u64 andes_plmt_get_count(struct udevice *dev)
> +static u64 notrace andes_plmt_get_count(struct udevice *dev)
> {
> return readq((void __iomem *)MTIME_REG(dev->priv));
> }
>
> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
> +/**
> + * timer_early_get_rate() - Get the timer rate before driver model
> + */
> +unsigned long notrace timer_early_get_rate(void)
> +{
> + return RISCV_MMODE_TIMER_FREQ;
> +}
> +
> +/**
> + * timer_early_get_count() - Get the timer count before driver model
> + *
> + */
> +u64 notrace timer_early_get_count(void)
> +{
> + return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> +}
> +#endif
> +
> static const struct timer_ops andes_plmt_ops = {
> .get_count = andes_plmt_get_count,
> };
> diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
> index 21ae184057..a0f71ca897 100644
> --- a/drivers/timer/riscv_timer.c
> +++ b/drivers/timer/riscv_timer.c
> @@ -16,7 +16,7 @@
> #include
> #include
>
> -static u64 riscv_timer_get_count(struct udevice *dev)
> +static u64 notrace riscv_timer_get_count(struct udevice *dev)
> {
> __maybe_unused u32 hi, lo;
>
> @@ -31,6 +31,25 @@ static u64 riscv_timer_get_count(struct udevice *dev)
> return ((u64)hi << 32) | lo;
> }
>
> +#if CONFIG_IS_ENABLED(RISCV_SMODE)
> +/**
> + * timer_early_get_rate() - Get the timer rate before driver model
> + */
> +unsigned long notrace timer_early_get_rate(void)
> +{
> + return RISCV_SMODE_TIMER_FREQ;
> +}
> +
> +/**
> + * timer_early_get_count() - Get the timer count before driver model
> + *
> + */
> +u64 notrace timer_early_get_count(void)
> +{
> + return riscv_timer_get_count(NULL);
> +}
> +#endif
> +
> static int riscv_timer_probe(struct udevice *dev)
> {
> struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
> diff --git a/drivers/timer/sifive_clint_timer.c
> b/drivers/timer/sifive_clint_timer.c
> index 00ce0f08d6..9ae05a0e7e 100644
> --- a/drivers/timer/sifive_clint_timer.c
> +++ b/drivers/timer/sifive_clint_timer.c
> @@ -14,11 +14,30 @@
> /* mtime register */
> #define MTIME_REG(base)((ulong)(base) + 0xbff8)
>
> -static u64 sifive_clint_get_count(struct udevice *dev)
> +static u64 notrace sifive_clint_get_count(struct udevice *dev)
> {
> return readq((void __iomem *)MTIME_REG(dev->priv));
> }
>
> +#if CONFIG_IS_ENABLED(RISCV_MMODE)
> +/**
> + * timer_early_get_rate() - Get the timer rate before driver model
> + */
> +unsigned long notrace timer_early_get_rate(void)
> +{
> + return RISCV_MMODE_TIMER_FREQ;
> +}
> +
> +/**
> + * timer_early_get_count() - Get the timer count before driver model
> + *
> + */
> +u64 notrace timer_early_get_count(void)
> +{
> + return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
> +}
> +#endif
> +
> static const struct timer_ops sifive_clint_ops = {
> .get_count = sifive_clint_get_count,
> };
> diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
> index b2606e794d..bd9c371f83 100
[PATCH] riscv: timer: Add support for an early timer
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel
---
drivers/timer/andes_plmt_timer.c | 21 -
drivers/timer/riscv_timer.c| 21 -
drivers/timer/sifive_clint_timer.c | 21 -
include/configs/ax25-ae350.h | 5 +
include/configs/sifive-fu540.h | 5 +
5 files changed, 70 insertions(+), 3 deletions(-)
diff --git a/drivers/timer/andes_plmt_timer.c b/drivers/timer/andes_plmt_timer.c
index cec86718c7..74b795c97a 100644
--- a/drivers/timer/andes_plmt_timer.c
+++ b/drivers/timer/andes_plmt_timer.c
@@ -17,11 +17,30 @@
/* mtime register */
#define MTIME_REG(base)((ulong)(base))
-static u64 andes_plmt_get_count(struct udevice *dev)
+static u64 notrace andes_plmt_get_count(struct udevice *dev)
{
return readq((void __iomem *)MTIME_REG(dev->priv));
}
+#if CONFIG_IS_ENABLED(RISCV_MMODE)
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+ return RISCV_MMODE_TIMER_FREQ;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+ return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
+}
+#endif
+
static const struct timer_ops andes_plmt_ops = {
.get_count = andes_plmt_get_count,
};
diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
index 21ae184057..a0f71ca897 100644
--- a/drivers/timer/riscv_timer.c
+++ b/drivers/timer/riscv_timer.c
@@ -16,7 +16,7 @@
#include
#include
-static u64 riscv_timer_get_count(struct udevice *dev)
+static u64 notrace riscv_timer_get_count(struct udevice *dev)
{
__maybe_unused u32 hi, lo;
@@ -31,6 +31,25 @@ static u64 riscv_timer_get_count(struct udevice *dev)
return ((u64)hi << 32) | lo;
}
+#if CONFIG_IS_ENABLED(RISCV_SMODE)
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+ return RISCV_SMODE_TIMER_FREQ;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+ return riscv_timer_get_count(NULL);
+}
+#endif
+
static int riscv_timer_probe(struct udevice *dev)
{
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
diff --git a/drivers/timer/sifive_clint_timer.c
b/drivers/timer/sifive_clint_timer.c
index 00ce0f08d6..9ae05a0e7e 100644
--- a/drivers/timer/sifive_clint_timer.c
+++ b/drivers/timer/sifive_clint_timer.c
@@ -14,11 +14,30 @@
/* mtime register */
#define MTIME_REG(base)((ulong)(base) + 0xbff8)
-static u64 sifive_clint_get_count(struct udevice *dev)
+static u64 notrace sifive_clint_get_count(struct udevice *dev)
{
return readq((void __iomem *)MTIME_REG(dev->priv));
}
+#if CONFIG_IS_ENABLED(RISCV_MMODE)
+/**
+ * timer_early_get_rate() - Get the timer rate before driver model
+ */
+unsigned long notrace timer_early_get_rate(void)
+{
+ return RISCV_MMODE_TIMER_FREQ;
+}
+
+/**
+ * timer_early_get_count() - Get the timer count before driver model
+ *
+ */
+u64 notrace timer_early_get_count(void)
+{
+ return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
+}
+#endif
+
static const struct timer_ops sifive_clint_ops = {
.get_count = sifive_clint_get_count,
};
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index b2606e794d..bd9c371f83 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -17,6 +17,11 @@
#endif
#endif
+#define RISCV_MMODE_TIMERBASE 0xe600
+#define RISCV_MMODE_TIMER_FREQ 6000
+
+#define RISCV_SMODE_TIMER_FREQ 6000
+
/*
* CPU and Board Configuration Options
*/
diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
index c1c79db147..0d69d1c548 100644
--- a/include/configs/sifive-fu540.h
+++ b/include/configs/sifive-fu540.h
@@ -36,6 +36,11 @@
#define CONFIG_STANDALONE_LOAD_ADDR0x8020
+#define RISCV_MMODE_TIMERBASE 0x200
+#define RISCV_MMODE_TIMER_FREQ 100
+
+#define RISCV_SMODE_TIMER_FREQ 100
+
/* Environment options */
#ifndef CONFIG_SPL_BUILD
--
2.17.1
