Re: [PATCH 07/15] rockchip: rk3328-orangepi-r1-plus: Update defconfig
Hi Jonas,
On Wed, Feb 7, 2024 at 9:06 AM Jonas Karlman wrote:
>
> Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.
>
> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
>
> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
> of FIT images. This help indicate if there is an issue loading any of
> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
> support for scripts.
>
> Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
> eth1addr is set based on cpuid read from eFUSE.
>
> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>
> Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove to
> support reset of onboard ethernet PHYs.
>
> Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.
>
> Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
> generator.
>
> Also add missing device tree files to MAINTAINERS file.
>
> Signed-off-by: Jonas Karlman
Reviewed-by: Tianling Shen
Best regards,
Tianling.
> ---
> arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 6 --
> arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 6 --
> board/rockchip/evb_rk3328/MAINTAINERS| 2 ++
> configs/orangepi-r1-plus-lts-rk3328_defconfig| 12 ++--
> configs/orangepi-r1-plus-rk3328_defconfig| 12 ++--
> doc/board/rockchip/rockchip.rst | 2 ++
> 6 files changed, 24 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> index 5aaa5ccb15c1..8a4189c6f1cc 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> @@ -28,12 +28,6 @@
> bootph-pre-ram;
> };
>
> - {
> - snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
> - snps,reset-active-low;
> - snps,reset-delays-us = <0 1 5>;
> -};
> -
> {
> spi_flash: spiflash@0 {
> bootph-all;
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> index 6d3db86dce6a..2e3b6a77a268 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> @@ -28,12 +28,6 @@
> bootph-pre-ram;
> };
>
> - {
> - snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
> - snps,reset-active-low;
> - snps,reset-delays-us = <0 1 5>;
> -};
> -
> {
> spi_flash: spiflash@0 {
> bootph-all;
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS
> b/board/rockchip/evb_rk3328/MAINTAINERS
> index b88727acad26..675b72dd060c 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -32,12 +32,14 @@ ORANGEPI-R1-PLUS-RK3328
> M: Tianling Shen
> S: Maintained
> F: configs/orangepi-r1-plus-rk3328_defconfig
> +F: arch/arm/dts/rk3328-orangepi-r1-plus.dts
> F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
>
> ORANGEPI-R1-PLUS-LTS-RK3328
> M: Tianling Shen
> S: Maintained
> F: configs/orangepi-r1-plus-lts-rk3328_defconfig
> +F: arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
> F: arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
>
> ROC-RK3328-CC
> diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig
> b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> index d3d9417509e9..937ef003d85b 100644
> --- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
> CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> CONFIG_TPL_LIBCOMMON_SUPPORT=y
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
> CONFIG_SPL_STACK_R_ADDR=0x60
> CONFIG_SPL_STACK=0x40
> CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
> # CONFIG_ANDROID_BOOT_IMAGE is not set
> CONFIG_FIT=y
> CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
> # CONFIG_DISPLAY_CPUINFO is not set
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
> CONFIG_ENV_IS_IN_MMC=y
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> CONFIG_REGMAP=y
> CONFIG_SPL_REGMAP=y
> CONFIG_TPL_REGMAP=y
> @@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_PHY_MOTORCOMM=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>
[PATCH 07/15] rockchip: rk3328-orangepi-r1-plus: Update defconfig
Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove to
support reset of onboard ethernet PHYs.
Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 6 --
arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 6 --
board/rockchip/evb_rk3328/MAINTAINERS| 2 ++
configs/orangepi-r1-plus-lts-rk3328_defconfig| 12 ++--
configs/orangepi-r1-plus-rk3328_defconfig| 12 ++--
doc/board/rockchip/rockchip.rst | 2 ++
6 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 5aaa5ccb15c1..8a4189c6f1cc 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -28,12 +28,6 @@
bootph-pre-ram;
};
- {
- snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 5>;
-};
-
{
spi_flash: spiflash@0 {
bootph-all;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 6d3db86dce6a..2e3b6a77a268 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -28,12 +28,6 @@
bootph-pre-ram;
};
- {
- snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 5>;
-};
-
{
spi_flash: spiflash@0 {
bootph-all;
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS
b/board/rockchip/evb_rk3328/MAINTAINERS
index b88727acad26..675b72dd060c 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -32,12 +32,14 @@ ORANGEPI-R1-PLUS-RK3328
M: Tianling Shen
S: Maintained
F: configs/orangepi-r1-plus-rk3328_defconfig
+F: arch/arm/dts/rk3328-orangepi-r1-plus.dts
F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
ORANGEPI-R1-PLUS-LTS-RK3328
M: Tianling Shen
S: Maintained
F: configs/orangepi-r1-plus-lts-rk3328_defconfig
+F: arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
F: arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
ROC-RK3328-CC
diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig
b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index d3d9417509e9..937ef003d85b 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x60
CONFIG_SPL_STACK=0x40
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_TPL_REGMAP=y
@@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
@@ -91,6 +97,8 @@ CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig
b/configs/orangepi-r1-plus-rk3328_defconfig
index
