On 26/02/2024 10:08, Varadarajan Narayanan wrote:
> U-Boot has to reconfigure the clocks that were set in the boot
> loaders. However, in IPQ9574, the clocks have to be reset before
> they can be reconfigured. Hence add code to do the relevant
> resets.
>
> Signed-off-by: Varadarajan Narayanan
With below feedback addressed, please add
Reviewed-by: Caleb Connolly
> ---
>
> drivers/mmc/msm_sdhci.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
> index 9285d412fe..2e9d521159 100644
> --- a/drivers/mmc/msm_sdhci.c
> +++ b/drivers/mmc/msm_sdhci.c
> @@ -16,6 +16,7 @@
> #include
> #include
> #include
> +#include
>
> /* Non-standard registers needed for SDHCI startup */
> #define SDCC_MCI_POWER 0x0
> @@ -122,10 +123,19 @@ static int msm_sdc_probe(struct udevice *dev)
> struct msm_sdhc *prv = dev_get_priv(dev);
> const struct msm_sdhc_variant_info *var_info;
> struct sdhci_host *host = >host;
> + struct reset_ctl bcr_rst;
> u32 core_version, core_minor, core_major;
> u32 caps;
> int ret;
>
> + ret = reset_get_by_name(dev, "bcr_rst", _rst);
reset-names is not not valid according to the DT bindings, please use
reset_get_by_index() instead.
> + if (!ret) {
> + reset_assert(_rst);
> + mdelay(10);
Is 10ms really necessary here? The equivalent code in Linux suggests
that only 125us are needed (with a 32.7KHz sleep clock) and uses 200us
to be "on the safe side". So maybe udelay(200) here instead?
> + reset_deassert(_rst);
> + mdelay(10);
> + }
> +
> host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
>
> host->max_clk = 0;
--
// Caleb (they/them)
