RE: [PATCH v4 02/14] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Hi Patrick,
>-Original Message-
>From: Patrick DELAUNAY
>Sent: 24 February 2020 23:30
>To: Pragnesh Patel ; u-boot@lists.denx.de
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com;
>bmeng...@gmail.com; Paul Walmsley ( Sifive) ;
>ja...@amarulasolutions.com; Troy Benjegerdes ( Sifive)
>; anup.pa...@wdc.com; Sagar Kadam
>; Rick Chen
>Subject: RE: [PATCH v4 02/14] riscv: sifive: fu540: Use OTP DM driver for
>serial
>environment variable
>
>Hi,
>
>Just a warning as I had the same issue with 8729b1ae2cbd ("misc: Update
>read() and write() methods to return bytes xfered")
>
>> From: U-Boot On Behalf Of Pragnesh
>> Patel
>> Sent: lundi 24 février 2020 09:33
>>
>> Use the OTP DM driver to set the serial environment variable.
>>
>> Signed-off-by: Pragnesh Patel
>> ---
>> arch/riscv/dts/fu540-c000-u-boot.dtsi | 14 +++
>> .../dts/hifive-unleashed-a00-u-boot.dtsi | 6 +
>> board/sifive/fu540/Kconfig| 2 +
>> board/sifive/fu540/fu540.c| 113 +++---
>> 4 files changed, 62 insertions(+), 73 deletions(-) create mode
>> 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi
>> create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>>
>> diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi
>> b/arch/riscv/dts/fu540-c000-u- boot.dtsi new file mode 100644 index
>> 00..31fd113c7d
>> --- /dev/null
>> +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
>> @@ -0,0 +1,14 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * (C) Copyright 2019 SiFive, Inc
>> + */
>> +
>> +/ {
>> +soc {
>> +otp: otp@1007 {
>> +compatible = "sifive,fu540-otp";
>> +reg = <0x0 0x1007 0x0 0x0FFF>;
>> +fuse-count = <0x1000>;
>> +};
>> +};
>> +};
>> diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>> b/arch/riscv/dts/hifive- unleashed-a00-u-boot.dtsi new file mode
>> 100644 index 00..bec0d19134
>> --- /dev/null
>> +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>> @@ -0,0 +1,6 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 SiFive, Inc
>> + */
>> +
>> +#include "fu540-c000-u-boot.dtsi"
>> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
>> index
>> 5ca21474de..900197bbb2 100644
>> --- a/board/sifive/fu540/Kconfig
>> +++ b/board/sifive/fu540/Kconfig
>> @@ -48,5 +48,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
>> imply SIFIVE_GPIO
>> imply CMD_GPIO
>> imply SMP
>> +imply MISC
>> +imply SIFIVE_OTP
>>
>> endif
>> diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
>> index 47a2090251..409471effc 100644
>> --- a/board/sifive/fu540/fu540.c
>> +++ b/board/sifive/fu540/fu540.c
>> @@ -10,94 +10,61 @@
>> #include
>> #include
>> #include
>> +#include
>>
>> -#ifdef CONFIG_MISC_INIT_R
>> -
>> -#define FU540_OTP_BASE_ADDR 0x1007
>> -
>> -struct fu540_otp_regs {
>> -u32 pa; /* Address input */
>> -u32 paio; /* Program address input */
>> -u32 pas;/* Program redundancy cell selection input */
>> -u32 pce;/* OTP Macro enable input */
>> -u32 pclk; /* Clock input */
>> -u32 pdin; /* Write data input */
>> -u32 pdout; /* Read data output */
>> -u32 pdstb; /* Deep standby mode enable input (active low) */
>> -u32 pprog; /* Program mode enable input */
>> -u32 ptc;/* Test column enable input */
>> -u32 ptm;/* Test mode enable input */
>> -u32 ptm_rep;/* Repair function test mode enable input */
>> -u32 ptr;/* Test row enable input */
>> -u32 ptrim; /* Repair function enable input */
>> -u32 pwe;/* Write enable input (defines program cycle) */
>> -} __packed;
>> -
>> -#define BYTES_PER_FUSE 4
>> -#define NUM_FUSES 0x1000
>> -
>> -static int fu540_otp_read(int offset, void *buf, int size) -{
>> -struct fu540_otp_regs *regs = (void __iomem
>> *)FU540_OTP_BASE_ADDR;
>> -unsigned int i;
>> -int fuseidx = offset / BYTES_PER_FUSE;
>> -int fusecount = size / BYTES_PER_FUSE;
>> -u32 fusebuf[fusecount];
>> -
>> -/* check bounds */
>> -if (offset <
RE: [PATCH v4 02/14] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Hi,
Just a warning as I had the same issue with 8729b1ae2cbd ("misc: Update read()
and write() methods to return bytes xfered")
> From: U-Boot On Behalf Of Pragnesh Patel
> Sent: lundi 24 février 2020 09:33
>
> Use the OTP DM driver to set the serial environment variable.
>
> Signed-off-by: Pragnesh Patel
> ---
> arch/riscv/dts/fu540-c000-u-boot.dtsi | 14 +++
> .../dts/hifive-unleashed-a00-u-boot.dtsi | 6 +
> board/sifive/fu540/Kconfig| 2 +
> board/sifive/fu540/fu540.c| 113 +++---
> 4 files changed, 62 insertions(+), 73 deletions(-) create mode 100644
> arch/riscv/dts/fu540-c000-u-boot.dtsi
> create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
>
> diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi
> b/arch/riscv/dts/fu540-c000-u-
> boot.dtsi
> new file mode 100644
> index 00..31fd113c7d
> --- /dev/null
> +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2019 SiFive, Inc
> + */
> +
> +/ {
> + soc {
> + otp: otp@1007 {
> + compatible = "sifive,fu540-otp";
> + reg = <0x0 0x1007 0x0 0x0FFF>;
> + fuse-count = <0x1000>;
> + };
> + };
> +};
> diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> b/arch/riscv/dts/hifive-
> unleashed-a00-u-boot.dtsi
> new file mode 100644
> index 00..bec0d19134
> --- /dev/null
> +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> @@ -0,0 +1,6 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 SiFive, Inc
> + */
> +
> +#include "fu540-c000-u-boot.dtsi"
> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index
> 5ca21474de..900197bbb2 100644
> --- a/board/sifive/fu540/Kconfig
> +++ b/board/sifive/fu540/Kconfig
> @@ -48,5 +48,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply SIFIVE_GPIO
> imply CMD_GPIO
> imply SMP
> + imply MISC
> + imply SIFIVE_OTP
>
> endif
> diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c index
> 47a2090251..409471effc 100644
> --- a/board/sifive/fu540/fu540.c
> +++ b/board/sifive/fu540/fu540.c
> @@ -10,94 +10,61 @@
> #include
> #include
> #include
> +#include
>
> -#ifdef CONFIG_MISC_INIT_R
> -
> -#define FU540_OTP_BASE_ADDR 0x1007
> -
> -struct fu540_otp_regs {
> - u32 pa; /* Address input */
> - u32 paio; /* Program address input */
> - u32 pas;/* Program redundancy cell selection input */
> - u32 pce;/* OTP Macro enable input */
> - u32 pclk; /* Clock input */
> - u32 pdin; /* Write data input */
> - u32 pdout; /* Read data output */
> - u32 pdstb; /* Deep standby mode enable input (active low) */
> - u32 pprog; /* Program mode enable input */
> - u32 ptc;/* Test column enable input */
> - u32 ptm;/* Test mode enable input */
> - u32 ptm_rep;/* Repair function test mode enable input */
> - u32 ptr;/* Test row enable input */
> - u32 ptrim; /* Repair function enable input */
> - u32 pwe;/* Write enable input (defines program cycle) */
> -} __packed;
> -
> -#define BYTES_PER_FUSE 4
> -#define NUM_FUSES0x1000
> -
> -static int fu540_otp_read(int offset, void *buf, int size) -{
> - struct fu540_otp_regs *regs = (void __iomem
> *)FU540_OTP_BASE_ADDR;
> - unsigned int i;
> - int fuseidx = offset / BYTES_PER_FUSE;
> - int fusecount = size / BYTES_PER_FUSE;
> - u32 fusebuf[fusecount];
> -
> - /* check bounds */
> - if (offset < 0 || size < 0)
> - return -EINVAL;
> - if (fuseidx >= NUM_FUSES)
> - return -EINVAL;
> - if ((fuseidx + fusecount) > NUM_FUSES)
> - return -EINVAL;
> -
> - /* init OTP */
> - writel(0x01, >pdstb); /* wake up from stand-by */
> - writel(0x01, >ptrim); /* enable repair function */
> - writel(0x01, >pce); /* enable input */
> -
> - /* read all requested fuses */
> - for (i = 0; i < fusecount; i++, fuseidx++) {
> - writel(fuseidx, >pa);
> -
> - /* cycle clock to read */
> - writel(0x01, >pclk);
> - mdelay(1);
> - writel(0x00, >pclk);
> - mdelay(1);
> -
> - /* read the value */
> - fusebuf[i] = readl(>pdout);
> - }
> -
> - /* shut down */
> - writel(0, >pce);
> - writel(0, >ptrim);
> - writel(0, >pdstb);
> -
> - /* copy out */
> - memcpy(buf, fusebuf, size);
> +/*
> + * This define is a value used for error/unknown serial.
> + * If we really care about distinguishing errors and 0 is
> + * valid, we'll need a different one.
> + */
> +#define ERROR_READING_SERIAL_NUMBER 0
>
> - return 0;
> -}
> +#ifdef CONFIG_MISC_INIT_R
>
> -static u32
[PATCH v4 02/14] riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Use the OTP DM driver to set the serial environment variable.
Signed-off-by: Pragnesh Patel
---
arch/riscv/dts/fu540-c000-u-boot.dtsi | 14 +++
.../dts/hifive-unleashed-a00-u-boot.dtsi | 6 +
board/sifive/fu540/Kconfig| 2 +
board/sifive/fu540/fu540.c| 113 +++---
4 files changed, 62 insertions(+), 73 deletions(-)
create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi
create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi
b/arch/riscv/dts/fu540-c000-u-boot.dtsi
new file mode 100644
index 00..31fd113c7d
--- /dev/null
+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 SiFive, Inc
+ */
+
+/ {
+ soc {
+ otp: otp@1007 {
+ compatible = "sifive,fu540-otp";
+ reg = <0x0 0x1007 0x0 0x0FFF>;
+ fuse-count = <0x1000>;
+ };
+ };
+};
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
new file mode 100644
index 00..bec0d19134
--- /dev/null
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 SiFive, Inc
+ */
+
+#include "fu540-c000-u-boot.dtsi"
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index 5ca21474de..900197bbb2 100644
--- a/board/sifive/fu540/Kconfig
+++ b/board/sifive/fu540/Kconfig
@@ -48,5 +48,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply SIFIVE_GPIO
imply CMD_GPIO
imply SMP
+ imply MISC
+ imply SIFIVE_OTP
endif
diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
index 47a2090251..409471effc 100644
--- a/board/sifive/fu540/fu540.c
+++ b/board/sifive/fu540/fu540.c
@@ -10,94 +10,61 @@
#include
#include
#include
+#include
-#ifdef CONFIG_MISC_INIT_R
-
-#define FU540_OTP_BASE_ADDR0x1007
-
-struct fu540_otp_regs {
- u32 pa; /* Address input */
- u32 paio; /* Program address input */
- u32 pas;/* Program redundancy cell selection input */
- u32 pce;/* OTP Macro enable input */
- u32 pclk; /* Clock input */
- u32 pdin; /* Write data input */
- u32 pdout; /* Read data output */
- u32 pdstb; /* Deep standby mode enable input (active low) */
- u32 pprog; /* Program mode enable input */
- u32 ptc;/* Test column enable input */
- u32 ptm;/* Test mode enable input */
- u32 ptm_rep;/* Repair function test mode enable input */
- u32 ptr;/* Test row enable input */
- u32 ptrim; /* Repair function enable input */
- u32 pwe;/* Write enable input (defines program cycle) */
-} __packed;
-
-#define BYTES_PER_FUSE 4
-#define NUM_FUSES 0x1000
-
-static int fu540_otp_read(int offset, void *buf, int size)
-{
- struct fu540_otp_regs *regs = (void __iomem *)FU540_OTP_BASE_ADDR;
- unsigned int i;
- int fuseidx = offset / BYTES_PER_FUSE;
- int fusecount = size / BYTES_PER_FUSE;
- u32 fusebuf[fusecount];
-
- /* check bounds */
- if (offset < 0 || size < 0)
- return -EINVAL;
- if (fuseidx >= NUM_FUSES)
- return -EINVAL;
- if ((fuseidx + fusecount) > NUM_FUSES)
- return -EINVAL;
-
- /* init OTP */
- writel(0x01, >pdstb); /* wake up from stand-by */
- writel(0x01, >ptrim); /* enable repair function */
- writel(0x01, >pce); /* enable input */
-
- /* read all requested fuses */
- for (i = 0; i < fusecount; i++, fuseidx++) {
- writel(fuseidx, >pa);
-
- /* cycle clock to read */
- writel(0x01, >pclk);
- mdelay(1);
- writel(0x00, >pclk);
- mdelay(1);
-
- /* read the value */
- fusebuf[i] = readl(>pdout);
- }
-
- /* shut down */
- writel(0, >pce);
- writel(0, >ptrim);
- writel(0, >pdstb);
-
- /* copy out */
- memcpy(buf, fusebuf, size);
+/*
+ * This define is a value used for error/unknown serial.
+ * If we really care about distinguishing errors and 0 is
+ * valid, we'll need a different one.
+ */
+#define ERROR_READING_SERIAL_NUMBER 0
- return 0;
-}
+#ifdef CONFIG_MISC_INIT_R
-static u32 fu540_read_serialnum(void)
+#if CONFIG_IS_ENABLED(SIFIVE_OTP)
+static u32 otp_read_serialnum(struct udevice *dev)
{
int ret;
u32 serial[2] = {0};
for (int i = 0xfe * 4; i > 0; i -= 8) {
- ret = fu540_otp_read(i, serial, sizeof(serial));
+ ret = misc_read(dev, i, serial, sizeof(serial));
+
if (ret) {
-
