Re: [PATCH v4 16/17] riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree

2023-03-22 Thread Conor Dooley



On 22 March 2023 01:37:53 GMT, yanhong wang  
wrote:
>
>
>On 2023/3/21 5:25, Conor Dooley wrote:
>> On Thu, Mar 16, 2023 at 10:53:31AM +0800, Yanhong Wang wrote:
>>> Add initial device tree for StarFive VisionFive v2 board.
>>> 
>>> Signed-off-by: Yanhong Wang 
>>> Tested-by: Conor Dooley 
>> 
>> btw, are you running some sort of cc suppression argument to
>> send-email? There's not much reason to do so for submissions to a public
>> ML, and it would be nice to get subsequent revisions of a patchset that
>> I have given a tested-by for in my inbox.
>> 
>
>Yes, the --suppress-cc=all parameter was added to the send-email. Do you 
>suggest canceling this parameter?

Please. If you're sending to a public mailing list, I don't really see the 
point in suppression.


Re: [PATCH v4 16/17] riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree

2023-03-21 Thread yanhong wang



On 2023/3/21 5:25, Conor Dooley wrote:
> On Thu, Mar 16, 2023 at 10:53:31AM +0800, Yanhong Wang wrote:
>> Add initial device tree for StarFive VisionFive v2 board.
>> 
>> Signed-off-by: Yanhong Wang 
>> Tested-by: Conor Dooley 
> 
> btw, are you running some sort of cc suppression argument to
> send-email? There's not much reason to do so for submissions to a public
> ML, and it would be nice to get subsequent revisions of a patchset that
> I have given a tested-by for in my inbox.
> 

Yes, the --suppress-cc=all parameter was added to the send-email. Do you 
suggest canceling this parameter?

> Curious,
> Conor.


Re: [PATCH v4 16/17] riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree

2023-03-20 Thread Conor Dooley
On Thu, Mar 16, 2023 at 10:53:31AM +0800, Yanhong Wang wrote:
> Add initial device tree for StarFive VisionFive v2 board.
> 
> Signed-off-by: Yanhong Wang 
> Tested-by: Conor Dooley 

btw, are you running some sort of cc suppression argument to
send-email? There's not much reason to do so for submissions to a public
ML, and it would be nice to get subsequent revisions of a patchset that
I have given a tested-by for in my inbox.

Curious,
Conor.


signature.asc
Description: PGP signature


[PATCH v4 16/17] riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree

2023-03-15 Thread Yanhong Wang
Add initial device tree for StarFive VisionFive v2 board.

Signed-off-by: Yanhong Wang 
Tested-by: Conor Dooley 
---
 arch/riscv/dts/Makefile   |   3 +-
 ...10-starfive-visionfive-2-v1.2a-u-boot.dtsi |  69 
 .../jh7110-starfive-visionfive-2-v1.2a.dts|  12 +
 ...10-starfive-visionfive-2-v1.3b-u-boot.dtsi |  69 
 .../jh7110-starfive-visionfive-2-v1.3b.dts|  12 +
 .../dts/jh7110-starfive-visionfive-2.dtsi | 319 ++
 6 files changed, 483 insertions(+), 1 deletion(-)
 create mode 100644 
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
 create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
 create mode 100644 
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
 create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts
 create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index c576c55767..79a58694f5 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -7,7 +7,8 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
-
+dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += 
jh7110-starfive-visionfive-2-v1.3b.dtb
+dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += 
jh7110-starfive-visionfive-2-v1.2a.dtb
 include $(srctree)/scripts/Makefile.dts
 
 targets += $(dtb-y)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi 
b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
new file mode 100644
index 00..0b20be0f10
--- /dev/null
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ */
+
+#include "binman.dtsi"
+#include "jh7110-u-boot.dtsi"
+/ {
+   chosen {
+   u-boot,dm-spl;
+   };
+
+   firmware {
+   spi0 = 
+   u-boot,dm-spl;
+   };
+
+   config {
+   u-boot,dm-spl;
+   u-boot,spl-payload-offset = <0x10>;
+   };
+
+   memory@4000 {
+   u-boot,dm-spl;
+   };
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+
+   nor-flash@0 {
+   u-boot,dm-spl;
+   };
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+_pins {
+   u-boot,dm-spl;
+   mmc0-pins-rest {
+   u-boot,dm-spl;
+   };
+};
+
+_pins {
+   u-boot,dm-spl;
+   mmc1-pins0 {
+   u-boot,dm-spl;
+   };
+
+   mmc1-pins1 {
+   u-boot,dm-spl;
+   };
+};
+
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts 
b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
new file mode 100644
index 00..b9d26d7af7
--- /dev/null
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ */
+
+/dts-v1/;
+#include "jh7110-starfive-visionfive-2.dtsi"
+
+/ {
+   model = "StarFive VisionFive 2 v1.2A";
+   compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
+};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi 
b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
new file mode 100644
index 00..0b20be0f10
--- /dev/null
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ */
+
+#include "binman.dtsi"
+#include "jh7110-u-boot.dtsi"
+/ {
+   chosen {
+   u-boot,dm-spl;
+   };
+
+   firmware {
+   spi0 = 
+   u-boot,dm-spl;
+   };
+
+   config {
+   u-boot,dm-spl;
+   u-boot,spl-payload-offset = <0x10>;
+   };
+
+   memory@4000 {
+   u-boot,dm-spl;
+   };
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+
+   nor-flash@0 {
+   u-boot,dm-spl;
+   };
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+_pins {
+   u-boot,dm-spl;
+   mmc0-pins-rest {
+   u-boot,dm-spl;
+   };
+};
+
+_pins {
+   u-boot,dm-spl;
+   mmc1-pins0 {
+   u-boot,dm-spl;
+   };
+
+   mmc1-pins1 {
+   u-boot,dm-spl;
+   };
+};
+
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts 
b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts
new file mode 100644
index 00..3b3b3453a1
--- /dev/null
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -0,0 +1,12 @@
+//