On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Import the dt-bindings headers in preparation for switching to upstream
> DTS for MSM8916.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> include/dt-bindings/arm/coresight-cti-dt.h | 37 +
> include/dt-bindings/clock/qcom,rpmcc.h | 174
>
> include/dt-bindings/interconnect/qcom,msm8916.h | 100 ++
> include/dt-bindings/pinctrl/qcom,pmic-mpp.h | 106 +++
> include/dt-bindings/reset/qcom,gcc-msm8916.h| 100 ++
> include/dt-bindings/sound/apq8016-lpass.h | 9 ++
> include/dt-bindings/sound/qcom,lpass.h | 46 +++
> 7 files changed, 572 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/include/dt-bindings/arm/coresight-cti-dt.h
> b/include/dt-bindings/arm/coresight-cti-dt.h
> new file mode 100644
> index ..61e7bdf8ea6e
> --- /dev/null
> +++ b/include/dt-bindings/arm/coresight-cti-dt.h
> @@ -0,0 +1,37 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * This header provides constants for the defined trigger signal
> + * types on CoreSight CTI.
> + */
> +
> +#ifndef _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
> +#define _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
> +
> +#define GEN_IO 0
> +#define GEN_INTREQ 1
> +#define GEN_INTACK 2
> +#define GEN_HALTREQ3
> +#define GEN_RESTARTREQ 4
> +#define PE_EDBGREQ 5
> +#define PE_DBGRESTART 6
> +#define PE_CTIIRQ 7
> +#define PE_PMUIRQ 8
> +#define PE_DBGTRIGGER 9
> +#define ETM_EXTOUT 10
> +#define ETM_EXTIN 11
> +#define SNK_FULL 12
> +#define SNK_ACQCOMP13
> +#define SNK_FLUSHCOMP 14
> +#define SNK_FLUSHIN15
> +#define SNK_TRIGIN 16
> +#define STM_ASYNCOUT 17
> +#define STM_TOUT_SPTE 18
> +#define STM_TOUT_SW19
> +#define STM_TOUT_HETE 20
> +#define STM_HWEVENT21
> +#define ELA_TSTART 22
> +#define ELA_TSTOP 23
> +#define ELA_DBGREQ 24
> +#define CTI_TRIG_MAX 25
> +
> +#endif /*_DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H */
> diff --git a/include/dt-bindings/clock/qcom,rpmcc.h
> b/include/dt-bindings/clock/qcom,rpmcc.h
> new file mode 100644
> index ..46309c9953b2
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,rpmcc.h
> @@ -0,0 +1,174 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright 2015 Linaro Limited
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
> +#define _DT_BINDINGS_CLK_MSM_RPMCC_H
> +
> +/* RPM clocks */
> +#define RPM_PXO_CLK0
> +#define RPM_PXO_A_CLK 1
> +#define RPM_CXO_CLK2
> +#define RPM_CXO_A_CLK 3
> +#define RPM_APPS_FABRIC_CLK4
> +#define RPM_APPS_FABRIC_A_CLK 5
> +#define RPM_CFPB_CLK 6
> +#define RPM_CFPB_A_CLK 7
> +#define RPM_QDSS_CLK 8
> +#define RPM_QDSS_A_CLK 9
> +#define RPM_DAYTONA_FABRIC_CLK 10
> +#define RPM_DAYTONA_FABRIC_A_CLK 11
> +#define RPM_EBI1_CLK 12
> +#define RPM_EBI1_A_CLK 13
> +#define RPM_MM_FABRIC_CLK 14
> +#define RPM_MM_FABRIC_A_CLK15
> +#define RPM_MMFPB_CLK 16
> +#define RPM_MMFPB_A_CLK17
> +#define RPM_SYS_FABRIC_CLK 18
> +#define RPM_SYS_FABRIC_A_CLK 19
> +#define RPM_SFPB_CLK 20
> +#define RPM_SFPB_A_CLK 21
> +#define RPM_SMI_CLK22
> +#define RPM_SMI_A_CLK 23
> +#define RPM_PLL4_CLK 24
> +#define RPM_XO_D0 25
> +#define RPM_XO_D1 26
> +#define RPM_XO_A0 27
> +#define RPM_XO_A1 28
> +#define RPM_XO_A2 29
> +#define RPM_NSS_FABRIC_0_CLK 30
> +#define RPM_NSS_FABRIC_0_A_CLK 31
> +#define RPM_NSS_FABRIC_1_CLK 32
> +#define RPM_NSS_FABRIC_1_A_CLK 33
> +
> +/* SMD RPM clocks */
> +#define RPM_SMD_XO_CLK_SRC 0
> +#define RPM_SMD_XO_A_CLK_SRC 1
> +#define RPM_SMD_PCNOC_CLK 2
> +#define RPM_SMD_PCNOC_A_CLK3
> +#define RPM_SMD_SNOC_CLK 4
> +#define RPM_SMD_SNOC_A_CLK 5
> +#define RPM_SMD_BIMC_CLK 6
> +#define RPM_SMD_BIMC_A_CLK 7
> +#define RPM_SMD_QDSS_CLK 8
> +#define RPM_SMD_QDSS_A_CLK 9
> +#define RPM_
