Re: [PATCH v6 04/12] arm: dts: sync dts for Action Semi S900
On 18/03/2020 18:25, Amit Singh Tomar wrote:
> Synchronize device tree bindings with v5.5-rc6 tag with commit id
> "b3a987b0264d".
>
> Also, it removes older clock binding defined for S900 along with undocumented
> compatible string "actions,s900-serial" from serial driver and adapts clock
> driver to cater to new bindings.
>
> Signed-off-by: Amit Singh Tomar
The new files are indeed identical with the versions from the Linux
kernel. Rest looks alright as well.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> Changes since v5:
> * Moved it 04/11 from 03/11.
> * removed the undocumented compatible string "actions,s900-serial".
> * removed the reviewed-by tag.
> Changes since v4:
> * This patch is re-ordered, moved from 07/11 to 03/11.
> * Used the commit-id(12 chars long) in commit message.
> Changes since v3:
> * Added Reviewed-by: tag.
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/dts/s900.dtsi | 322
> +++--
> drivers/clk/owl/clk_s900.c | 6 +-
> drivers/serial/serial_owl.c| 1 -
> include/dt-bindings/clock/actions,s900-cmu.h | 129 ++
> include/dt-bindings/clock/s900_cmu.h | 77 --
> include/dt-bindings/reset/actions,s900-reset.h | 65 +
> 6 files changed, 498 insertions(+), 102 deletions(-)
> create mode 100644 include/dt-bindings/clock/actions,s900-cmu.h
> delete mode 100644 include/dt-bindings/clock/s900_cmu.h
> create mode 100644 include/dt-bindings/reset/actions,s900-reset.h
>
> diff --git a/arch/arm/dts/s900.dtsi b/arch/arm/dts/s900.dtsi
> index 2bbb30a..eb35cf7 100644
> --- a/arch/arm/dts/s900.dtsi
> +++ b/arch/arm/dts/s900.dtsi
> @@ -1,17 +1,94 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -//
> -// Device Tree Source for Actions Semi S900 SoC
> -//
> -// Copyright (C) 2015 Actions Semi Co., Ltd.
> -// Copyright (C) 2018 Manivannan Sadhasivam
>
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
>
> -/dts-v1/;
> -#include
> +#include
> +#include
> +#include
> +#include
>
> / {
> compatible = "actions,s900";
> - #address-cells = <0x2>;
> - #size-cells = <0x2>;
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secmon@1f00 {
> + reg = <0x0 0x1f00 0x0 0x100>;
> + no-map;
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = ,
> + ,
> + ,
> + ;
> + interrupt-affinity = <>, <>, <>, <>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + hosc: hosc {
> + compatible = "fixed-clock";
> + clock-frequency = <2400>;
> + #clock-cells = <0>;
> + };
>
> losc: losc {
> compatible = "fixed-clock";
> @@ -26,28 +103,231 @@
> };
>
> soc {
> - u-boot,dm-pre-reloc;
> compatible = "simple-bus";
> - #address-cells = <0x2>;
>
[PATCH v6 04/12] arm: dts: sync dts for Action Semi S900
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".
Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.
Signed-off-by: Amit Singh Tomar
---
Changes since v5:
* Moved it 04/11 from 03/11.
* removed the undocumented compatible string "actions,s900-serial".
* removed the reviewed-by tag.
Changes since v4:
* This patch is re-ordered, moved from 07/11 to 03/11.
* Used the commit-id(12 chars long) in commit message.
Changes since v3:
* Added Reviewed-by: tag.
Changes since v2:
* Newly added patch, not there in v2/v1.
---
arch/arm/dts/s900.dtsi | 322 +++--
drivers/clk/owl/clk_s900.c | 6 +-
drivers/serial/serial_owl.c| 1 -
include/dt-bindings/clock/actions,s900-cmu.h | 129 ++
include/dt-bindings/clock/s900_cmu.h | 77 --
include/dt-bindings/reset/actions,s900-reset.h | 65 +
6 files changed, 498 insertions(+), 102 deletions(-)
create mode 100644 include/dt-bindings/clock/actions,s900-cmu.h
delete mode 100644 include/dt-bindings/clock/s900_cmu.h
create mode 100644 include/dt-bindings/reset/actions,s900-reset.h
diff --git a/arch/arm/dts/s900.dtsi b/arch/arm/dts/s900.dtsi
index 2bbb30a..eb35cf7 100644
--- a/arch/arm/dts/s900.dtsi
+++ b/arch/arm/dts/s900.dtsi
@@ -1,17 +1,94 @@
-// SPDX-License-Identifier: GPL-2.0+
-//
-// Device Tree Source for Actions Semi S900 SoC
-//
-// Copyright (C) 2015 Actions Semi Co., Ltd.
-// Copyright (C) 2018 Manivannan Sadhasivam
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Andreas Färber
+ */
-/dts-v1/;
-#include
+#include
+#include
+#include
+#include
/ {
compatible = "actions,s900";
- #address-cells = <0x2>;
- #size-cells = <0x2>;
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secmon@1f00 {
+ reg = <0x0 0x1f00 0x0 0x100>;
+ no-map;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = ,
+,
+,
+;
+ interrupt-affinity = <>, <>, <>, <>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = ,
+,
+,
+;
+ };
+
+ hosc: hosc {
+ compatible = "fixed-clock";
+ clock-frequency = <2400>;
+ #clock-cells = <0>;
+ };
losc: losc {
compatible = "fixed-clock";
@@ -26,28 +103,231 @@
};
soc {
- u-boot,dm-pre-reloc;
compatible = "simple-bus";
- #address-cells = <0x2>;
- #size-cells = <0x2>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
+ gic: interrupt-controller@e00f1000 {
+ compatible = "arm,gic-400";
+ reg = <0x0 0xe00f1000 0x0 0x1000>,
+ <0x0 0xe00f2000 0x0 0x2000>,
+ <0x0 0xe00f4000 0x0 0x2000>,
+ <0x0 0xe00f6000 0x0 0x2000>;
+ interrupts = ;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
