Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
Hi Sean
> On Wed, Apr 22, 2020 at 10:03:41PM -0400, Sean Anderson wrote:
> > On 4/22/20 9:51 PM, Rick Chen wrote:
> > > Hi Sean
> > >
> > >> Hi Sean
> > >>
> > >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> > >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> > >>> models are similar.
> > >>>
> > >>> Known Bugs/Limitations:
> > >>> - Accessing the AI ram hangs, limiting available ram to 6M
> > >>> - Trying to boot an image with bootm fails with
> > >>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
> > >>>
> > >>> To flash u-boot to a maix bit, run
> > >>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
> > >>>
> > >>> Boot output should look like the following:
> > >>>
> > >>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09
> > >>> -0500)
> > >>>
> > >>> DRAM: 8 MiB
> > >>> In:serial@3800
> > >>> Out: serial@3800
> > >>> Err: serial@3800
> > >>> =>
> > >>>
> > >>> Changes for v8:
> > >>> - Removed dependency on the patch "clk: Add functions to register CCF
> > >>> clock
> > >>> structs". Hopefully this will make reviewing easier.
> > >>
> > >> I have applied this patch series to u-boot-riscv/master except [PATCH
> > >> v8 14/21] riscv: Clean up IPI initialization code.
> > >> Because it will cause some warnings as below:
> > >>
> > >> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> > >> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> > >> integer from pointer without a cast [-Wint-conversion]
> > >> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> > >> ^~
> > >> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> > >> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> > >> if (IS_ERR(ret))
> > >> ^~~
> > >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> > >> include/linux/err.h:34:20: note: expected 'const void *' but argument
> > >> is of type 'int'
> > >> static inline long IS_ERR(const void *ptr)
> > >> ^~
> > >> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> > >> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
> > >>return PTR_ERR(ret);
> > >> ^~~
> > >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> > >> include/linux/err.h:29:20: note: expected 'const void *' but argument
> > >> is of type 'int'
> > >> static inline long PTR_ERR(const void *ptr)
> > >> ^~~
> > >> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> > >> from integer without a cast [-Wint-conversion]
> > >> gd->arch.plic = ret;
> > >>
> > >
> > > after running CI yesterday, it failed in many cases:
> > > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
> > >
> > > and I trace at least two cases belong to your patch
> > > 49.59
> > > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
> > >
> > > arning, treated as error:
> > > /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> > > in "code-block" directive:
> > > 1 argument(s) required, 0 supplied.
> > > .. code-block::
> > > {
> > > assigned-clocks = < K210_CLK_PLL0>;
> > > assigned-clock-rates = <8>;
> > > };
> > > doc/Makefile:69: recipe for target 'htmldocs' failed
> > > make[1]: *** [htmldocs] Error 1
> >
> > I used to have
> >
> > .. code-block:: dts
> >
> > but it warned that "dts" was not a valid language, so I dropped it.
> >
> > > 49.66
> > > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
> > >
> > > ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> > > ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> > > cp: cannot create regular file
> > > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > > cp: cannot create regular file
> > > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > > WARNING: no status info for 'sipeed_maix_bitm'
> > > WARNING: no maintainers for 'sipeed_maix_bitm'
> >
> > I'm not sure what the issue here is. Which specific files are lacking a
> > MAINTAINERS entry?
>
> configs/sipeed_maix_bitm_defconfig isn't listed in any MAINTAINERS file.
>
> [snip]
> > These "errors" seem rather minor. I will fix the PLIC ones in the next
> > revision, but I don't think the sort found in this email are
> > particularly erroneous.
>
> They aren't minor. Not having the defconfig have a listed MAINTAINER
> means I don't know who to contact later on when something needs to be
> migrated, etc. Not having the documentation be generated cleanly is a
> problem because we're trying to improve our documentation as that's
> helpful for end users.
>
Your v9 patchs have two problems:
Problem 1:
I have run your v9 patchs with Travis CI today, but it still FAIL.
Please check about the failure items as below:
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
On Wed, Apr 22, 2020 at 10:03:41PM -0400, Sean Anderson wrote:
> On 4/22/20 9:51 PM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> >>> models are similar.
> >>>
> >>> Known Bugs/Limitations:
> >>> - Accessing the AI ram hangs, limiting available ram to 6M
> >>> - Trying to boot an image with bootm fails with
> >>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
> >>>
> >>> To flash u-boot to a maix bit, run
> >>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
> >>>
> >>> Boot output should look like the following:
> >>>
> >>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
> >>>
> >>> DRAM: 8 MiB
> >>> In:serial@3800
> >>> Out: serial@3800
> >>> Err: serial@3800
> >>> =>
> >>>
> >>> Changes for v8:
> >>> - Removed dependency on the patch "clk: Add functions to register CCF
> >>> clock
> >>> structs". Hopefully this will make reviewing easier.
> >>
> >> I have applied this patch series to u-boot-riscv/master except [PATCH
> >> v8 14/21] riscv: Clean up IPI initialization code.
> >> Because it will cause some warnings as below:
> >>
> >> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> >> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> >> integer from pointer without a cast [-Wint-conversion]
> >> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> >> ^~
> >> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> >> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> >> if (IS_ERR(ret))
> >> ^~~
> >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> >> include/linux/err.h:34:20: note: expected 'const void *' but argument
> >> is of type 'int'
> >> static inline long IS_ERR(const void *ptr)
> >> ^~
> >> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> >> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
> >>return PTR_ERR(ret);
> >> ^~~
> >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> >> include/linux/err.h:29:20: note: expected 'const void *' but argument
> >> is of type 'int'
> >> static inline long PTR_ERR(const void *ptr)
> >> ^~~
> >> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> >> from integer without a cast [-Wint-conversion]
> >> gd->arch.plic = ret;
> >>
> >
> > after running CI yesterday, it failed in many cases:
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
> >
> > and I trace at least two cases belong to your patch
> > 49.59
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
> >
> > arning, treated as error:
> > /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> > in "code-block" directive:
> > 1 argument(s) required, 0 supplied.
> > .. code-block::
> > {
> > assigned-clocks = < K210_CLK_PLL0>;
> > assigned-clock-rates = <8>;
> > };
> > doc/Makefile:69: recipe for target 'htmldocs' failed
> > make[1]: *** [htmldocs] Error 1
>
> I used to have
>
> .. code-block:: dts
>
> but it warned that "dts" was not a valid language, so I dropped it.
>
> > 49.66
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
> >
> > ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> > ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> > cp: cannot create regular file
> > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > cp: cannot create regular file
> > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > WARNING: no status info for 'sipeed_maix_bitm'
> > WARNING: no maintainers for 'sipeed_maix_bitm'
>
> I'm not sure what the issue here is. Which specific files are lacking a
> MAINTAINERS entry?
configs/sipeed_maix_bitm_defconfig isn't listed in any MAINTAINERS file.
[snip]
> These "errors" seem rather minor. I will fix the PLIC ones in the next
> revision, but I don't think the sort found in this email are
> particularly erroneous.
They aren't minor. Not having the defconfig have a listed MAINTAINER
means I don't know who to contact later on when something needs to be
migrated, etc. Not having the documentation be generated cleanly is a
problem because we're trying to improve our documentation as that's
helpful for end users.
Thanks!
>
> --Sean
>
--
Tom
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Description: PGP signature
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
Hi Sean
>
> Hi Sean
>
> > On 4/22/20 9:51 PM, Rick Chen wrote:
> > > Hi Sean
> > >
> > >> Hi Sean
> > >>
> > >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> > >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> > >>> models are similar.
> > >>>
> > >>> Known Bugs/Limitations:
> > >>> - Accessing the AI ram hangs, limiting available ram to 6M
> > >>> - Trying to boot an image with bootm fails with
> > >>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
> > >>>
> > >>> To flash u-boot to a maix bit, run
> > >>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
> > >>>
> > >>> Boot output should look like the following:
> > >>>
> > >>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09
> > >>> -0500)
> > >>>
> > >>> DRAM: 8 MiB
> > >>> In:serial@3800
> > >>> Out: serial@3800
> > >>> Err: serial@3800
> > >>> =>
> > >>>
> > >>> Changes for v8:
> > >>> - Removed dependency on the patch "clk: Add functions to register CCF
> > >>> clock
> > >>> structs". Hopefully this will make reviewing easier.
> > >>
> > >> I have applied this patch series to u-boot-riscv/master except [PATCH
> > >> v8 14/21] riscv: Clean up IPI initialization code.
> > >> Because it will cause some warnings as below:
> > >>
> > >> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> > >> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> > >> integer from pointer without a cast [-Wint-conversion]
> > >> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> > >> ^~
> > >> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> > >> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> > >> if (IS_ERR(ret))
> > >> ^~~
> > >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> > >> include/linux/err.h:34:20: note: expected 'const void *' but argument
> > >> is of type 'int'
> > >> static inline long IS_ERR(const void *ptr)
> > >> ^~
> > >> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> > >> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
> > >>return PTR_ERR(ret);
> > >> ^~~
> > >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> > >> include/linux/err.h:29:20: note: expected 'const void *' but argument
> > >> is of type 'int'
> > >> static inline long PTR_ERR(const void *ptr)
> > >> ^~~
> > >> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> > >> from integer without a cast [-Wint-conversion]
> > >> gd->arch.plic = ret;
> > >>
> > >
> > > after running CI yesterday, it failed in many cases:
> > > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
> > >
> > > and I trace at least two cases belong to your patch
> > > 49.59
> > > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
> > >
> > > arning, treated as error:
> > > /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> > > in "code-block" directive:
> > > 1 argument(s) required, 0 supplied.
> > > .. code-block::
> > > {
> > > assigned-clocks = < K210_CLK_PLL0>;
> > > assigned-clock-rates = <8>;
> > > };
> > > doc/Makefile:69: recipe for target 'htmldocs' failed
> > > make[1]: *** [htmldocs] Error 1
> >
> > I used to have
> >
> > .. code-block:: dts
> >
> > but it warned that "dts" was not a valid language, so I dropped it.
> >
> > > 49.66
> > > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
> > >
> > > ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> > > ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> > > cp: cannot create regular file
> > > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > > cp: cannot create regular file
> > > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > > WARNING: no status info for 'sipeed_maix_bitm'
> > > WARNING: no maintainers for 'sipeed_maix_bitm'
> >
> > I'm not sure what the issue here is. Which specific files are lacking a
> > MAINTAINERS entry?
> >
> > >
> > > So I will drop your patchs and run CI again today.
> > > And hope you can fix them in next version and pass CI verification.
> >
> >
> >
> > >
> > > Thanks,
> > > Rick
> > >
> >
> > These "errors" seem rather minor. I will fix the PLIC ones in the next
> > revision, but I don't think the sort found in this email are
> > particularly erroneous.
>
>
> Can you run and pass Travis CI after you fix your patchs
> It help us to maintain the quality about patch works.
>
The Travis CI verification is pass without your v8 patchs.
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678432471
I have send a PR excluding your v9 patchs, because I am not sure if
your v9 can pass the CI.
After the PR being excepted by Tom and if your v9 patchs can pass the CI.
I will send another PR later for
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
Hi Sean
> On 4/22/20 9:51 PM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> >>> models are similar.
> >>>
> >>> Known Bugs/Limitations:
> >>> - Accessing the AI ram hangs, limiting available ram to 6M
> >>> - Trying to boot an image with bootm fails with
> >>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
> >>>
> >>> To flash u-boot to a maix bit, run
> >>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
> >>>
> >>> Boot output should look like the following:
> >>>
> >>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
> >>>
> >>> DRAM: 8 MiB
> >>> In:serial@3800
> >>> Out: serial@3800
> >>> Err: serial@3800
> >>> =>
> >>>
> >>> Changes for v8:
> >>> - Removed dependency on the patch "clk: Add functions to register CCF
> >>> clock
> >>> structs". Hopefully this will make reviewing easier.
> >>
> >> I have applied this patch series to u-boot-riscv/master except [PATCH
> >> v8 14/21] riscv: Clean up IPI initialization code.
> >> Because it will cause some warnings as below:
> >>
> >> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> >> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> >> integer from pointer without a cast [-Wint-conversion]
> >> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> >> ^~
> >> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> >> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> >> if (IS_ERR(ret))
> >> ^~~
> >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> >> include/linux/err.h:34:20: note: expected 'const void *' but argument
> >> is of type 'int'
> >> static inline long IS_ERR(const void *ptr)
> >> ^~
> >> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> >> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
> >>return PTR_ERR(ret);
> >> ^~~
> >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> >> include/linux/err.h:29:20: note: expected 'const void *' but argument
> >> is of type 'int'
> >> static inline long PTR_ERR(const void *ptr)
> >> ^~~
> >> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> >> from integer without a cast [-Wint-conversion]
> >> gd->arch.plic = ret;
> >>
> >
> > after running CI yesterday, it failed in many cases:
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
> >
> > and I trace at least two cases belong to your patch
> > 49.59
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
> >
> > arning, treated as error:
> > /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> > in "code-block" directive:
> > 1 argument(s) required, 0 supplied.
> > .. code-block::
> > {
> > assigned-clocks = < K210_CLK_PLL0>;
> > assigned-clock-rates = <8>;
> > };
> > doc/Makefile:69: recipe for target 'htmldocs' failed
> > make[1]: *** [htmldocs] Error 1
>
> I used to have
>
> .. code-block:: dts
>
> but it warned that "dts" was not a valid language, so I dropped it.
>
> > 49.66
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
> >
> > ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> > ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> > cp: cannot create regular file
> > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > cp: cannot create regular file
> > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > WARNING: no status info for 'sipeed_maix_bitm'
> > WARNING: no maintainers for 'sipeed_maix_bitm'
>
> I'm not sure what the issue here is. Which specific files are lacking a
> MAINTAINERS entry?
>
> >
> > So I will drop your patchs and run CI again today.
> > And hope you can fix them in next version and pass CI verification.
>
>
>
> >
> > Thanks,
> > Rick
> >
>
> These "errors" seem rather minor. I will fix the PLIC ones in the next
> revision, but I don't think the sort found in this email are
> particularly erroneous.
Can you run and pass Travis CI after you fix your patchs
It help us to maintain the quality about patch works.
Thanks,
Rick
>
> --Sean
>
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
On 4/22/20 10:12 PM, Sean Anderson wrote:
> On 4/22/20 10:10 PM, Bin Meng wrote:
>> Hi Sean,
>>
>> On Thu, Apr 23, 2020 at 10:03 AM Sean Anderson wrote:
>>>
>>> On 4/22/20 9:51 PM, Rick Chen wrote:
Hi Sean
> Hi Sean
>
>> This patch series adds support for Sipeed Maix boards and the Kendryte
>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
>> models are similar.
>>
>> Known Bugs/Limitations:
>> - Accessing the AI ram hangs, limiting available ram to 6M
>> - Trying to boot an image with bootm fails with
>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
>>
>> To flash u-boot to a maix bit, run
>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
>>
>> Boot output should look like the following:
>>
>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
>>
>> DRAM: 8 MiB
>> In:serial@3800
>> Out: serial@3800
>> Err: serial@3800
>> =>
>>
>> Changes for v8:
>> - Removed dependency on the patch "clk: Add functions to register CCF
>> clock
>> structs". Hopefully this will make reviewing easier.
>
> I have applied this patch series to u-boot-riscv/master except [PATCH
> v8 14/21] riscv: Clean up IPI initialization code.
> Because it will cause some warnings as below:
>
> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> integer from pointer without a cast [-Wint-conversion]
> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> ^~
> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> if (IS_ERR(ret))
> ^~~
> In file included from arch/riscv/lib/andes_plic.c:20:0:
> include/linux/err.h:34:20: note: expected 'const void *' but argument
> is of type 'int'
> static inline long IS_ERR(const void *ptr)
> ^~
> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
>return PTR_ERR(ret);
> ^~~
> In file included from arch/riscv/lib/andes_plic.c:20:0:
> include/linux/err.h:29:20: note: expected 'const void *' but argument
> is of type 'int'
> static inline long PTR_ERR(const void *ptr)
> ^~~
> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> from integer without a cast [-Wint-conversion]
> gd->arch.plic = ret;
>
This was caused by the ret variable being the wrong type; should be
fixed.
after running CI yesterday, it failed in many cases:
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
and I trace at least two cases belong to your patch
49.59
https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
arning, treated as error:
/home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
in "code-block" directive:
1 argument(s) required, 0 supplied.
.. code-block::
{
assigned-clocks = < K210_CLK_PLL0>;
assigned-clock-rates = <8>;
};
doc/Makefile:69: recipe for target 'htmldocs' failed
make[1]: *** [htmldocs] Error 1
>>>
>>> I used to have
>>>
>>> .. code-block:: dts
>>>
>>> but it warned that "dts" was not a valid language, so I dropped it
>>>
I've marked these blocks as "none" instead.
49.66
https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
./tools/patman/patman --test && ./tools/buildman/buildman -t &&
./tools/dtoc/dtoc -t && make testconfig; fi; fi
cp: cannot create regular file
'/home/travis/build/rickchen36/sandbox/': Not a directory
cp: cannot create regular file
'/home/travis/build/rickchen36/sandbox/': Not a directory
WARNING: no status info for 'sipeed_maix_bitm'
WARNING: no maintainers for 'sipeed_maix_bitm'
>>>
>>> I'm not sure what the issue here is. Which specific files are lacking a
>>> MAINTAINERS entry?
>>>
>>
>> You need create a MAINTAINERS file in the board directory.
>
> It is already created.
Ok, I think this is because the defconfig was renamed at some point but
MAINTAINERS was not update to reflect the change.
>
>>
So I will drop your patchs and run CI again today.
And hope you can fix them in next version and pass CI verification.
>>>
>>
>> Regards,
>> Bin
>>
>
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
On 4/22/20 10:10 PM, Bin Meng wrote:
> Hi Sean,
>
> On Thu, Apr 23, 2020 at 10:03 AM Sean Anderson wrote:
>>
>> On 4/22/20 9:51 PM, Rick Chen wrote:
>>> Hi Sean
>>>
Hi Sean
> This patch series adds support for Sipeed Maix boards and the Kendryte
> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> models are similar.
>
> Known Bugs/Limitations:
> - Accessing the AI ram hangs, limiting available ram to 6M
> - Trying to boot an image with bootm fails with
> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
>
> To flash u-boot to a maix bit, run
> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
>
> Boot output should look like the following:
>
> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
>
> DRAM: 8 MiB
> In:serial@3800
> Out: serial@3800
> Err: serial@3800
> =>
>
> Changes for v8:
> - Removed dependency on the patch "clk: Add functions to register CCF
> clock
> structs". Hopefully this will make reviewing easier.
I have applied this patch series to u-boot-riscv/master except [PATCH
v8 14/21] riscv: Clean up IPI initialization code.
Because it will cause some warnings as below:
arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
integer from pointer without a cast [-Wint-conversion]
int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
^~
arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
if (IS_ERR(ret))
^~~
In file included from arch/riscv/lib/andes_plic.c:20:0:
include/linux/err.h:34:20: note: expected 'const void *' but argument
is of type 'int'
static inline long IS_ERR(const void *ptr)
^~
arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
return PTR_ERR(ret);
^~~
In file included from arch/riscv/lib/andes_plic.c:20:0:
include/linux/err.h:29:20: note: expected 'const void *' but argument
is of type 'int'
static inline long PTR_ERR(const void *ptr)
^~~
arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
from integer without a cast [-Wint-conversion]
gd->arch.plic = ret;
>>>
>>> after running CI yesterday, it failed in many cases:
>>> https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
>>>
>>> and I trace at least two cases belong to your patch
>>> 49.59
>>> https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
>>>
>>> arning, treated as error:
>>> /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
>>> in "code-block" directive:
>>> 1 argument(s) required, 0 supplied.
>>> .. code-block::
>>> {
>>> assigned-clocks = < K210_CLK_PLL0>;
>>> assigned-clock-rates = <8>;
>>> };
>>> doc/Makefile:69: recipe for target 'htmldocs' failed
>>> make[1]: *** [htmldocs] Error 1
>>
>> I used to have
>>
>> .. code-block:: dts
>>
>> but it warned that "dts" was not a valid language, so I dropped it.
>>
>>> 49.66
>>> https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
>>>
>>> ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
>>> ./tools/dtoc/dtoc -t && make testconfig; fi; fi
>>> cp: cannot create regular file
>>> '/home/travis/build/rickchen36/sandbox/': Not a directory
>>> cp: cannot create regular file
>>> '/home/travis/build/rickchen36/sandbox/': Not a directory
>>> WARNING: no status info for 'sipeed_maix_bitm'
>>> WARNING: no maintainers for 'sipeed_maix_bitm'
>>
>> I'm not sure what the issue here is. Which specific files are lacking a
>> MAINTAINERS entry?
>>
>
> You need create a MAINTAINERS file in the board directory.
It is already created.
>
>>>
>>> So I will drop your patchs and run CI again today.
>>> And hope you can fix them in next version and pass CI verification.
>>
>
> Regards,
> Bin
>
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
Hi Sean,
On Thu, Apr 23, 2020 at 10:03 AM Sean Anderson wrote:
>
> On 4/22/20 9:51 PM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> >>> models are similar.
> >>>
> >>> Known Bugs/Limitations:
> >>> - Accessing the AI ram hangs, limiting available ram to 6M
> >>> - Trying to boot an image with bootm fails with
> >>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
> >>>
> >>> To flash u-boot to a maix bit, run
> >>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
> >>>
> >>> Boot output should look like the following:
> >>>
> >>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
> >>>
> >>> DRAM: 8 MiB
> >>> In:serial@3800
> >>> Out: serial@3800
> >>> Err: serial@3800
> >>> =>
> >>>
> >>> Changes for v8:
> >>> - Removed dependency on the patch "clk: Add functions to register CCF
> >>> clock
> >>> structs". Hopefully this will make reviewing easier.
> >>
> >> I have applied this patch series to u-boot-riscv/master except [PATCH
> >> v8 14/21] riscv: Clean up IPI initialization code.
> >> Because it will cause some warnings as below:
> >>
> >> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> >> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> >> integer from pointer without a cast [-Wint-conversion]
> >> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> >> ^~
> >> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> >> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> >> if (IS_ERR(ret))
> >> ^~~
> >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> >> include/linux/err.h:34:20: note: expected 'const void *' but argument
> >> is of type 'int'
> >> static inline long IS_ERR(const void *ptr)
> >> ^~
> >> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> >> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
> >>return PTR_ERR(ret);
> >> ^~~
> >> In file included from arch/riscv/lib/andes_plic.c:20:0:
> >> include/linux/err.h:29:20: note: expected 'const void *' but argument
> >> is of type 'int'
> >> static inline long PTR_ERR(const void *ptr)
> >> ^~~
> >> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> >> from integer without a cast [-Wint-conversion]
> >> gd->arch.plic = ret;
> >>
> >
> > after running CI yesterday, it failed in many cases:
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
> >
> > and I trace at least two cases belong to your patch
> > 49.59
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
> >
> > arning, treated as error:
> > /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> > in "code-block" directive:
> > 1 argument(s) required, 0 supplied.
> > .. code-block::
> > {
> > assigned-clocks = < K210_CLK_PLL0>;
> > assigned-clock-rates = <8>;
> > };
> > doc/Makefile:69: recipe for target 'htmldocs' failed
> > make[1]: *** [htmldocs] Error 1
>
> I used to have
>
> .. code-block:: dts
>
> but it warned that "dts" was not a valid language, so I dropped it.
>
> > 49.66
> > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
> >
> > ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> > ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> > cp: cannot create regular file
> > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > cp: cannot create regular file
> > '/home/travis/build/rickchen36/sandbox/': Not a directory
> > WARNING: no status info for 'sipeed_maix_bitm'
> > WARNING: no maintainers for 'sipeed_maix_bitm'
>
> I'm not sure what the issue here is. Which specific files are lacking a
> MAINTAINERS entry?
>
You need create a MAINTAINERS file in the board directory.
> >
> > So I will drop your patchs and run CI again today.
> > And hope you can fix them in next version and pass CI verification.
>
Regards,
Bin
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
On 4/22/20 9:51 PM, Rick Chen wrote:
> Hi Sean
>
>> Hi Sean
>>
>>> This patch series adds support for Sipeed Maix boards and the Kendryte
>>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
>>> models are similar.
>>>
>>> Known Bugs/Limitations:
>>> - Accessing the AI ram hangs, limiting available ram to 6M
>>> - Trying to boot an image with bootm fails with
>>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
>>>
>>> To flash u-boot to a maix bit, run
>>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
>>>
>>> Boot output should look like the following:
>>>
>>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
>>>
>>> DRAM: 8 MiB
>>> In:serial@3800
>>> Out: serial@3800
>>> Err: serial@3800
>>> =>
>>>
>>> Changes for v8:
>>> - Removed dependency on the patch "clk: Add functions to register CCF clock
>>> structs". Hopefully this will make reviewing easier.
>>
>> I have applied this patch series to u-boot-riscv/master except [PATCH
>> v8 14/21] riscv: Clean up IPI initialization code.
>> Because it will cause some warnings as below:
>>
>> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
>> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
>> integer from pointer without a cast [-Wint-conversion]
>> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
>> ^~
>> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
>> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
>> if (IS_ERR(ret))
>> ^~~
>> In file included from arch/riscv/lib/andes_plic.c:20:0:
>> include/linux/err.h:34:20: note: expected 'const void *' but argument
>> is of type 'int'
>> static inline long IS_ERR(const void *ptr)
>> ^~
>> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
>> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
>>return PTR_ERR(ret);
>> ^~~
>> In file included from arch/riscv/lib/andes_plic.c:20:0:
>> include/linux/err.h:29:20: note: expected 'const void *' but argument
>> is of type 'int'
>> static inline long PTR_ERR(const void *ptr)
>> ^~~
>> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
>> from integer without a cast [-Wint-conversion]
>> gd->arch.plic = ret;
>>
>
> after running CI yesterday, it failed in many cases:
> https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
>
> and I trace at least two cases belong to your patch
> 49.59
> https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
>
> arning, treated as error:
> /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> in "code-block" directive:
> 1 argument(s) required, 0 supplied.
> .. code-block::
> {
> assigned-clocks = < K210_CLK_PLL0>;
> assigned-clock-rates = <8>;
> };
> doc/Makefile:69: recipe for target 'htmldocs' failed
> make[1]: *** [htmldocs] Error 1
I used to have
.. code-block:: dts
but it warned that "dts" was not a valid language, so I dropped it.
> 49.66
> https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
>
> ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> cp: cannot create regular file
> '/home/travis/build/rickchen36/sandbox/': Not a directory
> cp: cannot create regular file
> '/home/travis/build/rickchen36/sandbox/': Not a directory
> WARNING: no status info for 'sipeed_maix_bitm'
> WARNING: no maintainers for 'sipeed_maix_bitm'
I'm not sure what the issue here is. Which specific files are lacking a
MAINTAINERS entry?
>
> So I will drop your patchs and run CI again today.
> And hope you can fix them in next version and pass CI verification.
>
> Thanks,
> Rick
>
These "errors" seem rather minor. I will fix the PLIC ones in the next
revision, but I don't think the sort found in this email are
particularly erroneous.
--Sean
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
On 4/22/20 9:51 PM, Rick Chen wrote:
> Hi Sean
>
>> Hi Sean
>>
>>> This patch series adds support for Sipeed Maix boards and the Kendryte
>>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
>>> models are similar.
>>>
>>> Known Bugs/Limitations:
>>> - Accessing the AI ram hangs, limiting available ram to 6M
>>> - Trying to boot an image with bootm fails with
>>> ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
>>>
>>> To flash u-boot to a maix bit, run
>>> kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
>>>
>>> Boot output should look like the following:
>>>
>>> U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
>>>
>>> DRAM: 8 MiB
>>> In:serial@3800
>>> Out: serial@3800
>>> Err: serial@3800
>>> =>
>>>
>>> Changes for v8:
>>> - Removed dependency on the patch "clk: Add functions to register CCF clock
>>> structs". Hopefully this will make reviewing easier.
>>
>> I have applied this patch series to u-boot-riscv/master except [PATCH
>> v8 14/21] riscv: Clean up IPI initialization code.
>> Because it will cause some warnings as below:
>>
>> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
>> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
>> integer from pointer without a cast [-Wint-conversion]
>> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
>> ^~
>> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
>> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
>> if (IS_ERR(ret))
>> ^~~
>> In file included from arch/riscv/lib/andes_plic.c:20:0:
>> include/linux/err.h:34:20: note: expected 'const void *' but argument
>> is of type 'int'
>> static inline long IS_ERR(const void *ptr)
>> ^~
>> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
>> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
>>return PTR_ERR(ret);
>> ^~~
>> In file included from arch/riscv/lib/andes_plic.c:20:0:
>> include/linux/err.h:29:20: note: expected 'const void *' but argument
>> is of type 'int'
>> static inline long PTR_ERR(const void *ptr)
>> ^~~
>> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
>> from integer without a cast [-Wint-conversion]
>> gd->arch.plic = ret;
>>
>
> after running CI yesterday, it failed in many cases:
> https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
>
> and I trace at least two cases belong to your patch
> 49.59
> https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
>
> arning, treated as error:
> /home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
> in "code-block" directive:
> 1 argument(s) required, 0 supplied.
> .. code-block::
> {
> assigned-clocks = < K210_CLK_PLL0>;
> assigned-clock-rates = <8>;
> };
> doc/Makefile:69: recipe for target 'htmldocs' failed
> make[1]: *** [htmldocs] Error 1
I used to have
.. code-block:: dts
but it warned that "dts" was not a valid language, so I dropped it.
> 49.66
> https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
>
> ./tools/patman/patman --test && ./tools/buildman/buildman -t &&
> ./tools/dtoc/dtoc -t && make testconfig; fi; fi
> cp: cannot create regular file
> '/home/travis/build/rickchen36/sandbox/': Not a directory
> cp: cannot create regular file
> '/home/travis/build/rickchen36/sandbox/': Not a directory
> WARNING: no status info for 'sipeed_maix_bitm'
> WARNING: no maintainers for 'sipeed_maix_bitm'
I'm not sure what the issue here is. Which specific files are lacking a
MAINTAINERS entry?
>
> So I will drop your patchs and run CI again today.
> And hope you can fix them in next version and pass CI verification.
>
> Thanks,
> Rick
>
These "errors" seem rather minor. I will fix the PLIC ones in the next
revision, but I don't think the sort found in this email are
particularly erroneous.
--Sean
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
Hi Sean
> Hi Sean
>
> > This patch series adds support for Sipeed Maix boards and the Kendryte
> > K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> > models are similar.
> >
> > Known Bugs/Limitations:
> > - Accessing the AI ram hangs, limiting available ram to 6M
> > - Trying to boot an image with bootm fails with
> > ERROR: Failed to allocate 0x7d60 bytes below 0x8000.
> >
> > To flash u-boot to a maix bit, run
> > kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
> >
> > Boot output should look like the following:
> >
> > U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
> >
> > DRAM: 8 MiB
> > In:serial@3800
> > Out: serial@3800
> > Err: serial@3800
> > =>
> >
> > Changes for v8:
> > - Removed dependency on the patch "clk: Add functions to register CCF clock
> > structs". Hopefully this will make reviewing easier.
>
> I have applied this patch series to u-boot-riscv/master except [PATCH
> v8 14/21] riscv: Clean up IPI initialization code.
> Because it will cause some warnings as below:
>
> arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi':
> arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes
> integer from pointer without a cast [-Wint-conversion]
> int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
> ^~
> arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of
> 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
> if (IS_ERR(ret))
> ^~~
> In file included from arch/riscv/lib/andes_plic.c:20:0:
> include/linux/err.h:34:20: note: expected 'const void *' but argument
> is of type 'int'
> static inline long IS_ERR(const void *ptr)
> ^~
> arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of
> 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
>return PTR_ERR(ret);
> ^~~
> In file included from arch/riscv/lib/andes_plic.c:20:0:
> include/linux/err.h:29:20: note: expected 'const void *' but argument
> is of type 'int'
> static inline long PTR_ERR(const void *ptr)
> ^~~
> arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer
> from integer without a cast [-Wint-conversion]
> gd->arch.plic = ret;
>
after running CI yesterday, it failed in many cases:
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/678023975
and I trace at least two cases belong to your patch
49.59
https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024035
arning, treated as error:
/home/travis/build/rickchen36/u-boot-riscv/doc/board/sipeed/maix.rst:173:Error
in "code-block" directive:
1 argument(s) required, 0 supplied.
.. code-block::
{
assigned-clocks = < K210_CLK_PLL0>;
assigned-clock-rates = <8>;
};
doc/Makefile:69: recipe for target 'htmldocs' failed
make[1]: *** [htmldocs] Error 1
49.66
https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/678024042
./tools/patman/patman --test && ./tools/buildman/buildman -t &&
./tools/dtoc/dtoc -t && make testconfig; fi; fi
cp: cannot create regular file
'/home/travis/build/rickchen36/sandbox/': Not a directory
cp: cannot create regular file
'/home/travis/build/rickchen36/sandbox/': Not a directory
WARNING: no status info for 'sipeed_maix_bitm'
WARNING: no maintainers for 'sipeed_maix_bitm'
So I will drop your patchs and run CI again today.
And hope you can fix them in next version and pass CI verification.
Thanks,
Rick
Re: [PATCH v8 00/21] riscv: Add Sipeed Maix support
Hi Sean > This patch series adds support for Sipeed Maix boards and the Kendryte > K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other > models are similar. > > Known Bugs/Limitations: > - Accessing the AI ram hangs, limiting available ram to 6M > - Trying to boot an image with bootm fails with > ERROR: Failed to allocate 0x7d60 bytes below 0x8000. > > To flash u-boot to a maix bit, run > kflash -tp /dev/ -B bit_mic u-boot-dtb.bin > > Boot output should look like the following: > > U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500) > > DRAM: 8 MiB > In:serial@3800 > Out: serial@3800 > Err: serial@3800 > => > > Changes for v8: > - Removed dependency on the patch "clk: Add functions to register CCF clock > structs". Hopefully this will make reviewing easier. I have applied this patch series to u-boot-riscv/master except [PATCH v8 14/21] riscv: Clean up IPI initialization code. Because it will cause some warnings as below: arch/riscv/lib/andes_plic.c: In function 'riscv_init_ipi': arch/riscv/lib/andes_plic.c:84:12: warning: initialization makes integer from pointer without a cast [-Wint-conversion] int ret = syscon_get_first_range(RISCV_SYSCON_PLIC); ^~ arch/riscv/lib/andes_plic.c:86:13: warning: passing argument 1 of 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion] if (IS_ERR(ret)) ^~~ In file included from arch/riscv/lib/andes_plic.c:20:0: include/linux/err.h:34:20: note: expected 'const void *' but argument is of type 'int' static inline long IS_ERR(const void *ptr) ^~ arch/riscv/lib/andes_plic.c:87:18: warning: passing argument 1 of 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion] return PTR_ERR(ret); ^~~ In file included from arch/riscv/lib/andes_plic.c:20:0: include/linux/err.h:29:20: note: expected 'const void *' but argument is of type 'int' static inline long PTR_ERR(const void *ptr) ^~~ arch/riscv/lib/andes_plic.c:88:16: warning: assignment makes pointer from integer without a cast [-Wint-conversion] gd->arch.plic = ret; Thanks, Rick > > Changes for v7: > - Split documentation from other board support > - Split IPI clear from other IPI cleanup > - Rebased onto a clean upstream. Hopefully this fixes any patching > problems. > > Changes for v6: > - Remove spi, pinmux, gpio, led, and wdt support --- to be added in separate > patches > - Rebase onto master > - Clear IPIs before enabling them > - Reorganize code so checkpatch errors less > > Changes for v5: > - Rebase onto master > - Add pinconf support > - Add gpio support > - Store environment in spi flash > - Group patches by prefix > - Add additional documentation > - Add SMP support > - Add WDT support > > Changes for v4: > - Linted several patches > - Updated the copyright year for several files > - Added tests for syscon-reset, simple-pm-bus, and the pll calc_rate function > - Added/updated documentation > - Fixed SPI for the nor flash > - Fixed PLLs not enabling/setting rate properly > - RISCV_PRIV_1_9_1 now (un)defines all diferring CSRs, and also disables VM > - More devicetree changes > > Changes for v3: > - Remove patch to set RV64I as default > - Remove patch for a separate sysctl driver > - Split off cpu frequency patch into its own series > - Reorder support/devicetree patches to come last > - Add patch for reset driver > - Add simple-pm-bus for busses with their own clocks > - Add additional documentation > - Reword mcounteren patch to refer to the RISC-V priv spec 1.9.1 > - Many devicetree changes > - Switch to "make savedefconfig" to generate the config > > Changes for v2: > - Many bugfixes for the device tree > - Modify the config to build without errors > - Add support for keeping internal PLL frequencies in-range > - Fix several rebase-induced artifacts > > Sean Anderson (21): > clk: Always use the supplied struct clk > clk: Check that ops of composite clock components exist before calling > clk: Unconditionally recursively en-/dis-able clocks > clk: Fix clk_get_by_* handling of index > clk: Add K210 pll support > clk: Add a bypass clock for K210 > clk: Add K210 clock support > dm: Add support for simple-pm-bus > dm: Fix error handling for dev_read_addr_ptr > reset: Add generic reset driver > lib: Always set errno in hcreate_r > riscv: Add headers for asm/global_data.h > riscv: Clear pending interrupts before enabling IPIs > riscv: Clean up IPI initialization code > riscv: Add option to support RISC-V privileged spec 1.9 > riscv: Allow use of reset drivers > riscv: Try to get cpu frequency from a "clocks" node if it exists > riscv: Enable cpu clock if it is present > riscv: Add device tree for K210 and Sipeed Maix BitM > doc: riscv: Add documentation for Sipeed Maix Bit > riscv: Add Sipeed Maix support > > MAINTAINERS
[PATCH v8 00/21] riscv: Add Sipeed Maix support
This patch series adds support for Sipeed Maix boards and the Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other models are similar. Known Bugs/Limitations: - Accessing the AI ram hangs, limiting available ram to 6M - Trying to boot an image with bootm fails with ERROR: Failed to allocate 0x7d60 bytes below 0x8000. To flash u-boot to a maix bit, run kflash -tp /dev/ -B bit_mic u-boot-dtb.bin Boot output should look like the following: U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500) DRAM: 8 MiB In:serial@3800 Out: serial@3800 Err: serial@3800 => Changes for v8: - Removed dependency on the patch "clk: Add functions to register CCF clock structs". Hopefully this will make reviewing easier. Changes for v7: - Split documentation from other board support - Split IPI clear from other IPI cleanup - Rebased onto a clean upstream. Hopefully this fixes any patching problems. Changes for v6: - Remove spi, pinmux, gpio, led, and wdt support --- to be added in separate patches - Rebase onto master - Clear IPIs before enabling them - Reorganize code so checkpatch errors less Changes for v5: - Rebase onto master - Add pinconf support - Add gpio support - Store environment in spi flash - Group patches by prefix - Add additional documentation - Add SMP support - Add WDT support Changes for v4: - Linted several patches - Updated the copyright year for several files - Added tests for syscon-reset, simple-pm-bus, and the pll calc_rate function - Added/updated documentation - Fixed SPI for the nor flash - Fixed PLLs not enabling/setting rate properly - RISCV_PRIV_1_9_1 now (un)defines all diferring CSRs, and also disables VM - More devicetree changes Changes for v3: - Remove patch to set RV64I as default - Remove patch for a separate sysctl driver - Split off cpu frequency patch into its own series - Reorder support/devicetree patches to come last - Add patch for reset driver - Add simple-pm-bus for busses with their own clocks - Add additional documentation - Reword mcounteren patch to refer to the RISC-V priv spec 1.9.1 - Many devicetree changes - Switch to "make savedefconfig" to generate the config Changes for v2: - Many bugfixes for the device tree - Modify the config to build without errors - Add support for keeping internal PLL frequencies in-range - Fix several rebase-induced artifacts Sean Anderson (21): clk: Always use the supplied struct clk clk: Check that ops of composite clock components exist before calling clk: Unconditionally recursively en-/dis-able clocks clk: Fix clk_get_by_* handling of index clk: Add K210 pll support clk: Add a bypass clock for K210 clk: Add K210 clock support dm: Add support for simple-pm-bus dm: Fix error handling for dev_read_addr_ptr reset: Add generic reset driver lib: Always set errno in hcreate_r riscv: Add headers for asm/global_data.h riscv: Clear pending interrupts before enabling IPIs riscv: Clean up IPI initialization code riscv: Add option to support RISC-V privileged spec 1.9 riscv: Allow use of reset drivers riscv: Try to get cpu frequency from a "clocks" node if it exists riscv: Enable cpu clock if it is present riscv: Add device tree for K210 and Sipeed Maix BitM doc: riscv: Add documentation for Sipeed Maix Bit riscv: Add Sipeed Maix support MAINTAINERS | 7 + arch/riscv/Kconfig| 14 + arch/riscv/cpu/cpu.c | 15 + arch/riscv/cpu/start.S| 2 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/k210-maix-bit.dts | 47 ++ arch/riscv/dts/k210.dtsi | 594 arch/riscv/include/asm/csr.h | 40 ++ arch/riscv/include/asm/global_data.h | 2 + arch/riscv/include/asm/smp.h | 43 ++ arch/riscv/lib/andes_plic.c | 34 +- arch/riscv/lib/reset.c| 2 + arch/riscv/lib/sbi_ipi.c | 5 + arch/riscv/lib/sifive_clint.c | 33 +- arch/riscv/lib/smp.c | 56 +- arch/sandbox/dts/test.dts | 21 + arch/sandbox/include/asm/clk.h| 1 + board/sipeed/maix/Kconfig | 47 ++ board/sipeed/maix/MAINTAINERS | 11 + board/sipeed/maix/Makefile| 5 + board/sipeed/maix/maix.c | 41 ++ configs/sandbox_defconfig | 3 + configs/sipeed_maix_bitm_defconfig| 8 + doc/board/index.rst | 1 + doc/board/sipeed/index.rst| 9 + doc/board/sipeed/maix.rst | 298 .../bus/simple-pm-bus.txt | 44 ++ .../mfd/kendryte,k210-sysctl.txt | 33 + .../reset/syscon-reset.txt
