[U-Boot] [PATCH] AT91RM9200: real pointer variable for PORT A to D configuration
adds real pointer variable for use with use I/O accessors * defines for PORT A to D configuration registers * defines for SMC configuration registers Signed-off-by: Jens Scharsig e...@bus-elektronik.de --- diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 00bae1c..1b4667e 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -251,6 +251,15 @@ typedef struct _AT91S_SMC2 AT91_REG SMC2_CSR[8]; /* SMC2 Chip Select Register */ } AT91S_SMC2, *AT91PS_SMC2; +#define AT91C_SMC_CSR0 ((AT91_REG *) 0xFF70) +#define AT91C_SMC_CSR1 ((AT91_REG *) 0xFF74) +#define AT91C_SMC_CSR2 ((AT91_REG *) 0xFF78) +#define AT91C_SMC_CSR3 ((AT91_REG *) 0xFF7C) +#define AT91C_SMC_CSR4 ((AT91_REG *) 0xFF80) +#define AT91C_SMC_CSR5 ((AT91_REG *) 0xFF84) +#define AT91C_SMC_CSR6 ((AT91_REG *) 0xFF88) +#define AT91C_SMC_CSR7 ((AT91_REG *) 0xFF8C) + /* SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register */ #define AT91C_SMC2_NWS ((unsigned int) 0x7F 0) /* (SMC2) Number of Wait States */ #define AT91C_SMC2_WSEN((unsigned int) 0x1 7) /* (SMC2) Wait State Enable */ @@ -586,6 +595,7 @@ typedef struct _AT91S_PDC #define AT91C_PMC_PCDR ((AT91_REG *) 0xFC14) /* (PMC) Peripheral Clock Enable Register */ #define AT91C_PMC_SCER ((AT91_REG *) 0xFC00) /* (PMC) Peripheral Clock Enable Register */ #define AT91C_PMC_SCDR ((AT91_REG *) 0xFC04) /* (PMC) Peripheral Clock Enable Register */ + #define AT91C_PIOA_PER ((AT91_REG *) 0xF400) /* (PIOA) PIO Enable Register */ #define AT91C_PIOA_PDR ((AT91_REG *) 0xF404) /* (PIOA) PIO Disable Register */ #define AT91C_PIOA_PSR ((AT91_REG *) 0xF408) /* (PIOA) PIO Status Register */ @@ -615,7 +625,96 @@ typedef struct _AT91S_PDC #define AT91C_PIOA_OWER((AT91_REG *) 0xF4A0) /* (PIOA) PIO Output Write Enable Register */ #define AT91C_PIOA_OWDR((AT91_REG *) 0xF4A4) /* (PIOA) PIO Output Write Disable Register */ #define AT91C_PIOA_OWSR((AT91_REG *) 0xF4A8) /* (PIOA) PIO Output Write Status Register */ -#define AT91C_PIOB_PDR ((AT91_REG *) 0xF604) /* (PIOB) PIO Disable Register */ + +#define AT91C_PIOB_PER ((AT91_REG *) 0xF600) +#define AT91C_PIOB_PDR ((AT91_REG *) 0xF604) +#define AT91C_PIOB_PSR ((AT91_REG *) 0xF608) +#define AT91C_PIOB_OER ((AT91_REG *) 0xF610) +#define AT91C_PIOB_ODR ((AT91_REG *) 0xF614) +#define AT91C_PIOB_OSR ((AT91_REG *) 0xF618) +#define AT91C_PIOB_IFER((AT91_REG *) 0xF620) +#define AT91C_PIOB_IFDR((AT91_REG *) 0xF624) +#define AT91C_PIOB_IFSR((AT91_REG *) 0xF628) +#define AT91C_PIOB_SODR((AT91_REG *) 0xF630) +#define AT91C_PIOB_CODR((AT91_REG *) 0xF634) +#define AT91C_PIOB_ODSR((AT91_REG *) 0xF638) +#define AT91C_PIOB_PDSR((AT91_REG *) 0xF63C) +#define AT91C_PIOB_IER ((AT91_REG *) 0xF640) +#define AT91C_PIOB_IDR ((AT91_REG *) 0xF644) +#define AT91C_PIOB_IMR ((AT91_REG *) 0xF648) +#define AT91C_PIOB_ISR ((AT91_REG *) 0xF64C) +#define AT91C_PIOB_MDER((AT91_REG *) 0xF650) +#define AT91C_PIOB_MDDR((AT91_REG *) 0xF654) +#define AT91C_PIOB_MDSR((AT91_REG *) 0xF658) +#define AT91C_PIOB_PUDR((AT91_REG *) 0xF660) +#define AT91C_PIOB_PUER((AT91_REG *) 0xF664) +#define AT91C_PIOB_PUSR((AT91_REG *) 0xF668) +#define AT91C_PIOB_ASR ((AT91_REG *) 0xF670) +#define AT91C_PIOB_BSR ((AT91_REG *) 0xF674) +#define AT91C_PIOB_ABSR((AT91_REG *) 0xF678) +#define AT91C_PIOB_OWER((AT91_REG *) 0xF6A0) +#define AT91C_PIOB_OWDR((AT91_REG *) 0xF6A4) +#define AT91C_PIOB_OWSR((AT91_REG *) 0xF6A8) + +#define AT91C_PIOC_PER ((AT91_REG *) 0xF800) +#define AT91C_PIOC_PDR ((AT91_REG *) 0xF804) +#define AT91C_PIOC_PSR ((AT91_REG *) 0xF808) +#define AT91C_PIOC_OER ((AT91_REG *) 0xF810) +#define AT91C_PIOC_ODR ((AT91_REG *) 0xF814) +#define AT91C_PIOC_OSR ((AT91_REG *) 0xF818) +#define AT91C_PIOC_IFER((AT91_REG *) 0xF820) +#define AT91C_PIOC_IFDR((AT91_REG *) 0xF824) +#define AT91C_PIOC_IFSR((AT91_REG
Re: [U-Boot] [PATCH] AT91RM9200: real pointer variable for PORT A to D configuration
adds real pointer variable for use with use I/O accessors * defines for PORT A to D configuration registers * defines for SMC configuration registers Signed-off-by: Jens Scharsig e...@bus-elektronik.de This includes all changes from [PATCH] AT91RM9200 BGA port D defines Best regards Jens Scharsig ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] AT91RM9200: real pointer variable for PORT A to D configuration
Dear Jens Scharsig, In message 4ae832f4.2090...@bus-elektronik.de you wrote: adds real pointer variable for use with use I/O accessors * defines for PORT A to D configuration registers * defines for SMC configuration registers Signed-off-by: Jens Scharsig e...@bus-elektronik.de --- NAK. diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 00bae1c..1b4667e 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -251,6 +251,15 @@ typedef struct _AT91S_SMC2 AT91_REG SMC2_CSR[8]; /* SMC2 Chip Select Register */ } AT91S_SMC2, *AT91PS_SMC2; +#define AT91C_SMC_CSR0 ((AT91_REG *) 0xFF70) +#define AT91C_SMC_CSR1 ((AT91_REG *) 0xFF74) +#define AT91C_SMC_CSR2 ((AT91_REG *) 0xFF78) +#define AT91C_SMC_CSR3 ((AT91_REG *) 0xFF7C) +#define AT91C_SMC_CSR4 ((AT91_REG *) 0xFF80) +#define AT91C_SMC_CSR5 ((AT91_REG *) 0xFF84) +#define AT91C_SMC_CSR6 ((AT91_REG *) 0xFF88) +#define AT91C_SMC_CSR7 ((AT91_REG *) 0xFF8C) Please declare this as a C struct. /* SMC2_CSR : (SMC2 Offset: 0x0) SMC2 Chip Select Register */ #define AT91C_SMC2_NWS ((unsigned int) 0x7F 0) /* (SMC2) Number of Wait States */ #define AT91C_SMC2_WSEN ((unsigned int) 0x1 7) /* (SMC2) Wait State Enable */ @@ -586,6 +595,7 @@ typedef struct _AT91S_PDC #define AT91C_PMC_PCDR ((AT91_REG *) 0xFC14) /* (PMC) Peripheral Clock Enable Register */ #define AT91C_PMC_SCER ((AT91_REG *) 0xFC00) /* (PMC) Peripheral Clock Enable Register */ #define AT91C_PMC_SCDR ((AT91_REG *) 0xFC04) /* (PMC) Peripheral Clock Enable Register */ + #define AT91C_PIOA_PER ((AT91_REG *) 0xF400) /* (PIOA) PIO Enable Register */ #define AT91C_PIOA_PDR ((AT91_REG *) 0xF404) /* (PIOA) PIO Disable Register */ #define AT91C_PIOA_PSR ((AT91_REG *) 0xF408) /* (PIOA) PIO Status Register */ @@ -615,7 +625,96 @@ typedef struct _AT91S_PDC #define AT91C_PIOA_OWER ((AT91_REG *) 0xF4A0) /* (PIOA) PIO Output Write Enable Register */ #define AT91C_PIOA_OWDR ((AT91_REG *) 0xF4A4) /* (PIOA) PIO Output Write Disable Register */ #define AT91C_PIOA_OWSR ((AT91_REG *) 0xF4A8) /* (PIOA) PIO Output Write Status Register */ -#define AT91C_PIOB_PDR ((AT91_REG *) 0xF604) /* (PIOB) PIO Disable Register */ + +#define AT91C_PIOB_PER ((AT91_REG *) 0xF600) +#define AT91C_PIOB_PDR ((AT91_REG *) 0xF604) +#define AT91C_PIOB_PSR ((AT91_REG *) 0xF608) +#define AT91C_PIOB_OER ((AT91_REG *) 0xF610) +#define AT91C_PIOB_ODR ((AT91_REG *) 0xF614) +#define AT91C_PIOB_OSR ((AT91_REG *) 0xF618) +#define AT91C_PIOB_IFER ((AT91_REG *) 0xF620) +#define AT91C_PIOB_IFDR ((AT91_REG *) 0xF624) +#define AT91C_PIOB_IFSR ((AT91_REG *) 0xF628) +#define AT91C_PIOB_SODR ((AT91_REG *) 0xF630) +#define AT91C_PIOB_CODR ((AT91_REG *) 0xF634) +#define AT91C_PIOB_ODSR ((AT91_REG *) 0xF638) +#define AT91C_PIOB_PDSR ((AT91_REG *) 0xF63C) +#define AT91C_PIOB_IER ((AT91_REG *) 0xF640) +#define AT91C_PIOB_IDR ((AT91_REG *) 0xF644) +#define AT91C_PIOB_IMR ((AT91_REG *) 0xF648) +#define AT91C_PIOB_ISR ((AT91_REG *) 0xF64C) +#define AT91C_PIOB_MDER ((AT91_REG *) 0xF650) +#define AT91C_PIOB_MDDR ((AT91_REG *) 0xF654) +#define AT91C_PIOB_MDSR ((AT91_REG *) 0xF658) +#define AT91C_PIOB_PUDR ((AT91_REG *) 0xF660) +#define AT91C_PIOB_PUER ((AT91_REG *) 0xF664) +#define AT91C_PIOB_PUSR ((AT91_REG *) 0xF668) +#define AT91C_PIOB_ASR ((AT91_REG *) 0xF670) +#define AT91C_PIOB_BSR ((AT91_REG *) 0xF674) +#define AT91C_PIOB_ABSR ((AT91_REG *) 0xF678) +#define AT91C_PIOB_OWER ((AT91_REG *) 0xF6A0) +#define AT91C_PIOB_OWDR ((AT91_REG *) 0xF6A4) +#define AT91C_PIOB_OWSR ((AT91_REG *) 0xF6A8) + +#define AT91C_PIOC_PER ((AT91_REG *) 0xF800) +#define AT91C_PIOC_PDR ((AT91_REG *) 0xF804) +#define AT91C_PIOC_PSR ((AT91_REG *) 0xF808) +#define
