Re: [U-Boot] [PATCH] Add i.MX6 CPU temperature sensor support
On Sun, Aug 31, 2014 at 12:03 PM, wrote:
> From: Nitin Garg
>
> Support CPU temperature sensors on i.MX6 SoC.
>
> Signed-off-by: Nitin Garg
Please run checkpatch on all the patches and fix the issues prior to
submitting them:
CHECK: Alignment should match open parenthesis
#67: FILE: arch/arm/cpu/armv7/mx6/soc.c:251:
+writel(BM_ANADIG_USB1_PLL_480_CTRL_POWER,
+&anatop->usb1_pll_480_ctrl_set);
CHECK: Alignment should match open parenthesis
#75: FILE: arch/arm/cpu/armv7/mx6/soc.c:259:
+writel(BM_ANADIG_USB1_PLL_480_CTRL_BYPASS,
+&anatop->usb1_pll_480_ctrl_clr);
CHECK: Alignment should match open parenthesis
#78: FILE: arch/arm/cpu/armv7/mx6/soc.c:262:
+writel(BM_ANADIG_USB1_PLL_480_CTRL_ENABLE,
+&anatop->usb1_pll_480_ctrl_set);
CHECK: braces {} should be used on all arms of this statement
#157: FILE: arch/arm/cpu/armv7/mx6/soc.c:341:
+if (cpu_tmp >= TEMPERATURE_HOT) {
[...]
+} else
[...]
CHECK: Alignment should match open parenthesis
#159: FILE: arch/arm/cpu/armv7/mx6/soc.c:343:
+printf("CPU is %d C, too hot to boot, waiting...\n",
+cpu_tmp);
CHECK: Alignment should match open parenthesis
#167: FILE: arch/arm/cpu/armv7/mx6/soc.c:351:
+printf("CPU: Temperature %d C, calibration data: 0x%x\n",
+cpu_tmp, fuse);
CHECK: extern prototypes should be avoided in .h files
#785: FILE: arch/arm/include/asm/arch-mx6/imx-regs.h:814:
+extern void check_cpu_temperature(void);
total: 1 errors, 0 warnings, 7 checks, 749 lines checked
NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX
MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE
USLEEP_RANGE
> ---
> arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
> arch/arm/imx-common/cpu.c|7 +-
> arch/arm/include/asm/arch-mx6/crm_regs.h | 543
> +-
> arch/arm/include/asm/arch-mx6/imx-regs.h |9 +-
> 4 files changed, 692 insertions(+), 4 deletions(-)
It would be better to add a config option for this temperature sensor support.
This would allow people to disable it if they are not interested in
this feature without increasing the final U-boot binary size.
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Re: [U-Boot] [PATCH] Add i.MX6 CPU temperature sensor support
Hi Nitin, On Sun, Aug 31, 2014 at 12:03 PM, wrote: > From: Nitin Garg > > This patch adds support for i.MX6 on chip temperature sensor support. > > Nitin Garg (1): > Add i.MX6 CPU temperature sensor support > > arch/arm/cpu/armv7/mx6/soc.c | 137 +++- > arch/arm/imx-common/cpu.c|7 +- > arch/arm/include/asm/arch-mx6/crm_regs.h | 543 > +- > arch/arm/include/asm/arch-mx6/imx-regs.h |9 +- > 4 files changed, 692 insertions(+), 4 deletions(-) Please always Cc Stefano Babic on all the imx related patches. Also, there is no need to provide a cover-letter for a single patch. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Add i.MX6 CPU temperature sensor support
From: Nitin Garg This patch adds support for i.MX6 on chip temperature sensor support. Nitin Garg (1): Add i.MX6 CPU temperature sensor support arch/arm/cpu/armv7/mx6/soc.c | 137 +++- arch/arm/imx-common/cpu.c|7 +- arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +- arch/arm/include/asm/arch-mx6/imx-regs.h |9 +- 4 files changed, 692 insertions(+), 4 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Add i.MX6 CPU temperature sensor support
From: Nitin Garg
Support CPU temperature sensors on i.MX6 SoC.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +-
arch/arm/include/asm/arch-mx6/imx-regs.h |9 +-
4 files changed, 692 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index ac84a1f..8aacdaf 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -2,7 +2,7 @@
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009-2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -35,6 +35,18 @@ struct scu_regs {
u32 fpga_rev;
};
+#define TEMPERATURE_MIN-40
+#define TEMPERATURE_HOT80
+#define TEMPERATURE_MAX125
+#define FACTOR115976
+#define FACTOR24297157
+#define MEASURE_FREQ 327
+
+#define REG_VALUE_TO_CEL(ratio, raw) \
+ ((raw_n40c - raw) * 100 / ratio - 40)
+
+static unsigned int fuse = ~0;
+
u32 get_nr_cpus(void)
{
struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
@@ -218,6 +230,129 @@ static void imx_set_wdog_powerdown(bool enable)
writew(enable, &wdog2->wmcr);
}
+static int read_cpu_temperature(void)
+{
+ int temperature;
+ unsigned int ccm_ccgr2;
+ unsigned int reg, tmp;
+ unsigned int raw_25c, raw_n40c, ratio;
+ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank *bank = &ocotp->bank[1];
+ struct fuse_bank1_regs *fuse_bank1 =
+ (struct fuse_bank1_regs *)bank->fuse_regs;
+
+ /* need to make sure pll3 is enabled for thermal sensor */
+ if ((readl(&anatop->usb1_pll_480_ctrl) &
+ BM_ANADIG_USB1_PLL_480_CTRL_LOCK) == 0) {
+ /* enable pll's power */
+ writel(BM_ANADIG_USB1_PLL_480_CTRL_POWER,
+ &anatop->usb1_pll_480_ctrl_set);
+ writel(0x80, &anatop->ana_misc2_clr);
+ /* wait for pll lock */
+ while ((readl(&anatop->usb1_pll_480_ctrl) &
+ BM_ANADIG_USB1_PLL_480_CTRL_LOCK) == 0)
+ ;
+ /* disable bypass */
+ writel(BM_ANADIG_USB1_PLL_480_CTRL_BYPASS,
+ &anatop->usb1_pll_480_ctrl_clr);
+ /* enable pll output */
+ writel(BM_ANADIG_USB1_PLL_480_CTRL_ENABLE,
+ &anatop->usb1_pll_480_ctrl_set);
+ }
+
+ ccm_ccgr2 = readl(&mxc_ccm->CCGR2);
+ /* enable OCOTP_CTRL clock in CCGR2 */
+ writel(ccm_ccgr2 | MXC_CCM_CCGR2_OCOTP_CTRL_MASK, &mxc_ccm->CCGR2);
+ fuse = readl(&fuse_bank1->ana1);
+
+ /* restore CCGR2 */
+ writel(ccm_ccgr2, &mxc_ccm->CCGR2);
+
+ if (fuse == 0 || fuse == 0x || (fuse & 0xfff0) == 0)
+ return TEMPERATURE_MIN;
+
+ /*
+* fuse data layout:
+* [31:20] sensor value @ 25C
+* [19:8] sensor value of hot
+* [7:0] hot temperature value
+*/
+ raw_25c = fuse >> 20;
+
+ /*
+* The universal equation for thermal sensor
+* is slope = 0.4297157 - (0.0015976 * 25C fuse),
+* here we convert them to integer to make them
+* easy for counting, FACTOR1 is 15976,
+* FACTOR2 is 4297157. Our ratio = -100 * slope
+*/
+ ratio = ((FACTOR1 * raw_25c - FACTOR2) + 5) / 10;
+
+ debug("Thermal sensor with ratio = %d\n", ratio);
+
+ raw_n40c = raw_25c + (13 * ratio) / 20;
+
+ /*
+* now we only use single measure, every time we read
+* the temperature, we will power on/down anadig thermal
+* module
+*/
+ writel(BM_ANADIG_TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_clr);
+ writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+
+ /* write measure freq */
+ reg = readl(&anatop->tempsense1);
+ reg &= ~BM_ANADIG_TEMPSENSE1_MEASURE_FREQ;
+ reg |= MEASURE_FREQ;
+ writel(reg, &anatop->tempsense1);
+
+ writel(BM_ANADIG_TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_clr);
+ writel(BM_ANADIG_TEMPSENSE0_FINISHED, &anatop->tempsense0_clr);
+ writel(BM_ANADIG_TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_set);
+
+ while ((readl(&anatop->tempsense0) &
+ BM_ANADIG_TEMPSENSE0_FINISHED) == 0)
+ udelay(1);
+
+ reg = readl(&anatop->tempsense0);
+ tmp = (reg & BM_ANADIG_TEMPSENSE0_TEMP_VAL
[U-Boot] [PATCH] Add i.MX6 CPU temperature sensor support
From: Nitin Garg This patch adds support for i.MX6 on chip temperature sensor support. Nitin Garg (1): Add i.MX6 CPU temperature sensor support arch/arm/cpu/armv7/mx6/soc.c | 137 +++- arch/arm/imx-common/cpu.c|7 +- arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +- arch/arm/include/asm/arch-mx6/imx-regs.h |9 +- 4 files changed, 692 insertions(+), 4 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Add i.MX6 CPU temperature sensor support
From: Nitin Garg
Support CPU temperature sensors on i.MX6 SoC.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +-
arch/arm/include/asm/arch-mx6/imx-regs.h |9 +-
4 files changed, 692 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index ac84a1f..8aacdaf 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -2,7 +2,7 @@
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009-2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -35,6 +35,18 @@ struct scu_regs {
u32 fpga_rev;
};
+#define TEMPERATURE_MIN-40
+#define TEMPERATURE_HOT80
+#define TEMPERATURE_MAX125
+#define FACTOR115976
+#define FACTOR24297157
+#define MEASURE_FREQ 327
+
+#define REG_VALUE_TO_CEL(ratio, raw) \
+ ((raw_n40c - raw) * 100 / ratio - 40)
+
+static unsigned int fuse = ~0;
+
u32 get_nr_cpus(void)
{
struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
@@ -218,6 +230,129 @@ static void imx_set_wdog_powerdown(bool enable)
writew(enable, &wdog2->wmcr);
}
+static int read_cpu_temperature(void)
+{
+ int temperature;
+ unsigned int ccm_ccgr2;
+ unsigned int reg, tmp;
+ unsigned int raw_25c, raw_n40c, ratio;
+ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank *bank = &ocotp->bank[1];
+ struct fuse_bank1_regs *fuse_bank1 =
+ (struct fuse_bank1_regs *)bank->fuse_regs;
+
+ /* need to make sure pll3 is enabled for thermal sensor */
+ if ((readl(&anatop->usb1_pll_480_ctrl) &
+ BM_ANADIG_USB1_PLL_480_CTRL_LOCK) == 0) {
+ /* enable pll's power */
+ writel(BM_ANADIG_USB1_PLL_480_CTRL_POWER,
+ &anatop->usb1_pll_480_ctrl_set);
+ writel(0x80, &anatop->ana_misc2_clr);
+ /* wait for pll lock */
+ while ((readl(&anatop->usb1_pll_480_ctrl) &
+ BM_ANADIG_USB1_PLL_480_CTRL_LOCK) == 0)
+ ;
+ /* disable bypass */
+ writel(BM_ANADIG_USB1_PLL_480_CTRL_BYPASS,
+ &anatop->usb1_pll_480_ctrl_clr);
+ /* enable pll output */
+ writel(BM_ANADIG_USB1_PLL_480_CTRL_ENABLE,
+ &anatop->usb1_pll_480_ctrl_set);
+ }
+
+ ccm_ccgr2 = readl(&mxc_ccm->CCGR2);
+ /* enable OCOTP_CTRL clock in CCGR2 */
+ writel(ccm_ccgr2 | MXC_CCM_CCGR2_OCOTP_CTRL_MASK, &mxc_ccm->CCGR2);
+ fuse = readl(&fuse_bank1->ana1);
+
+ /* restore CCGR2 */
+ writel(ccm_ccgr2, &mxc_ccm->CCGR2);
+
+ if (fuse == 0 || fuse == 0x || (fuse & 0xfff0) == 0)
+ return TEMPERATURE_MIN;
+
+ /*
+* fuse data layout:
+* [31:20] sensor value @ 25C
+* [19:8] sensor value of hot
+* [7:0] hot temperature value
+*/
+ raw_25c = fuse >> 20;
+
+ /*
+* The universal equation for thermal sensor
+* is slope = 0.4297157 - (0.0015976 * 25C fuse),
+* here we convert them to integer to make them
+* easy for counting, FACTOR1 is 15976,
+* FACTOR2 is 4297157. Our ratio = -100 * slope
+*/
+ ratio = ((FACTOR1 * raw_25c - FACTOR2) + 5) / 10;
+
+ debug("Thermal sensor with ratio = %d\n", ratio);
+
+ raw_n40c = raw_25c + (13 * ratio) / 20;
+
+ /*
+* now we only use single measure, every time we read
+* the temperature, we will power on/down anadig thermal
+* module
+*/
+ writel(BM_ANADIG_TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_clr);
+ writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+
+ /* write measure freq */
+ reg = readl(&anatop->tempsense1);
+ reg &= ~BM_ANADIG_TEMPSENSE1_MEASURE_FREQ;
+ reg |= MEASURE_FREQ;
+ writel(reg, &anatop->tempsense1);
+
+ writel(BM_ANADIG_TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_clr);
+ writel(BM_ANADIG_TEMPSENSE0_FINISHED, &anatop->tempsense0_clr);
+ writel(BM_ANADIG_TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_set);
+
+ while ((readl(&anatop->tempsense0) &
+ BM_ANADIG_TEMPSENSE0_FINISHED) == 0)
+ udelay(1);
+
+ reg = readl(&anatop->tempsense0);
+ tmp = (reg & BM_ANADIG_TEMPSENSE0_TEMP_VAL
