[U-Boot] [PATCH] am335x: Enable DDR PHY dynamic power down bit for DDR3 boards

2013-03-15 Thread Vaibhav Hiremath 
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.

This also helps in reducing overall power consumption in
low power states (suspend/standby).

Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
Cc: Tom Rini tr...@ti.com
---
 arch/arm/include/asm/arch-am33xx/ddr_defs.h |1 +
 board/ti/am335x/board.c |6 --
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h 
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index ae43ef8..7ab3baf 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -28,6 +28,7 @@
 #define VTP_CTRL_START_EN  (0x1)
 #define PHY_DLL_LOCK_DIFF  0x0
 #define DDR_CKE_CTRL_NORMAL0x1
+#define PHY_EN_DYN_PWRDN   (0x1  20)
 
 /* Micron MT47H128M16RT-25E */
 #define MT47H128M16RT25E_EMIF_READ_LATENCY 0x15
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 48e6896..22d7b25 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
.sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
.sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
.zq_config = MT41J128MJT125_ZQ_CFG,
-   .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
+   .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
+   PHY_EN_DYN_PWRDN,
 };
 
 static struct emif_regs ddr3_evm_emif_reg_data = {
@@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
.sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
.sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
.zq_config = MT41J512M8RH125_ZQ_CFG,
-   .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
+   .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+   PHY_EN_DYN_PWRDN,
 };
 #endif
 
-- 
1.7.0.4

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Re: [U-Boot] [PATCH] am335x: Enable DDR PHY dynamic power down bit for DDR3 boards

2013-03-15 Thread Tom Rini 
On Fri, Mar 15, 2013 at 12:41:16PM +0530, Vaibhav Hiremath wrote:

 Enable DDR PHY dynamic power down bit, which enables
 powering down the IO receiver when not performing read.
 
 This also helps in reducing overall power consumption in
 low power states (suspend/standby).
 
 Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
 Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
 Cc: Tom Rini tr...@ti.com
 ---
  arch/arm/include/asm/arch-am33xx/ddr_defs.h |1 +
  board/ti/am335x/board.c |6 --
  2 files changed, 5 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h 
 b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
 index ae43ef8..7ab3baf 100644
 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
 +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
 @@ -28,6 +28,7 @@
  #define VTP_CTRL_START_EN(0x1)
  #define PHY_DLL_LOCK_DIFF0x0
  #define DDR_CKE_CTRL_NORMAL  0x1
 +#define PHY_EN_DYN_PWRDN (0x1  20)
  
  /* Micron MT47H128M16RT-25E */
  #define MT47H128M16RT25E_EMIF_READ_LATENCY   0x15
 diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
 index 48e6896..22d7b25 100644
 --- a/board/ti/am335x/board.c
 +++ b/board/ti/am335x/board.c
 @@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
   .sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
   .sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
   .zq_config = MT41J128MJT125_ZQ_CFG,
 - .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
 + .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
 + PHY_EN_DYN_PWRDN,
  };
  
  static struct emif_regs ddr3_evm_emif_reg_data = {
 @@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
   .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
   .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
   .zq_config = MT41J512M8RH125_ZQ_CFG,
 - .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
 + .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
 + PHY_EN_DYN_PWRDN,
  };
  #endif

Reviewed-by: Tom Rini tr...@ti.com

Lars, I suspect pcm051 also could use a change like this.

-- 
Tom


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Re: [U-Boot] [PATCH] am335x: Enable DDR PHY dynamic power down bit for DDR3 boards

2013-03-15 Thread Lars Poeschel 
On Friday 15 March 2013 at 16:05:24, Tom Rini wrote:
 On Fri, Mar 15, 2013 at 12:41:16PM +0530, Vaibhav Hiremath wrote:
  Enable DDR PHY dynamic power down bit, which enables
  powering down the IO receiver when not performing read.
  
  This also helps in reducing overall power consumption in
  low power states (suspend/standby).
  
  Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
  Signed-off-by: Satyanarayana, Sandhya sandhya.satyanaray...@ti.com
  Cc: Tom Rini tr...@ti.com
  ---
  
   arch/arm/include/asm/arch-am33xx/ddr_defs.h |1 +
   board/ti/am335x/board.c |6 --
   2 files changed, 5 insertions(+), 2 deletions(-)
  
  diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
  b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index ae43ef8..7ab3baf
  100644
  --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
  +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
  @@ -28,6 +28,7 @@
  
   #define VTP_CTRL_START_EN  (0x1)
   #define PHY_DLL_LOCK_DIFF  0x0
   #define DDR_CKE_CTRL_NORMAL0x1
  
  +#define PHY_EN_DYN_PWRDN   (0x1  20)
  
   /* Micron MT47H128M16RT-25E */
   #define MT47H128M16RT25E_EMIF_READ_LATENCY 0x15
  
  diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
  index 48e6896..22d7b25 100644
  --- a/board/ti/am335x/board.c
  +++ b/board/ti/am335x/board.c
  @@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = {
  
  .sdram_tim2 = MT41J128MJT125_EMIF_TIM2,
  .sdram_tim3 = MT41J128MJT125_EMIF_TIM3,
  .zq_config = MT41J128MJT125_ZQ_CFG,
  
  -   .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY,
  +   .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
  +   PHY_EN_DYN_PWRDN,
  
   };
   
   static struct emif_regs ddr3_evm_emif_reg_data = {
  
  @@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
  
  .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
  .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
  .zq_config = MT41J512M8RH125_ZQ_CFG,
  
  -   .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY,
  +   .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
  +   PHY_EN_DYN_PWRDN,
  
   };
   #endif
 
 Reviewed-by: Tom Rini tr...@ti.com
 
 Lars, I suspect pcm051 also could use a change like this.

Many thanks for the hint! Yes, I think this could also be of use for pcm051. 
I can care about it and make a patch for pcm051 after my two weeks holiday :)

Lars
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