Re: [U-Boot] [PATCH] am33xx: Stop modifying certain EMIF4D registers
Hi, On Thu, Nov 7, 2013 at 4:16 PM, Tom Rini tr...@ti.com wrote: It's an open question on if TI81xx needs these set or was simply also setting them for historical reasons (and in turn was inherited by am335x). Based on Matt's test TI814x looks ok. I recall putting this code there for PG1.0 of TI8168 but i'm not sure if that version of silicon is out in the wild. If someone reports any issues with TI8168 it should be trivial to add this back in. For now this change looks fine to me. Regards, Vaibhav ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] am33xx: Stop modifying certain EMIF4D registers
On Thu, Nov 07, 2013 at 11:42:57AM -0500, Tom Rini wrote: Based on the definitive guide to EMIF configuration[1] certain registers that we have been modifying (and are documented registers) should be left in their reset values rather than modified. This has been tested on AM335x GP EVM and Beaglebone White. [1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips Cc: Enric Balletbo i Serra eballe...@iseebcn.com Cc: Javier Martinez Canillas jav...@dowhile0.org Cc: Heiko Schocher h...@denx.de Cc: Matt Porter matt.por...@linaro.org Cc: Lars Poeschel poesc...@lemonage.de Signed-off-by: Tom Rini tr...@ti.com --- arch/arm/cpu/armv7/am33xx/ddr.c |7 -- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 31 ++- board/isee/igep0033/board.c |4 board/phytec/pcm051/board.c |4 board/siemens/dxr2/board.c |4 board/siemens/pxm2/board.c |5 - board/siemens/rut/board.c |5 - board/ti/am335x/board.c | 17 --- board/ti/ti814x/evm.c |5 - board/ti/ti816x/evm.c | 17 --- 10 files changed, 6 insertions(+), 93 deletions(-) Working on my PG1.0 TI814x EVM Tested-by: Matt Porter matt.por...@linaro.org -Matt ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] am33xx: Stop modifying certain EMIF4D registers
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
Cc: Enric Balletbo i Serra eballe...@iseebcn.com
Cc: Javier Martinez Canillas jav...@dowhile0.org
Cc: Heiko Schocher h...@denx.de
Cc: Matt Porter matt.por...@linaro.org
Cc: Lars Poeschel poesc...@lemonage.de
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/armv7/am33xx/ddr.c |7 --
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 31 ++-
board/isee/igep0033/board.c |4
board/phytec/pcm051/board.c |4
board/siemens/dxr2/board.c |4
board/siemens/pxm2/board.c |5 -
board/siemens/rut/board.c |5 -
board/ti/am335x/board.c | 17 ---
board/ti/ti814x/evm.c |5 -
board/ti/ti816x/evm.c | 17 ---
10 files changed, 6 insertions(+), 93 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index fa697c7..5b0454c 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -89,15 +89,12 @@ void config_ddr_phy(const struct emif_regs *regs, int nr)
void config_cmd_ctrl(const struct cmd_control *cmd, int nr)
{
writel(cmd-cmd0csratio, ddr_cmd_reg[nr]-cm0csratio);
- writel(cmd-cmd0dldiff, ddr_cmd_reg[nr]-cm0dldiff);
writel(cmd-cmd0iclkout, ddr_cmd_reg[nr]-cm0iclkout);
writel(cmd-cmd1csratio, ddr_cmd_reg[nr]-cm1csratio);
- writel(cmd-cmd1dldiff, ddr_cmd_reg[nr]-cm1dldiff);
writel(cmd-cmd1iclkout, ddr_cmd_reg[nr]-cm1iclkout);
writel(cmd-cmd2csratio, ddr_cmd_reg[nr]-cm2csratio);
- writel(cmd-cmd2dldiff, ddr_cmd_reg[nr]-cm2dldiff);
writel(cmd-cmd2iclkout, ddr_cmd_reg[nr]-cm2iclkout);
}
@@ -121,10 +118,6 @@ void config_ddr_data(const struct ddr_data *data, int nr)
(ddr_data_reg[nr]+i)-dt0fwsratio0);
writel(data-datawrsratio0,
(ddr_data_reg[nr]+i)-dt0wrsratio0);
- writel(data-datauserank0delay,
- (ddr_data_reg[nr]+i)-dt0rdelays0);
- writel(data-datadldiff0,
- (ddr_data_reg[nr]+i)-dt0dldiff0);
}
}
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index fe48b5f..e5bda64 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -18,7 +18,6 @@
#define VTP_CTRL_READY (0x1 5)
#define VTP_CTRL_ENABLE(0x1 6)
#define VTP_CTRL_START_EN (0x1)
-#define PHY_DLL_LOCK_DIFF 0x0
#define DDR_CKE_CTRL_NORMAL0x1
#define PHY_EN_DYN_PWRDN (0x1 20)
@@ -29,7 +28,6 @@
#define MT47H128M16RT25E_EMIF_TIM3 0x033F
#define MT47H128M16RT25E_EMIF_SDCFG0x41805332
#define MT47H128M16RT25E_EMIF_SDREF0x081a
-#define MT47H128M16RT25E_DLL_LOCK_DIFF 0x0
#define MT47H128M16RT25E_RATIO 0x80
#define MT47H128M16RT25E_INVERT_CLKOUT 0x00
#define MT47H128M16RT25E_RD_DQS0x12
@@ -38,7 +36,6 @@
#define MT47H128M16RT25E_PHY_GATELVL 0x00
#define MT47H128M16RT25E_PHY_WR_DATA 0x40
#define MT47H128M16RT25E_PHY_FIFO_WE 0x80
-#define MT47H128M16RT25E_PHY_RANK0_DELAY 0x1
#define MT47H128M16RT25E_IOCTRL_VALUE 0x18B
/* Micron MT41J128M16JT-125 */
@@ -49,7 +46,6 @@
#define MT41J128MJT125_EMIF_SDCFG 0x61C04AB2
#define MT41J128MJT125_EMIF_SDREF 0x093B
#define MT41J128MJT125_ZQ_CFG 0x50074BE4
-#define MT41J128MJT125_DLL_LOCK_DIFF 0x1
#define MT41J128MJT125_RATIO 0x40
#define MT41J128MJT125_INVERT_CLKOUT 0x1
#define MT41J128MJT125_RD_DQS 0x3B
@@ -66,7 +62,6 @@
#define MT41J256M8HX15E_EMIF_SDCFG 0x61C04B32
#define MT41J256M8HX15E_EMIF_SDREF 0x093B
#define MT41J256M8HX15E_ZQ_CFG 0x50074BE4
-#define MT41J256M8HX15E_DLL_LOCK_DIFF 0x1
#define MT41J256M8HX15E_RATIO 0x40
#define MT41J256M8HX15E_INVERT_CLKOUT 0x1
#define MT41J256M8HX15E_RD_DQS 0x3B
@@ -83,7 +78,6 @@
#define MT41K256M16HA125E_EMIF_SDCFG 0x61C05332
#define MT41K256M16HA125E_EMIF_SDREF 0xC30
#define MT41K256M16HA125E_ZQ_CFG 0x50074BE4
-#define MT41K256M16HA125E_DLL_LOCK_DIFF0x1
#define MT41K256M16HA125E_RATIO0x80
#define MT41K256M16HA125E_INVERT_CLKOUT
Re: [U-Boot] [PATCH] am33xx: Stop modifying certain EMIF4D registers
Hi Tom,
On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini tr...@ti.com wrote:
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[...]
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index e406326..0b76a77 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -33,15 +33,12 @@ static struct ctrl_dev *cdev = (struct ctrl_dev
*)CTRL_DEVICE_BASE;
#ifdef CONFIG_SPL_BUILD
static const struct cmd_control evm_ddr2_cctrl_data = {
.cmd0csratio= 0x80,
- .cmd0dldiff = 0x04,
.cmd0iclkout= 0x00,
.cmd1csratio= 0x80,
- .cmd1dldiff = 0x04,
.cmd1iclkout= 0x00,
.cmd2csratio= 0x80,
- .cmd2dldiff = 0x04,
.cmd2iclkout= 0x00,
};
@@ -77,8 +74,6 @@ static const struct ddr_data evm_ddr2_data = {
.datagiratio0 = ((010) | (00)),
.datafwsratio0 = ((0x9010) | (0x900)),
.datawrsratio0 = ((0x5010) | (0x500)),
- .datauserank0delay = 1,
- .datadldiff0= 0x4,
};
void set_uart_mux_conf(void)
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 74d35e9..a53859e 100644
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -59,21 +59,16 @@ static struct ddr_data ddr2_data = {
.datagiratio0 = ((0x010) | (0x00)),
.datafwsratio0 = ((0x13A10) | (0x13A0)),
.datawrsratio0 = ((0x8A10) | (0x8A0)),
- .datauserank0delay = 0x1,
- .datadldiff0= 0x0, /* depend on cpu rev, set later */
};
static struct cmd_control ddr2_ctrl = {
.cmd0csratio= 0x80,
- .cmd0dldiff = 0x04, /* reset value is 0x4 */
.cmd0iclkout= 0x00,
.cmd1csratio= 0x80,
- .cmd1dldiff = 0x04, /* reset value is 0x4 */
.cmd1iclkout= 0x00,
.cmd2csratio= 0x80,
- .cmd2dldiff = 0x04, /* reset value is 0x4 */
.cmd2iclkout= 0x00,
};
@@ -150,21 +145,16 @@ static struct ddr_data ddr3_data = {
.datagiratio0 = ((0x2010) | 0x200),
.datafwsratio0 = ((RD_DQS_GATE10) | (RD_DQS_GATE0)),
.datawrsratio0 = (((WR_DQS+0x40)10) | ((WR_DQS+0x40)0)),
- .datauserank0delay = 0x1,
- .datadldiff0= 0x0, /* depend on cpu rev, set later */
};
static const struct cmd_control ddr3_ctrl = {
.cmd0csratio= 0x100,
- .cmd0dldiff = 0x004, /* reset value is 0x4 */
.cmd0iclkout= 0x001,
.cmd1csratio= 0x100,
- .cmd1dldiff = 0x004, /* reset value is 0x4 */
.cmd1iclkout= 0x001,
.cmd2csratio= 0x100,
- .cmd2dldiff = 0x004, /* reset value is 0x4 */
.cmd2iclkout= 0x001,
};
@@ -198,11 +188,6 @@ void sdram_init(void)
config_dmm(evm_lisa_map_regs);
#ifdef CONFIG_TI816X_EVM_DDR2
- ddr2_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd0dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd1dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd2dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
if (CONFIG_TI816X_USE_EMIF0) {
ddr2_emif0_regs.emif_ddr_phy_ctlr_1 =
(get_cpu_rev() == 0x1 ? 0x010B : 0x030B);
@@ -217,8 +202,6 @@ void sdram_init(void)
#endif
#ifdef CONFIG_TI816X_EVM_DDR3
- ddr3_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
From a quick glance it looks like at least earlier variants of TI81xx
used these registers to work around some bugs? This might end up
breaking those. Note that TI81xx DDR frequencies are much higher
compared to AM335x so issues related to this might not show up
right now.
Regards,
Vaibhav
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Re: [U-Boot] [PATCH] am33xx: Stop modifying certain EMIF4D registers
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/07/2013 04:12 PM, Vaibhav Bedia wrote:
Hi Tom,
On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini tr...@ti.com wrote:
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[...]
[snip]
@@ -198,11 +188,6 @@ void sdram_init(void)
config_dmm(evm_lisa_map_regs);
#ifdef CONFIG_TI816X_EVM_DDR2
- ddr2_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd0dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd1dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd2dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
if (CONFIG_TI816X_USE_EMIF0) {
ddr2_emif0_regs.emif_ddr_phy_ctlr_1 =
(get_cpu_rev() == 0x1 ? 0x010B : 0x030B);
@@ -217,8 +202,6 @@ void sdram_init(void)
#endif
#ifdef CONFIG_TI816X_EVM_DDR3
- ddr3_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
From a quick glance it looks like at least earlier variants of TI81xx
used these registers to work around some bugs? This might end up
breaking those. Note that TI81xx DDR frequencies are much higher
compared to AM335x so issues related to this might not show up
right now.
It's an open question on if TI81xx needs these set or was simply also
setting them for historical reasons (and in turn was inherited by am335x).
- --
Tom
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Re: [U-Boot] [PATCH] am33xx: Stop modifying certain EMIF4D registers
On Thu, Nov 07, 2013 at 04:16:40PM -0500, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/07/2013 04:12 PM, Vaibhav Bedia wrote:
Hi Tom,
On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini tr...@ti.com wrote:
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[...]
[snip]
@@ -198,11 +188,6 @@ void sdram_init(void)
config_dmm(evm_lisa_map_regs);
#ifdef CONFIG_TI816X_EVM_DDR2
- ddr2_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd0dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd1dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
- ddr2_ctrl.cmd2dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
if (CONFIG_TI816X_USE_EMIF0) {
ddr2_emif0_regs.emif_ddr_phy_ctlr_1 =
(get_cpu_rev() == 0x1 ? 0x010B : 0x030B);
@@ -217,8 +202,6 @@ void sdram_init(void)
#endif
#ifdef CONFIG_TI816X_EVM_DDR3
- ddr3_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
From a quick glance it looks like at least earlier variants of TI81xx
used these registers to work around some bugs? This might end up
breaking those. Note that TI81xx DDR frequencies are much higher
compared to AM335x so issues related to this might not show up
right now.
It's an open question on if TI81xx needs these set or was simply also
setting them for historical reasons (and in turn was inherited by am335x).
I will doublecheck on my early TI8148...out of time today but tomorrow.
-Matt
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