Re: [U-Boot] [PATCH] armv7: LS1021a: enable i-cache in start.S

[Xiaoliang Yang]

OK, thanks.

Regards,
Xiaoliang Yang


-Original Message-
From: york sun 
Sent: Sunday, October 09, 2016 1:16 AM
To: Xiaoliang Yang; u-boot@lists.denx.de
Subject: Re: [PATCH] armv7: LS1021a: enable i-cache in start.S

On 09/13/2016 08:48 PM, Xiaoliang Yang wrote:
> Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and 
> ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First 
> stage of u-boot can run faster after that. There is a description 
> about skip lowlevel init in board/freescale/ls1021atwr/README.
>
> Signed-off-by: Xiaoliang Yang 
> ---

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] armv7: LS1021a: enable i-cache in start.S

[york sun]

On 09/13/2016 08:48 PM, Xiaoliang Yang wrote:
> Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and
> ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First
> stage of u-boot can run faster after that. There is a description
> about skip lowlevel init in board/freescale/ls1021atwr/README.
>
> Signed-off-by: Xiaoliang Yang 
> ---

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] armv7: LS1021a: enable i-cache in start.S

[Xiaoliang Yang]

Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and
ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First
stage of u-boot can run faster after that. There is a description
about skip lowlevel init in board/freescale/ls1021atwr/README.

Signed-off-by: Xiaoliang Yang 
---
 arch/arm/cpu/armv7/Makefile   | 2 +-
 arch/arm/cpu/armv7/ls102xa/soc.c  | 4 
 board/freescale/ls1021aqds/README | 6 ++
 board/freescale/ls1021atwr/README | 6 ++
 include/configs/ls1021aqds.h  | 1 -
 include/configs/ls1021atwr.h  | 1 -
 6 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0d4bfbc..c1eeefd 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o
 obj-y  += cpu.o cp15.o
 obj-y  += syslib.o
 
-ifneq 
($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),)
+ifneq 
($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),)
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y  += lowlevel_init.o
 endif
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index b1b0c71..659a2d0 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -58,6 +58,10 @@ unsigned int get_soc_major_rev(void)
return major;
 }
 
+void s_init(void)
+{
+}
+
 int arch_soc_init(void)
 {
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
diff --git a/board/freescale/ls1021aqds/README 
b/board/freescale/ls1021aqds/README
index c561776..6cf7146 100644
--- a/board/freescale/ls1021aqds/README
+++ b/board/freescale/ls1021aqds/README
@@ -110,3 +110,9 @@ Start Address   End Address Description 
Size
 0x00_7E80_ 0x00_7E80_  IFC - NAND Flash64KB
 0x00_7FB0_ 0x00_7FB0_0FFF  IFC - FPGA  4KB
 0x00_8000_ 0x00__  DRAM1   2GB
+
+LS1021a rev1.0 Soc specific Options/Settings
+
+If the LS1021a Soc is rev1.0, you need modify the configure file.
+Add the following define in include/configs/ls1021aqds.h:
+#define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/board/freescale/ls1021atwr/README 
b/board/freescale/ls1021atwr/README
index d2821cb..896a659 100644
--- a/board/freescale/ls1021atwr/README
+++ b/board/freescale/ls1021atwr/README
@@ -107,3 +107,9 @@ Start Address   End Address Description 
Size
 0x00_4000_ 0x00_5FFF_  QSPI512MB
 0x00_6000_ 0x00_67FF_  IFC - NOR Flash 128MB
 0x00_8000_ 0x00__  DRAM1   2GB
+
+LS1021a rev1.0 Soc specific Options/Settings
+
+If the LS1021a Soc is rev1.0, you need modify the configure file.
+Add the following define in include/configs/ls1021atwr.h:
+#define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 105702d..88fb1ff 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -18,7 +18,6 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
 
 #define CONFIG_DEEP_SLEEP
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 90ae770..7673ccc 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -18,7 +18,6 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DEEP_SLEEP
 #ifdef CONFIG_DEEP_SLEEP
-- 
2.1.0.27.g96db324

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot