Re: [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

[Ziyuan Xu]

Hi Jaehoon,

On 2016年07月28日 13:26, Jaehoon Chung wrote:

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to  use the FIFO_MASK
as 0x1FFF, not 0x1FF.
Ah, I have no doubt the fifo_count defined. The fifo depth of Rockchip 
SoCs is 256, the former work sane coincidentally.:-)

Thanks for fix.
Reviewed-by: Ziyuan Xu 


Signed-off-by: Jaehoon Chung 
---
  include/dwmmc.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dwmmc.h b/include/dwmmc.h
index 6aebe96..eb03f7f 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -105,7 +105,7 @@
  
  /* Status Register */

  #define DWMCI_BUSY(1 << 9)
-#define DWMCI_FIFO_MASK0x1ff
+#define DWMCI_FIFO_MASK0x1fff
  #define DWMCI_FIFO_SHIFT  17
  
  /* FIFOTH Register */



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[U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

[Jaehoon Chung]

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to  use the FIFO_MASK
as 0x1FFF, not 0x1FF.

Signed-off-by: Jaehoon Chung 
---
 include/dwmmc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dwmmc.h b/include/dwmmc.h
index 6aebe96..eb03f7f 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -105,7 +105,7 @@
 
 /* Status Register */
 #define DWMCI_BUSY (1 << 9)
-#define DWMCI_FIFO_MASK0x1ff
+#define DWMCI_FIFO_MASK0x1fff
 #define DWMCI_FIFO_SHIFT   17
 
 /* FIFOTH Register */
-- 
1.9.1

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