From: Tang Yuantian yuantian.t...@freescale.com
A new interface is introduced to support generic board structure.
Converts it to use new interface.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
board/freescale/t104xrdb/ddr.c | 19 +++
board/freescale/t104xrdb/spl.c | 19 +++
board/freescale/t104xrdb/t104xrdb.c | 24 +++-
include/configs/T104xRDB.h | 3 +++
4 files changed, 36 insertions(+), 29 deletions(-)
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 2c331ee..5aa11b1 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -11,6 +11,7 @@
#include fsl_ddr_sdram.h
#include fsl_ddr_dimm_params.h
#include asm/fsl_law.h
+#include asm/mpc85xx_gpio.h
#include ddr.h
DECLARE_GLOBAL_DATA_PTR;
@@ -109,6 +110,19 @@ found:
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
}
+#if defined(CONFIG_DEEP_SLEEP)
+void board_mem_sleep_setup(void)
+{
+ void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
+
+ /* does not provide HW signals for power management */
+ clrbits_8(cpld_base + 0x17, 0x40);
+ /* Disable MCKE isolation */
+ gpio_set_value(2, 0);
+ udelay(1);
+}
+#endif
+
phys_size_t initdram(int board_type)
{
phys_size_t dram_size;
@@ -124,5 +138,10 @@ phys_size_t initdram(int board_type)
#else
dram_size = fsl_ddr_sdram_size();
#endif
+
+#if defined(CONFIG_DEEP_SLEEP) !defined(CONFIG_SPL_BUILD)
+ fsl_dp_resume();
+#endif
+
return dram_size;
}
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index 3822a37..b248f3b 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -11,7 +11,7 @@
#include mmc.h
#include fsl_esdhc.h
#include spi_flash.h
-#include asm/mpc85xx_gpio.h
+#include ../common/sleep.h
DECLARE_GLOBAL_DATA_PTR;
@@ -58,8 +58,8 @@ void board_init_f(ulong bootflag)
#ifdef CONFIG_DEEP_SLEEP
/* disable the console if boot from deep sleep */
- if (in_be32(gur-scrtsr[0]) (1 3))
- gd-flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+ if (is_warm_boot())
+ fsl_dp_disable_console();
#endif
/* compiler optimization barrier needed for GCC = 3.4 */
__asm__ __volatile__( : : : memory);
@@ -126,16 +126,3 @@ void board_init_r(gd_t *gd, ulong dest_addr)
nand_boot();
#endif
}
-
-#ifdef CONFIG_DEEP_SLEEP
-void board_mem_sleep_setup(void)
-{
- void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
-
- /* does not provide HW signals for power management */
- clrbits_8(cpld_base + 0x17, 0x40);
- /* Disable MCKE isolation */
- gpio_set_value(2, 0);
- udelay(1);
-}
-#endif
diff --git a/board/freescale/t104xrdb/t104xrdb.c
b/board/freescale/t104xrdb/t104xrdb.c
index ddb669f..abca297 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -17,8 +17,7 @@
#include asm/fsl_portals.h
#include asm/fsl_liodn.h
#include fm_eth.h
-#include asm/mpc85xx_gpio.h
-
+#include ../common/sleep.h
#include t104xrdb.h
#include cpld.h
@@ -44,6 +43,16 @@ int checkboard(void)
return 0;
}
+int board_early_init_f(void)
+{
+#if defined(CONFIG_DEEP_SLEEP)
+ if (is_warm_boot())
+ fsl_dp_disable_console();
+#endif
+
+ return 0;
+}
+
int board_early_init_r(void)
{
#ifdef CONFIG_SYS_FLASH_BASE
@@ -111,14 +120,3 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_fman_ethernet(blob);
#endif
}
-
-#ifdef CONFIG_DEEP_SLEEP
-void board_mem_sleep_setup(void)
-{
- /* does not provide HW signals for power management */
- CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) ~0x40));
- /* Disable MCKE isolation */
- gpio_set_value(2, 0);
- udelay(1);
-}
-#endif
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 2bb86e4..36ac66d 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -100,7 +100,10 @@
/* support deep sleep */
#define CONFIG_DEEP_SLEEP
+#if defined(CONFIG_DEEP_SLEEP)
+#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SILENT_CONSOLE
+#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff4
--
2.1.0.27.g96db324
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