Re: [U-Boot] [PATCH] mx6sabreauto: Add the mx6dual-lite variant
On 08/05/2014 19:25, Fabio Estevam wrote: Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sabreauto: Add the mx6dual-lite variant
On 19/05/2014 23:40, Fabio Estevam wrote: Hi Stefano, On Thu, May 8, 2014 at 2:25 PM, Fabio Estevam fabio.este...@freescale.com wrote: Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Any comments about this one? Not on my side - I set it ready to be merged. Regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sabreauto: Add the mx6dual-lite variant
Hi Stefano, On Thu, May 8, 2014 at 2:25 PM, Fabio Estevam fabio.este...@freescale.com wrote: Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Any comments about this one? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx6sabreauto: Add the mx6dual-lite variant
Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- board/freescale/mx6qsabreauto/mx6dl.cfg | 130 boards.cfg | 1 + include/configs/mx6qsabreauto.h | 4 + 3 files changed, 135 insertions(+) create mode 100644 board/freescale/mx6qsabreauto/mx6dl.cfg diff --git a/board/freescale/mx6qsabreauto/mx6dl.cfg b/board/freescale/mx6qsabreauto/mx6dl.cfg new file mode 100644 index 000..89078e5 --- /dev/null +++ b/board/freescale/mx6qsabreauto/mx6dl.cfg @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Jason Liu r64...@freescale.com + * + * SPDX-License-Identifier:GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type AddressValue + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C +DATA 4 0x020e0754 0x +DATA 4 0x020e04ac 0x0030 +DATA 4 0x020e04b0 0x0030 +DATA 4 0x020e0464 0x0030 +DATA 4 0x020e0490 0x0030 +DATA 4 0x020e074c 0x0030 +DATA 4 0x020e0494 0x0030 +DATA 4 0x020e04a0 0x +DATA 4 0x020e04b4 0x0030 +DATA 4 0x020e04b8 0x0030 +DATA 4 0x020e076c 0x0030 +DATA 4 0x020e0750 0x0002 +DATA 4 0x020e04bc 0x0028 +DATA 4 0x020e04c0 0x0028 +DATA 4 0x020e04c4 0x0028 +DATA 4 0x020e04c8 0x0028 +DATA 4 0x020e04cc 0x0028 +DATA 4 0x020e04d0 0x0028 +DATA 4 0x020e04d4 0x0028 +DATA 4 0x020e04d8 0x0028 +DATA 4 0x020e0760 0x0002 +DATA 4 0x020e0764 0x0028 +DATA 4 0x020e0770 0x0028 +DATA 4 0x020e0778 0x0028 +DATA 4 0x020e077c 0x0028 +DATA 4 0x020e0780 0x0028 +DATA 4 0x020e0784 0x0028 +DATA 4 0x020e078c 0x0028 +DATA 4 0x020e0748 0x0028 +DATA 4 0x020e0470 0x0028 +DATA 4 0x020e0474 0x0028 +DATA 4 0x020e0478 0x0028 +DATA 4 0x020e047c 0x0028 +DATA 4 0x020e0480 0x0028 +DATA 4 0x020e0484 0x0028 +DATA 4 0x020e0488 0x0028 +DATA 4 0x020e048c 0x0028 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x001F001F +DATA 4 0x021b4810 0x001F001F +DATA 4 0x021b083c 0x42190217 +DATA 4 0x021b0840 0x017B017B +DATA 4 0x021b483c 0x4176017B +DATA 4 0x021b4840 0x015F016C +DATA 4 0x021b0848 0x4C4C4D4C +DATA 4 0x021b4848 0x4A4D4C48 +DATA 4 0x021b0850 0x3F3F3F40 +DATA 4 0x021b4850 0x3538382E +DATA 4 0x021b081c 0x +DATA 4 0x021b0820 0x +DATA 4 0x021b0824 0x +DATA 4 0x021b0828 0x +DATA 4 0x021b481c 0x +DATA 4 0x021b4820 0x +DATA 4 0x021b4824 0x +DATA 4 0x021b4828 0x +DATA 4 0x021b08b8 0x0800 +DATA 4 0x021b48b8 0x0800 +DATA 4 0x021b0004 0x00020025 +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x676B5313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x1740 +DATA 4 0x021b001c 0x8000 +DATA 4 0x021b002c 0x26d2 +DATA 4 0x021b0030 0x006B1023 +DATA 4 0x021b0040 0x0047 +DATA 4 0x021b 0x841A +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x8033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x5800 +DATA 4 0x021b0818 0x0007 +DATA 4 0x021b4818 0x0007 +DATA 4 0x021b0004 0x00025565 +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF0 +DATA 4 0x020c4078 0xF300 +DATA 4 0x020c407c 0x0FC3 +DATA 4 0x020c4080 0x0FFF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF0CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/boards.cfg b/boards.cfg index 89ed095..514970e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -320,6 +320,7 @@ Active arm armv7 mx6 boundary nitrogen6x Active arm armv7 mx6 congateccgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre lsar...@adeneo-embedded.com Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg
