If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.
Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---
drivers/net/pcnet.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index d1fd4e4..f0a553e 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -155,6 +155,7 @@ int pcnet_initialize(bd_t *bis)
struct eth_device *dev;
u16 command, status;
int dev_nr = 0;
+ u32 bar;
PCNET_DEBUG1("\npcnet_initialize...\n");
@@ -183,8 +184,8 @@ int pcnet_initialize(bd_t *bis)
* Setup the PCI device.
*/
pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0,
- (unsigned int *)&dev->iobase);
- dev->iobase = pci_io_to_phys(devbusfn, dev->iobase);
+ (unsigned int *)&bar);
+ dev->iobase = pci_io_to_phys(devbusfn, bar);
dev->iobase &= ~0xf;
PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%lx: ",
--
2.8.3
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