[U-Boot] [PATCH] powerpc/85xx: Add P1023RDB board support
P1023RDB Specification:
---
Memory subsystem:
512MB DDR3 (Fixed DDR on board)
64MB NOR flash
128MB NAND flash
Ethernet:
eTSEC1: Connected to Atheros AR8035 GETH PHY
eTSEC2: Connected to Atheros AR8035 GETH PHY
PCIe:
Three mini-PCIe slots
USB: Two USB2.0 Type A ports
I2C:
AT24C08 8K Board EEPROM (8 bit address)
Signed-off-by: Chunhe Lan chunhe@freescale.com
---
board/freescale/p1023rdb/Makefile | 32 +++
board/freescale/p1023rdb/law.c | 34 +++
board/freescale/p1023rdb/p1023rdb.c | 194
board/freescale/p1023rdb/tlb.c | 116 ++
boards.cfg |1 +
include/configs/P1023RDB.h | 433 +++
6 files changed, 810 insertions(+), 0 deletions(-)
create mode 100644 board/freescale/p1023rdb/Makefile
create mode 100644 board/freescale/p1023rdb/law.c
create mode 100644 board/freescale/p1023rdb/p1023rdb.c
create mode 100644 board/freescale/p1023rdb/tlb.c
create mode 100644 include/configs/P1023RDB.h
diff --git a/board/freescale/p1023rdb/Makefile
b/board/freescale/p1023rdb/Makefile
new file mode 100644
index 000..c8e0866
--- /dev/null
+++ b/board/freescale/p1023rdb/Makefile
@@ -0,0 +1,32 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y+= $(BOARD).o
+COBJS-y+= law.o
+COBJS-y+= tlb.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/p1023rdb/law.c b/board/freescale/p1023rdb/law.c
new file mode 100644
index 000..b041d1f
--- /dev/null
+++ b/board/freescale/p1023rdb/law.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/fsl_law.h
+#include asm/mmu.h
+
+struct law_entry law_table[] = {
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
+ SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_4M,
+ LAW_TRGT_IF_DPAA_SWP_SRAM),
+ SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/p1023rdb/p1023rdb.c
b/board/freescale/p1023rdb/p1023rdb.c
new file mode 100644
index 000..16659e9
--- /dev/null
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * Authors: Roy Zang tie-fei.z...@freescale.com
+ * Chunhe Lan chunhe@freescale.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+#include pci.h
+#include asm/io.h
+#include asm/cache.h
+#include asm/processor.h
+#include asm/mmu.h
+#include
Re: [U-Boot] [PATCH] powerpc/85xx: Add P1023RDB board support
On Tue, Apr 16, 2013 at 4:00 AM, Chunhe Lan chunhe@freescale.com wrote:
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
It's amazing that Freescale is still producing board files that are
missing 57,600 baud.
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Re: [U-Boot] [PATCH] powerpc/85xx: Add P1023RDB board support
On Tue, Apr 16, 2013 at 06:35:13AM -0500, Timur Tabi wrote:
On Tue, Apr 16, 2013 at 4:00 AM, Chunhe Lan chunhe@freescale.com wrote:
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
It's amazing that Freescale is still producing board files that are
missing 57,600 baud.
When they could just use the default table?
--
Tom
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Re: [U-Boot] [PATCH] powerpc/85xx: Add P1023RDB board support
Chunhe Lan wrote: P1023RDB Specification: --- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Chunhe, what is the orderable part number of this board, I don't see anything on the FSL web page with the description above. Regards Sinan Akman ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add P1023RDB board support
On 04/16/2013 04:00:46 AM, Chunhe Lan wrote:
+struct fsl_e_tlb_entry tlb_table[] = {
+ /* TLB 0 - for temp stack in cache */
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR,
CONFIG_SYS_INIT_RAM_ADDR,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+
+ /* TLB 1 */
+ /* *I*** - Covers boot page */
+ SET_TLB_ENTRY(1, 0xf000, 0xf000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I,
+ 0, 0, BOOKE_PAGESZ_4K, 1),
+
+ /* *I*G* - CCSRBAR */
+ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 1, BOOKE_PAGESZ_4M, 1),
+
+ /* W**G* - Flash/promjet, localbus */
+ /* This will be changed to *I*G* after relocation to RAM. */
+ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
+ 0, 2, BOOKE_PAGESZ_256M, 1),
+
+ /* *I*G* - PCI */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT,
CONFIG_SYS_PCIE3_MEM_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 3, BOOKE_PAGESZ_1G, 1),
+
+ /* *I*G* - PCI */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x4000,
+ CONFIG_SYS_PCIE3_MEM_PHYS + 0x4000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 4, BOOKE_PAGESZ_256M, 1),
+
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x5000,
+ CONFIG_SYS_PCIE3_MEM_PHYS + 0x5000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 5, BOOKE_PAGESZ_256M, 1),
Do not use MAS3_SX on I/O mappings. The G bit does not prevent
speculative instruction fetches.
+ /* *I*G - NAND */
+ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE,
CONFIG_SYS_NAND_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 11, BOOKE_PAGESZ_1M, 1),
Why do you need 1M for NAND? There's only 8K of stuff there.
+/*
+ * Memory map
+ *
+ * 0x_ 0x1fff_ DDR 500M
Cacheable
+ * 0x8000_ 0xbfff_ PCI Express Mem 1G
non-cacheable
+ * 0xc000_ 0xdfff_ PCI 512M
non-cacheable
+ * 0xe100_ 0xe3ff_ PCI IO range 4M
non-cacheable
+ *
+ * Localbus non-cacheable
+ *
+ * 0xec00_ 0xefff_ NOR flash 64M NOR
flash
+ * 0xff00_ 0xff3f_ DPAA_QBMAN 4M
+ * 0xff60_ 0xff7f_ CCSR 2M
non-cacheable
+ * 0xffa0_ 0xffaf_ NAND 1M
non-cacheable
+ * 0xffd0_ 0xffd0_3fff L1 for stack 16K
Cacheable TLB0
+ */
L1 for stack is neither localbus nor non-cacheable. If you don't
want to distinguish that category, remove the comment.
[snip hundreds of lines of board config file]
Can we please refactor these board config headers to focus only on
what's different from board to board? These patches are very hard to
effectively review as is.
-Scott
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Re: [U-Boot] [PATCH] powerpc/85xx: Add P1023RDB board support
On 04/16/2013 09:57 PM, Sinan Akman wrote: Chunhe Lan wrote: P1023RDB Specification: --- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Chunhe, what is the orderable part number of this board, I don't see anything on the FSL web page with the description above. Now, Freescale is developing it, and does not normally release it. Thanks, -Chunhe Regards Sinan Akman ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
