Re: [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
On Tue, May 14, 2019 at 4:35 PM Simon Goldschmidt wrote: > > On Tue, May 14, 2019 at 8:08 AM Ley Foon Tan wrote: > > > > On Sat, May 11, 2019 at 2:28 AM Simon Goldschmidt > > wrote: > > > > > > Am 10.05.2019 um 07:54 schrieb Ley Foon Tan: > > > > Add reset manager support for Agilex. > > > > > > > > Signed-off-by: Ley Foon Tan > > > > --- > > > > .../mach-socfpga/include/mach/reset_manager.h | 5 ++- > > > > .../include/mach/reset_manager_agilex.h | 38 +++ > > > > arch/arm/mach-socfpga/reset_manager.c | 9 +++-- > > > > > > Have you seen my series that removes reset_manager.c and moves the code > > > to drivers/sysreset instead? It's not accepted, yet, but I think agilex > > > should use drivers/sysreset, too. > > > > > > Regards, > > > Simon > > drivers/sysreset is only for system reset, right? > > Most of our drivers use reset framework to reset, but we still using > > functions from reset_manager to reset watchdog and UART (when > > CONFIG_DEBUG_UART enabeld). > > Right, but arch/arm/mach-socfpga/reset_manager.c only contains > reset_cpu(), so drivers/sysreset is a direct replacement for this. > > You're probably talking about reset_manager_s10.c. I know you still > need that (although I'm trying to find a way to move that code to > dm driver, too - at least for gen5 as a start). > Yes, I am talking about reset_manager_s10.c. Regards Ley Foon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
On Tue, May 14, 2019 at 8:08 AM Ley Foon Tan wrote: > > On Sat, May 11, 2019 at 2:28 AM Simon Goldschmidt > wrote: > > > > Am 10.05.2019 um 07:54 schrieb Ley Foon Tan: > > > Add reset manager support for Agilex. > > > > > > Signed-off-by: Ley Foon Tan > > > --- > > > .../mach-socfpga/include/mach/reset_manager.h | 5 ++- > > > .../include/mach/reset_manager_agilex.h | 38 +++ > > > arch/arm/mach-socfpga/reset_manager.c | 9 +++-- > > > > Have you seen my series that removes reset_manager.c and moves the code > > to drivers/sysreset instead? It's not accepted, yet, but I think agilex > > should use drivers/sysreset, too. > > > > Regards, > > Simon > drivers/sysreset is only for system reset, right? > Most of our drivers use reset framework to reset, but we still using > functions from reset_manager to reset watchdog and UART (when > CONFIG_DEBUG_UART enabeld). Right, but arch/arm/mach-socfpga/reset_manager.c only contains reset_cpu(), so drivers/sysreset is a direct replacement for this. You're probably talking about reset_manager_s10.c. I know you still need that (although I'm trying to find a way to move that code to dm driver, too - at least for gen5 as a start). Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
On Sat, May 11, 2019 at 2:28 AM Simon Goldschmidt wrote: > > Am 10.05.2019 um 07:54 schrieb Ley Foon Tan: > > Add reset manager support for Agilex. > > > > Signed-off-by: Ley Foon Tan > > --- > > .../mach-socfpga/include/mach/reset_manager.h | 5 ++- > > .../include/mach/reset_manager_agilex.h | 38 +++ > > arch/arm/mach-socfpga/reset_manager.c | 9 +++-- > > Have you seen my series that removes reset_manager.c and moves the code > to drivers/sysreset instead? It's not accepted, yet, but I think agilex > should use drivers/sysreset, too. > > Regards, > Simon drivers/sysreset is only for system reset, right? Most of our drivers use reset framework to reset, but we still using functions from reset_manager to reset watchdog and UART (when CONFIG_DEBUG_UART enabeld). Regards Ley Foon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
On Fri, May 10, 2019 at 11:26 PM Dinh Nguyen wrote: > > > > On 5/10/19 12:54 AM, Ley Foon Tan wrote: > > Add reset manager support for Agilex. > > > > Signed-off-by: Ley Foon Tan > > --- > > .../mach-socfpga/include/mach/reset_manager.h | 5 ++- > > .../include/mach/reset_manager_agilex.h | 38 +++ > > AFAIK, there's really nothing different in Agilex reset manager from the > Stratix10, can you just re-use the Stratix10? > > Dinh There are some changes on the register mapping. Regards Ley Foon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
Am 10.05.2019 um 07:54 schrieb Ley Foon Tan:
Add reset manager support for Agilex.
Signed-off-by: Ley Foon Tan
---
.../mach-socfpga/include/mach/reset_manager.h | 5 ++-
.../include/mach/reset_manager_agilex.h | 38 +++
arch/arm/mach-socfpga/reset_manager.c | 9 +++--
Have you seen my series that removes reset_manager.c and moves the code
to drivers/sysreset instead? It's not accepted, yet, but I think agilex
should use drivers/sysreset, too.
Regards,
Simon
3 files changed, 48 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index e2dce4b4fb..f752f7abb8 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -36,7 +36,8 @@ void socfpga_per_reset_all(void);
/* Create a human-readable reference to SoCFPGA reset. */
#define SOCFPGA_RESET(_name) RSTMGR_##_name
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
void reset_deassert_peripherals_handoff(void);
int cpu_has_been_warmreset(void);
@@ -68,6 +69,8 @@ void socfpga_bridges_reset(int enable);
#include
#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
#include
+#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#include
#endif
#endif /* _RESET_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
new file mode 100644
index 00..c209fb439b
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Intel Corporation
+ */
+
+#ifndef_RESET_MANAGER_AGILEX_
+#define_RESET_MANAGER_AGILEX_
+
+struct socfpga_reset_manager {
+ u32 status;
+ u32 mpu_rst_stat;
+ u32 misc_stat;
+ u32 padding1;
+ u32 hdsk_en;
+ u32 hdsk_req;
+ u32 hdsk_ack;
+ u32 hdsk_stall;
+ u32 mpumodrst;
+ u32 per0modrst;
+ u32 per1modrst;
+ u32 brgmodrst;
+ u32 padding2;
+ u32 cold_mod_reset;
+ u32 padding3;
+ u32 dbg_mod_reset;
+ u32 padding4;
+ u32 padding5;
+ u32 padding6;
+ u32 brg_warm_mask;
+ u32 padding7[3];
+ u32 tst_stat;
+ u32 padding8;
+ u32 hdsk_timeout;
+ u32 mpul2flushtimeout;
+ u32 dbghdsktimeout;
+};
+
+#endif /* _RESET_MANAGER_AGILEX_ */
diff --git a/arch/arm/mach-socfpga/reset_manager.c
b/arch/arm/mach-socfpga/reset_manager.c
index e0a01ed07a..5dfe303940 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -8,13 +8,15 @@
#include
#include
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
#include
#endif
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10) && \
+ !defined(CONFIG_TARGET_SOCFPGA_AGILEX)
static const struct socfpga_reset_manager *reset_manager_base =
(void *)SOCFPGA_RSTMGR_ADDRESS;
#endif
@@ -25,7 +27,8 @@ static const struct socfpga_reset_manager *reset_manager_base
=
void reset_cpu(ulong addr)
{
/* request a warm reset */
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
puts("Mailbox: Issuing mailbox cmd REBOOT_HPS\n");
mbox_reset_cold();
#else
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Re: [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
On 5/10/19 12:54 AM, Ley Foon Tan wrote: > Add reset manager support for Agilex. > > Signed-off-by: Ley Foon Tan > --- > .../mach-socfpga/include/mach/reset_manager.h | 5 ++- > .../include/mach/reset_manager_agilex.h | 38 +++ AFAIK, there's really nothing different in Agilex reset manager from the Stratix10, can you just re-use the Stratix10? Dinh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support
Add reset manager support for Agilex.
Signed-off-by: Ley Foon Tan
---
.../mach-socfpga/include/mach/reset_manager.h | 5 ++-
.../include/mach/reset_manager_agilex.h | 38 +++
arch/arm/mach-socfpga/reset_manager.c | 9 +++--
3 files changed, 48 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index e2dce4b4fb..f752f7abb8 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -36,7 +36,8 @@ void socfpga_per_reset_all(void);
/* Create a human-readable reference to SoCFPGA reset. */
#define SOCFPGA_RESET(_name) RSTMGR_##_name
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
void reset_deassert_peripherals_handoff(void);
int cpu_has_been_warmreset(void);
@@ -68,6 +69,8 @@ void socfpga_bridges_reset(int enable);
#include
#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
#include
+#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#include
#endif
#endif /* _RESET_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
new file mode 100644
index 00..c209fb439b
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Intel Corporation
+ */
+
+#ifndef_RESET_MANAGER_AGILEX_
+#define_RESET_MANAGER_AGILEX_
+
+struct socfpga_reset_manager {
+ u32 status;
+ u32 mpu_rst_stat;
+ u32 misc_stat;
+ u32 padding1;
+ u32 hdsk_en;
+ u32 hdsk_req;
+ u32 hdsk_ack;
+ u32 hdsk_stall;
+ u32 mpumodrst;
+ u32 per0modrst;
+ u32 per1modrst;
+ u32 brgmodrst;
+ u32 padding2;
+ u32 cold_mod_reset;
+ u32 padding3;
+ u32 dbg_mod_reset;
+ u32 padding4;
+ u32 padding5;
+ u32 padding6;
+ u32 brg_warm_mask;
+ u32 padding7[3];
+ u32 tst_stat;
+ u32 padding8;
+ u32 hdsk_timeout;
+ u32 mpul2flushtimeout;
+ u32 dbghdsktimeout;
+};
+
+#endif /* _RESET_MANAGER_AGILEX_ */
diff --git a/arch/arm/mach-socfpga/reset_manager.c
b/arch/arm/mach-socfpga/reset_manager.c
index e0a01ed07a..5dfe303940 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -8,13 +8,15 @@
#include
#include
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
#include
#endif
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10) && \
+ !defined(CONFIG_TARGET_SOCFPGA_AGILEX)
static const struct socfpga_reset_manager *reset_manager_base =
(void *)SOCFPGA_RSTMGR_ADDRESS;
#endif
@@ -25,7 +27,8 @@ static const struct socfpga_reset_manager *reset_manager_base
=
void reset_cpu(ulong addr)
{
/* request a warm reset */
-#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
puts("Mailbox: Issuing mailbox cmd REBOOT_HPS\n");
mbox_reset_cold();
#else
--
2.19.0
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