subject:"\[U\-Boot\] \[PATCH 05\/10\] superio\: Add SMSC SIO1007 driver"

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

2016-01-26 Thread Bin Meng

Hi Simon,

On Wed, Jan 6, 2016 at 8:24 AM, Simon Glass  wrote:
> Hi Bin,
>
> On 20 December 2015 at 19:42, Bin Meng  wrote:
>> Hi Simon,
>>
>> On Sat, Dec 19, 2015 at 10:52 AM, Simon Glass  wrote:
>>> Hi Bin,
>>>
>>> On 11 December 2015 at 03:55, Bin Meng  wrote:
 The SMSC SIO1007 superio chipset integrates two ns16550 compatible
 serial ports for legacy applications, 16 GPIO pins and some other
 functionalities like power management.

 This adds a simple driver to enable serial port and handle GPIO.

 Signed-off-by: Bin Meng 
 ---

  drivers/misc/Makefile   |   1 +
  drivers/misc/smsc_sio1007.c | 126 
 
  include/smsc_sio1007.h  | 115 
  3 files changed, 242 insertions(+)
  create mode 100644 drivers/misc/smsc_sio1007.c
  create mode 100644 include/smsc_sio1007.h

 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
 index aa137f5..6952f8ce 100644
 --- a/drivers/misc/Makefile
 +++ b/drivers/misc/Makefile
 @@ -29,6 +29,7 @@ ifdef CONFIG_DM_I2C
  obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
  endif
  obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
 +obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
  obj-$(CONFIG_STATUS_LED) += status_led.o
  obj-$(CONFIG_SANDBOX) += swap_case.o
  obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
 diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c
 new file mode 100644
 index 000..79e9e15
 --- /dev/null
 +++ b/drivers/misc/smsc_sio1007.c
 @@ -0,0 +1,126 @@
 +/*
 + * Copyright (C) 2015, Bin Meng 
 + *
 + * SPDX-License-Identifier:GPL-2.0+
 + */
 +
 +#include 
 +#include 
 +#include 
 +#include 
 +
 +static inline u8 sio1007_read(int port, int reg)
 +{
 +   outb(reg, port);
 +
 +   return inb(port + 1);
 +}
 +
 +static inline void sio1007_write(int port, int reg, int val)
 +{
 +   outb(reg, port);
 +   outb(val, port + 1);
 +}
 +
 +static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)
 +{
 +   sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set);
 +}
 +
 +void sio1007_enable_serial(int port, int num, int iobase, int irq)
 +{
 +   if (num < 0 || num > SIO1007_UART_NUM)
 +   return;
 +
 +   /* enter configuration state */
 +   outb(0x55, port);
 +
 +   /* power on serial port and set up its i/o base & irq */
 +   if (!num) {
 +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, 
 UART1_POWER_ON);
 +   sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 2);
 +   sio1007_clrsetbits(port, UART_IRQ, 0xf0, irq << 4);
 +   } else {
 +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, 
 UART2_POWER_ON);
 +   sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 2);
 +   sio1007_clrsetbits(port, UART_IRQ, 0x0f, irq);
 +   }
 +
 +   /* exit configuration state */
 +   outb(0xaa, port);
 +}
 +
 +void sio1007_enable_runtime(int port, int iobase)
 +{
 +   /* enter configuration state */
 +   outb(0x55, port);
 +
 +   /* set i/o base for the runtime register block */
 +   sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4);
 +   sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12);
 +   /* turn on address decoding for this block */
 +   sio1007_clrsetbits(port, DEV_ACTIVATE, 0, RTR_EN);
 +
 +   /* exit configuration state */
 +   outb(0xaa, port);
 +}
 +
 +void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)
 +{
 +   int reg = GPIO0_DIR;
 +
 +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
 +   return;
 +   if (gpio >= GPIO_NUM_PER_GROUP) {
 +   reg = GPIO1_DIR;
 +   gpio -= GPIO_NUM_PER_GROUP;
 +   }
 +
 +   /* enter configuration state */
 +   outb(0x55, port);
 +
 +   /* set gpio pin direction, polority and type */
 +   sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio);
 +   sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio);
 +   sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio);
 +
 +   /* exit configuration state */
 +   outb(0xaa, port);
 +}
 +
 +int sio1007_gpio_get_value(int port, int gpio)
 +{
 +   int reg = GPIO0_DATA;
 +   int val;
 +
 +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
 +

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

2016-01-26 Thread Simon Glass

Hi Bin,

On 26 January 2016 at 01:29, Bin Meng  wrote:
>
> Hi Simon,
>
> On Wed, Jan 6, 2016 at 8:24 AM, Simon Glass  wrote:
> > Hi Bin,
> >
> > On 20 December 2015 at 19:42, Bin Meng  wrote:
> >> Hi Simon,
> >>
> >> On Sat, Dec 19, 2015 at 10:52 AM, Simon Glass  wrote:
> >>> Hi Bin,
> >>>
> >>> On 11 December 2015 at 03:55, Bin Meng  wrote:
>  The SMSC SIO1007 superio chipset integrates two ns16550 compatible
>  serial ports for legacy applications, 16 GPIO pins and some other
>  functionalities like power management.
> 
>  This adds a simple driver to enable serial port and handle GPIO.
> 
>  Signed-off-by: Bin Meng 
>  ---
> 
>   drivers/misc/Makefile   |   1 +
>   drivers/misc/smsc_sio1007.c | 126 
>  
>   include/smsc_sio1007.h  | 115 
>  
>   3 files changed, 242 insertions(+)
>   create mode 100644 drivers/misc/smsc_sio1007.c
>   create mode 100644 include/smsc_sio1007.h
> 
>  diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
>  index aa137f5..6952f8ce 100644
>  --- a/drivers/misc/Makefile
>  +++ b/drivers/misc/Makefile
>  @@ -29,6 +29,7 @@ ifdef CONFIG_DM_I2C
>   obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
>   endif
>   obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
>  +obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
>   obj-$(CONFIG_STATUS_LED) += status_led.o
>   obj-$(CONFIG_SANDBOX) += swap_case.o
>   obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
>  diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c
>  new file mode 100644
>  index 000..79e9e15
>  --- /dev/null
>  +++ b/drivers/misc/smsc_sio1007.c
>  @@ -0,0 +1,126 @@
>  +/*
>  + * Copyright (C) 2015, Bin Meng 
>  + *
>  + * SPDX-License-Identifier:GPL-2.0+
>  + */
>  +
>  +#include 
>  +#include 
>  +#include 
>  +#include 
>  +
>  +static inline u8 sio1007_read(int port, int reg)
>  +{
>  +   outb(reg, port);
>  +
>  +   return inb(port + 1);
>  +}
>  +
>  +static inline void sio1007_write(int port, int reg, int val)
>  +{
>  +   outb(reg, port);
>  +   outb(val, port + 1);
>  +}
>  +
>  +static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)
>  +{
>  +   sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set);
>  +}
>  +
>  +void sio1007_enable_serial(int port, int num, int iobase, int irq)
>  +{
>  +   if (num < 0 || num > SIO1007_UART_NUM)
>  +   return;
>  +
>  +   /* enter configuration state */
>  +   outb(0x55, port);
>  +
>  +   /* power on serial port and set up its i/o base & irq */
>  +   if (!num) {
>  +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, 
>  UART1_POWER_ON);
>  +   sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 
>  2);
>  +   sio1007_clrsetbits(port, UART_IRQ, 0xf0, irq << 4);
>  +   } else {
>  +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, 
>  UART2_POWER_ON);
>  +   sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 
>  2);
>  +   sio1007_clrsetbits(port, UART_IRQ, 0x0f, irq);
>  +   }
>  +
>  +   /* exit configuration state */
>  +   outb(0xaa, port);
>  +}
>  +
>  +void sio1007_enable_runtime(int port, int iobase)
>  +{
>  +   /* enter configuration state */
>  +   outb(0x55, port);
>  +
>  +   /* set i/o base for the runtime register block */
>  +   sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4);
>  +   sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12);
>  +   /* turn on address decoding for this block */
>  +   sio1007_clrsetbits(port, DEV_ACTIVATE, 0, RTR_EN);
>  +
>  +   /* exit configuration state */
>  +   outb(0xaa, port);
>  +}
>  +
>  +void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)
>  +{
>  +   int reg = GPIO0_DIR;
>  +
>  +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
>  +   return;
>  +   if (gpio >= GPIO_NUM_PER_GROUP) {
>  +   reg = GPIO1_DIR;
>  +   gpio -= GPIO_NUM_PER_GROUP;
>  +   }
>  +
>  +   /* enter configuration state */
>  +   outb(0x55, port);
>  +
>  +   /* set gpio pin direction, polority and type */
>  +   sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio);
>  +   sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio);

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

2016-01-05 Thread Simon Glass

Hi Bin,

On 20 December 2015 at 19:42, Bin Meng  wrote:
> Hi Simon,
>
> On Sat, Dec 19, 2015 at 10:52 AM, Simon Glass  wrote:
>> Hi Bin,
>>
>> On 11 December 2015 at 03:55, Bin Meng  wrote:
>>> The SMSC SIO1007 superio chipset integrates two ns16550 compatible
>>> serial ports for legacy applications, 16 GPIO pins and some other
>>> functionalities like power management.
>>>
>>> This adds a simple driver to enable serial port and handle GPIO.
>>>
>>> Signed-off-by: Bin Meng 
>>> ---
>>>
>>>  drivers/misc/Makefile   |   1 +
>>>  drivers/misc/smsc_sio1007.c | 126 
>>> 
>>>  include/smsc_sio1007.h  | 115 
>>>  3 files changed, 242 insertions(+)
>>>  create mode 100644 drivers/misc/smsc_sio1007.c
>>>  create mode 100644 include/smsc_sio1007.h
>>>
>>> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
>>> index aa137f5..6952f8ce 100644
>>> --- a/drivers/misc/Makefile
>>> +++ b/drivers/misc/Makefile
>>> @@ -29,6 +29,7 @@ ifdef CONFIG_DM_I2C
>>>  obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
>>>  endif
>>>  obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
>>> +obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
>>>  obj-$(CONFIG_STATUS_LED) += status_led.o
>>>  obj-$(CONFIG_SANDBOX) += swap_case.o
>>>  obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
>>> diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c
>>> new file mode 100644
>>> index 000..79e9e15
>>> --- /dev/null
>>> +++ b/drivers/misc/smsc_sio1007.c
>>> @@ -0,0 +1,126 @@
>>> +/*
>>> + * Copyright (C) 2015, Bin Meng 
>>> + *
>>> + * SPDX-License-Identifier:GPL-2.0+
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +static inline u8 sio1007_read(int port, int reg)
>>> +{
>>> +   outb(reg, port);
>>> +
>>> +   return inb(port + 1);
>>> +}
>>> +
>>> +static inline void sio1007_write(int port, int reg, int val)
>>> +{
>>> +   outb(reg, port);
>>> +   outb(val, port + 1);
>>> +}
>>> +
>>> +static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)
>>> +{
>>> +   sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set);
>>> +}
>>> +
>>> +void sio1007_enable_serial(int port, int num, int iobase, int irq)
>>> +{
>>> +   if (num < 0 || num > SIO1007_UART_NUM)
>>> +   return;
>>> +
>>> +   /* enter configuration state */
>>> +   outb(0x55, port);
>>> +
>>> +   /* power on serial port and set up its i/o base & irq */
>>> +   if (!num) {
>>> +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART1_POWER_ON);
>>> +   sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 2);
>>> +   sio1007_clrsetbits(port, UART_IRQ, 0xf0, irq << 4);
>>> +   } else {
>>> +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART2_POWER_ON);
>>> +   sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 2);
>>> +   sio1007_clrsetbits(port, UART_IRQ, 0x0f, irq);
>>> +   }
>>> +
>>> +   /* exit configuration state */
>>> +   outb(0xaa, port);
>>> +}
>>> +
>>> +void sio1007_enable_runtime(int port, int iobase)
>>> +{
>>> +   /* enter configuration state */
>>> +   outb(0x55, port);
>>> +
>>> +   /* set i/o base for the runtime register block */
>>> +   sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4);
>>> +   sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12);
>>> +   /* turn on address decoding for this block */
>>> +   sio1007_clrsetbits(port, DEV_ACTIVATE, 0, RTR_EN);
>>> +
>>> +   /* exit configuration state */
>>> +   outb(0xaa, port);
>>> +}
>>> +
>>> +void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)
>>> +{
>>> +   int reg = GPIO0_DIR;
>>> +
>>> +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
>>> +   return;
>>> +   if (gpio >= GPIO_NUM_PER_GROUP) {
>>> +   reg = GPIO1_DIR;
>>> +   gpio -= GPIO_NUM_PER_GROUP;
>>> +   }
>>> +
>>> +   /* enter configuration state */
>>> +   outb(0x55, port);
>>> +
>>> +   /* set gpio pin direction, polority and type */
>>> +   sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio);
>>> +   sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio);
>>> +   sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio);
>>> +
>>> +   /* exit configuration state */
>>> +   outb(0xaa, port);
>>> +}
>>> +
>>> +int sio1007_gpio_get_value(int port, int gpio)
>>> +{
>>> +   int reg = GPIO0_DATA;
>>> +   int val;
>>> +
>>> +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
>>> +   return -EINVAL;
>>> +   if (gpio >= GPIO_NUM_PER_GROUP) {
>>> +   reg = GPIO1_DATA;
>>> +   gpio -= GPIO_NUM_PER_GROUP;
>>> +   }
>>> +
>>> +   val = inb(port + reg);
>>> +   if (val & (1 <<

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

2015-12-20 Thread Bin Meng

Hi Simon,

On Sat, Dec 19, 2015 at 10:52 AM, Simon Glass  wrote:
> Hi Bin,
>
> On 11 December 2015 at 03:55, Bin Meng  wrote:
>> The SMSC SIO1007 superio chipset integrates two ns16550 compatible
>> serial ports for legacy applications, 16 GPIO pins and some other
>> functionalities like power management.
>>
>> This adds a simple driver to enable serial port and handle GPIO.
>>
>> Signed-off-by: Bin Meng 
>> ---
>>
>>  drivers/misc/Makefile   |   1 +
>>  drivers/misc/smsc_sio1007.c | 126 
>> 
>>  include/smsc_sio1007.h  | 115 
>>  3 files changed, 242 insertions(+)
>>  create mode 100644 drivers/misc/smsc_sio1007.c
>>  create mode 100644 include/smsc_sio1007.h
>>
>> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
>> index aa137f5..6952f8ce 100644
>> --- a/drivers/misc/Makefile
>> +++ b/drivers/misc/Makefile
>> @@ -29,6 +29,7 @@ ifdef CONFIG_DM_I2C
>>  obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
>>  endif
>>  obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
>> +obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
>>  obj-$(CONFIG_STATUS_LED) += status_led.o
>>  obj-$(CONFIG_SANDBOX) += swap_case.o
>>  obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
>> diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c
>> new file mode 100644
>> index 000..79e9e15
>> --- /dev/null
>> +++ b/drivers/misc/smsc_sio1007.c
>> @@ -0,0 +1,126 @@
>> +/*
>> + * Copyright (C) 2015, Bin Meng 
>> + *
>> + * SPDX-License-Identifier:GPL-2.0+
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +static inline u8 sio1007_read(int port, int reg)
>> +{
>> +   outb(reg, port);
>> +
>> +   return inb(port + 1);
>> +}
>> +
>> +static inline void sio1007_write(int port, int reg, int val)
>> +{
>> +   outb(reg, port);
>> +   outb(val, port + 1);
>> +}
>> +
>> +static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)
>> +{
>> +   sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set);
>> +}
>> +
>> +void sio1007_enable_serial(int port, int num, int iobase, int irq)
>> +{
>> +   if (num < 0 || num > SIO1007_UART_NUM)
>> +   return;
>> +
>> +   /* enter configuration state */
>> +   outb(0x55, port);
>> +
>> +   /* power on serial port and set up its i/o base & irq */
>> +   if (!num) {
>> +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART1_POWER_ON);
>> +   sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 2);
>> +   sio1007_clrsetbits(port, UART_IRQ, 0xf0, irq << 4);
>> +   } else {
>> +   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART2_POWER_ON);
>> +   sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 2);
>> +   sio1007_clrsetbits(port, UART_IRQ, 0x0f, irq);
>> +   }
>> +
>> +   /* exit configuration state */
>> +   outb(0xaa, port);
>> +}
>> +
>> +void sio1007_enable_runtime(int port, int iobase)
>> +{
>> +   /* enter configuration state */
>> +   outb(0x55, port);
>> +
>> +   /* set i/o base for the runtime register block */
>> +   sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4);
>> +   sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12);
>> +   /* turn on address decoding for this block */
>> +   sio1007_clrsetbits(port, DEV_ACTIVATE, 0, RTR_EN);
>> +
>> +   /* exit configuration state */
>> +   outb(0xaa, port);
>> +}
>> +
>> +void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)
>> +{
>> +   int reg = GPIO0_DIR;
>> +
>> +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
>> +   return;
>> +   if (gpio >= GPIO_NUM_PER_GROUP) {
>> +   reg = GPIO1_DIR;
>> +   gpio -= GPIO_NUM_PER_GROUP;
>> +   }
>> +
>> +   /* enter configuration state */
>> +   outb(0x55, port);
>> +
>> +   /* set gpio pin direction, polority and type */
>> +   sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio);
>> +   sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio);
>> +   sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio);
>> +
>> +   /* exit configuration state */
>> +   outb(0xaa, port);
>> +}
>> +
>> +int sio1007_gpio_get_value(int port, int gpio)
>> +{
>> +   int reg = GPIO0_DATA;
>> +   int val;
>> +
>> +   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
>> +   return -EINVAL;
>> +   if (gpio >= GPIO_NUM_PER_GROUP) {
>> +   reg = GPIO1_DATA;
>> +   gpio -= GPIO_NUM_PER_GROUP;
>> +   }
>> +
>> +   val = inb(port + reg);
>> +   if (val & (1 << gpio))
>> +   return 1;
>> +   else
>> +   return 0;
>> +}
>> +
>> +void sio1007_gpio_set_value(int port, int gpio, int val)
>> +{
>> +   int reg = GPIO0_DATA;
>> +   u8 data;
>> +
>> +

[U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

2015-12-11 Thread Bin Meng

The SMSC SIO1007 superio chipset integrates two ns16550 compatible
serial ports for legacy applications, 16 GPIO pins and some other
functionalities like power management.

This adds a simple driver to enable serial port and handle GPIO.

Signed-off-by: Bin Meng 
---

 drivers/misc/Makefile   |   1 +
 drivers/misc/smsc_sio1007.c | 126 
 include/smsc_sio1007.h  | 115 
 3 files changed, 242 insertions(+)
 create mode 100644 drivers/misc/smsc_sio1007.c
 create mode 100644 include/smsc_sio1007.h

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index aa137f5..6952f8ce 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -29,6 +29,7 @@ ifdef CONFIG_DM_I2C
 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
 endif
 obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
+obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
 obj-$(CONFIG_STATUS_LED) += status_led.o
 obj-$(CONFIG_SANDBOX) += swap_case.o
 obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c
new file mode 100644
index 000..79e9e15
--- /dev/null
+++ b/drivers/misc/smsc_sio1007.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2015, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static inline u8 sio1007_read(int port, int reg)
+{
+   outb(reg, port);
+
+   return inb(port + 1);
+}
+
+static inline void sio1007_write(int port, int reg, int val)
+{
+   outb(reg, port);
+   outb(val, port + 1);
+}
+
+static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set)
+{
+   sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set);
+}
+
+void sio1007_enable_serial(int port, int num, int iobase, int irq)
+{
+   if (num < 0 || num > SIO1007_UART_NUM)
+   return;
+
+   /* enter configuration state */
+   outb(0x55, port);
+
+   /* power on serial port and set up its i/o base & irq */
+   if (!num) {
+   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART1_POWER_ON);
+   sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 2);
+   sio1007_clrsetbits(port, UART_IRQ, 0xf0, irq << 4);
+   } else {
+   sio1007_clrsetbits(port, DEV_POWER_CTRL, 0, UART2_POWER_ON);
+   sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 2);
+   sio1007_clrsetbits(port, UART_IRQ, 0x0f, irq);
+   }
+
+   /* exit configuration state */
+   outb(0xaa, port);
+}
+
+void sio1007_enable_runtime(int port, int iobase)
+{
+   /* enter configuration state */
+   outb(0x55, port);
+
+   /* set i/o base for the runtime register block */
+   sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4);
+   sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12);
+   /* turn on address decoding for this block */
+   sio1007_clrsetbits(port, DEV_ACTIVATE, 0, RTR_EN);
+
+   /* exit configuration state */
+   outb(0xaa, port);
+}
+
+void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type)
+{
+   int reg = GPIO0_DIR;
+
+   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
+   return;
+   if (gpio >= GPIO_NUM_PER_GROUP) {
+   reg = GPIO1_DIR;
+   gpio -= GPIO_NUM_PER_GROUP;
+   }
+
+   /* enter configuration state */
+   outb(0x55, port);
+
+   /* set gpio pin direction, polority and type */
+   sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio);
+   sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio);
+   sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio);
+
+   /* exit configuration state */
+   outb(0xaa, port);
+}
+
+int sio1007_gpio_get_value(int port, int gpio)
+{
+   int reg = GPIO0_DATA;
+   int val;
+
+   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
+   return -EINVAL;
+   if (gpio >= GPIO_NUM_PER_GROUP) {
+   reg = GPIO1_DATA;
+   gpio -= GPIO_NUM_PER_GROUP;
+   }
+
+   val = inb(port + reg);
+   if (val & (1 << gpio))
+   return 1;
+   else
+   return 0;
+}
+
+void sio1007_gpio_set_value(int port, int gpio, int val)
+{
+   int reg = GPIO0_DATA;
+   u8 data;
+
+   if (gpio < 0 || gpio > SIO1007_GPIO_NUM)
+   return;
+   if (gpio >= GPIO_NUM_PER_GROUP) {
+   reg = GPIO1_DATA;
+   gpio -= GPIO_NUM_PER_GROUP;
+   }
+
+   data = inb(port + reg);
+   data &= ~(1 << gpio);
+   data |= (val << gpio);
+   outb(data, port + reg);
+}
diff --git a/include/smsc_sio1007.h b/include/smsc_sio1007.h
new file mode 100644
index 000..eff57a7
--- /dev/null
+++ b/include/smsc_sio1007.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2015, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

Re: [U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

[U-Boot] [PATCH 05/10] superio: Add SMSC SIO1007 driver

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