Add TI UFS glue layer and Cadence UFS Host controller DT nodes.
Signed-off-by: Faiz Abbas <faiz_ab...@ti.com>
---
arch/arm/dts/k3-j721e-main.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi
index 3445784293..23a7cb9d3a 100644
--- a/arch/arm/dts/k3-j721e-main.dtsi
+++ b/arch/arm/dts/k3-j721e-main.dtsi
@@ -228,4 +228,29 @@
ti,trm-icp = <0x8>;
dma-coherent;
};
+
+ ufs_wrapper: ufs-wrapper@4e80000 {
+ compatible = "ti,j721e-ufs";
+ reg = <0x0 0x4e80000 0x0 0x100>;
+ power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 277 1>;
+ assigned-clocks = <&k3_clks 277 1>;
+ assigned-clock-parents = <&k3_clks 277 4>;
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@4e84000 {
+ compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
+ reg = <0x0 0x4e84000 0x0 0x10000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
+ freq-table-hz = <0 0>, <0 0>;
+ clocks = <&k3_clks 277 0>, <&k3_clks 277 1>;
+ clock-names = "core_clk", "phy_clk";
+ assigned-clocks = <&k3_clks 277 1>;
+ assigned-clock-parents = <&k3_clks 277 4>;
+ dma-coherent;
+ };
+ };
};
--
2.19.2
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