Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut
Cc: Chris Brandt
Cc: Mark Jonas
Cc: Nobuhiro Iwamatsu
Cc: Vladimir Zapolskiy
Cc: Yoshihiro Shimoda
---
arch/sh/Kconfig| 5 --
board/mpr2/Kconfig | 9 ---
board/mpr2/MAINTAINERS | 6 --
board/mpr2/Makefile| 19 -
board/mpr2/lowlevel_init.S | 117 ---
board/mpr2/mpr2.c | 137 -
configs/mpr2_defconfig | 31 -
include/configs/mpr2.h | 55 ---
8 files changed, 379 deletions(-)
delete mode 100644 board/mpr2/Kconfig
delete mode 100644 board/mpr2/MAINTAINERS
delete mode 100644 board/mpr2/Makefile
delete mode 100644 board/mpr2/lowlevel_init.S
delete mode 100644 board/mpr2/mpr2.c
delete mode 100644 configs/mpr2_defconfig
delete mode 100644 include/configs/mpr2.h
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 0659fbbf8b..ea48ecb9a1 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -24,10 +24,6 @@ choice
prompt "Target select"
optional
-config TARGET_MPR2
- bool "Magic Panel Release 2 board"
- select CPU_SH3
-
config TARGET_MS7720SE
bool "Support ms7720se"
select CPU_SH3
@@ -101,7 +97,6 @@ source "arch/sh/lib/Kconfig"
source "board/alphaproject/ap_sh4a_4a/Kconfig"
source "board/espt/Kconfig"
-source "board/mpr2/Kconfig"
source "board/ms7720se/Kconfig"
source "board/ms7722se/Kconfig"
source "board/ms7750se/Kconfig"
diff --git a/board/mpr2/Kconfig b/board/mpr2/Kconfig
deleted file mode 100644
index 54176e8f6f..00
--- a/board/mpr2/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_MPR2
-
-config SYS_BOARD
- default "mpr2"
-
-config SYS_CONFIG_NAME
- default "mpr2"
-
-endif
diff --git a/board/mpr2/MAINTAINERS b/board/mpr2/MAINTAINERS
deleted file mode 100644
index beedf8dda6..00
--- a/board/mpr2/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MPR2 BOARD
-M: Mark Jonas
-S: Maintained
-F: board/mpr2/
-F: include/configs/mpr2.h
-F: configs/mpr2_defconfig
diff --git a/board/mpr2/Makefile b/board/mpr2/Makefile
deleted file mode 100644
index 6a71803ac7..00
--- a/board/mpr2/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007
-# Yoshihiro Shimoda
-#
-# Copyright (C) 2007
-# Nobuhiro Iwamatsu
-#
-# Copyright (C) 2007
-# Kenati Technologies, Inc.
-#
-# (C) Copyright 2008
-# Mark Jonas
-#
-# board/mpr2/Makefile
-#
-
-obj-y := mpr2.o
-extra-y+= lowlevel_init.o
diff --git a/board/mpr2/lowlevel_init.S b/board/mpr2/lowlevel_init.S
deleted file mode 100644
index e34a7a9a17..00
--- a/board/mpr2/lowlevel_init.S
+++ /dev/null
@@ -1,117 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2008
- * Mark Jonas
- *
- * (C) Copyright 2007
- * Yoshihiro Shimoda
- *
- * board/mpr2/lowlevel_init.S
- */
-#include
-
- .global lowlevel_init
-
- .text
- .align 2
-
-lowlevel_init:
-
-/*
- * Set frequency multipliers and dividers in FRQCR.
- */
- write16 WTCSR_A, WTCSR_D
-
- write16 WTCNT_A, WTCNT_D
-
- write16 FRQCR_A, FRQCR_D
-
-/*
- * Setup CS0 (Flash).
- */
- write32 CS0BCR_A, CS0BCR_D
-
- write32 CS0WCR_A, CS0WCR_D
-
-/*
- * Setup CS3 (SDRAM).
- */
- write32 CS3BCR_A, CS3BCR_D
-
- write32 CS3WCR_A, CS3WCR_D
-
- write32 SDCR_A, SDCR_D1
-
- write32 RTCSR_A, RTCSR_D
-
- write32 RTCNT_A, RTCNT_D
-
- write32 RTCOR_A, RTCOR_D
-
- write32 SDCR_A, SDCR_D2
-
- mov.l SDMR3_A, r1
- mov.l SDMR3_D, r0
- add r0, r1
- mov #0, r0
- mov.w r0, @r1
-
- rts
- nop
-
- .align 4
-
-/*
- * Configuration for MPR2 A.3 through A.7
- */
-
-/*
- * PLL Settings
- */
-FRQCR_D: .word 0x1103 /* I:B:P=8:4:2 */
-WTCNT_D: .word 0x5A00 /* start counting at zero */
-WTCSR_D: .word 0xA507 /* divide by 4096 */
-.align 2
-/*
- * Spansion S29GL256N11 @ 48 MHz
- */
-/* 1 idle cycle inserted, normal space, 16 bit */
-CS0BCR_D: .long 0x12490400
-/* tSW=0.5ck, 6 wait cycles, NO external wait, tHW=0.5ck */
-CS0WCR_D: .long 0x0340
-
-/*
- * Samsung K4S511632B-UL75 @ 48 MHz
- * Micron MT48LC32M16A2-75 @ 48 MHz
- */
-/* CS3BCR = 0x10004400, minimum idle cycles, SDRAM, 16 bit */
-CS3BCR_D: .long 0x10004400
-/* tRP=1ck, tRCD=1ck, CL=2, tRWL=2ck, tRC=4ck */
-CS3WCR_D: .long 0x0091
-/* no refresh, 13 rows, 10 cols, NO bank active mode */
-SDCR_D1: .long 0x0012
-SDCR_D2: .long 0x0812 /* refresh */
-RTCSR_D: .long 0xA55A0008 /* 1/4, once */
-RTCNT_D: .long 0xA55A005D /* count 93 */
-RTCOR_D: .long 0xa55a005d /* count 93 */
-/* mode register CL2, burst read and SINGLE WRITE */
-SDMR3_D: .long 0x440
-
-/*
- * R
