Re: [U-Boot] [PATCH 1/2] fsl_sec : Add hardware accelerated SHA256 and SHA1

[York Sun]

On 09/10/2014 08:58 PM, Ruchika Gupta wrote:
 SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
 The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
 
 Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
 CC: York Sun york...@freescale.com
 ---
 The patch series is dependent on
 https://patchwork.ozlabs.org/patch/387174/
 https://patchwork.ozlabs.org/patch/387175/

Ruchika,

This patch increases the image size and causes a problem for these boards,
kmcoge4 kmlion1 P1010RDB-PB_36BIT_SPIFLASH_SECBOOT

Please check.

York

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[U-Boot] [PATCH 1/2] fsl_sec : Add hardware accelerated SHA256 and SHA1

[Ruchika Gupta]

SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.

Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: York Sun york...@freescale.com
---
The patch series is dependent on
https://patchwork.ozlabs.org/patch/387174/
https://patchwork.ozlabs.org/patch/387175/

 arch/powerpc/cpu/mpc85xx/cpu_init.c   |   5 +
 arch/powerpc/include/asm/config.h |   4 +
 arch/powerpc/include/asm/immap_85xx.h |   5 +
 arch/powerpc/include/asm/types.h  |   4 +
 drivers/crypto/Makefile   |   1 +
 drivers/crypto/fsl/Makefile   |   9 +
 drivers/crypto/fsl/desc.h | 651 ++
 drivers/crypto/fsl/desc_constr.h  | 280 +++
 drivers/crypto/fsl/error.c| 258 ++
 drivers/crypto/fsl/fsl_hash.c | 119 +++
 drivers/crypto/fsl/jobdesc.c  |  45 +++
 drivers/crypto/fsl/jobdesc.h  |  18 +
 drivers/crypto/fsl/jr.c   | 288 +++
 drivers/crypto/fsl/jr.h   | 100 ++
 include/fsl_sec.h |  45 +++
 15 files changed, 1832 insertions(+)
 create mode 100644 drivers/crypto/fsl/Makefile
 create mode 100644 drivers/crypto/fsl/desc.h
 create mode 100644 drivers/crypto/fsl/desc_constr.h
 create mode 100644 drivers/crypto/fsl/error.c
 create mode 100644 drivers/crypto/fsl/fsl_hash.c
 create mode 100644 drivers/crypto/fsl/jobdesc.c
 create mode 100644 drivers/crypto/fsl/jobdesc.h
 create mode 100644 drivers/crypto/fsl/jr.c
 create mode 100644 drivers/crypto/fsl/jr.h

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index bf9fbbf..21c3194 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -27,6 +27,7 @@
 #include hwconfig.h
 #include linux/compiler.h
 #include mp.h
+#include fsl_sec.h
 #ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #include nand.h
 #include errno.h
@@ -938,6 +939,10 @@ int cpu_init_r(void)
fman_enet_init();
 #endif
 
+#if CONFIG_SYS_FSL_SEC_COMPAT = 4
+   sec_init();
+#endif
+
 #if defined(CONFIG_FSL_SATA_V2)  defined(CONFIG_FSL_SATA_ERRATUM_A001)
/*
 * For P1022/1013 Rev1.0 silicon, after power on SATA host
diff --git a/arch/powerpc/include/asm/config.h 
b/arch/powerpc/include/asm/config.h
index 423a6fb..e1b2c20 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -103,4 +103,8 @@
 /* All PPC boards must swap IDE bytes */
 #define CONFIG_IDE_SWAP_IO
 
+#if CONFIG_SYS_FSL_SEC_COMPAT = 4
+#define CONFIG_FSL_CAAM
+#endif
+
 #endif /* _ASM_CONFIG_H_ */
diff --git a/arch/powerpc/include/asm/immap_85xx.h 
b/arch/powerpc/include/asm/immap_85xx.h
index e426314..88c1e08 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2875,6 +2875,7 @@ struct ccsr_sfp_regs {
 #define CONFIG_SYS_MPC85xx_SATA1_OFFSET0x22
 #define CONFIG_SYS_MPC85xx_SATA2_OFFSET0x221000
 #define CONFIG_SYS_FSL_SEC_OFFSET  0x30
+#define CONFIG_SYS_FSL_JR0_OFFSET  0x301000
 #define CONFIG_SYS_FSL_CORENET_PME_OFFSET  0x316000
 #define CONFIG_SYS_FSL_QMAN_OFFSET 0x318000
 #define CONFIG_SYS_FSL_BMAN_OFFSET 0x31a000
@@ -2935,8 +2936,10 @@ struct ccsr_sfp_regs {
 #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET0x2e000
 #if defined(CONFIG_PPC_C29X)
 #define CONFIG_SYS_FSL_SEC_OFFSET  0x8
+#define CONFIG_SYS_FSL_JR0_OFFSET   0x81000
 #else
 #define CONFIG_SYS_FSL_SEC_OFFSET  0x3
+#define CONFIG_SYS_FSL_JR0_OFFSET   0x31000
 #endif
 #define CONFIG_SYS_MPC85xx_SERDES2_OFFSET  0xE3100
 #define CONFIG_SYS_MPC85xx_SERDES1_OFFSET  0xE3000
@@ -3041,6 +3044,8 @@ struct ccsr_sfp_regs {
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET)
 #define CONFIG_SYS_FSL_SEC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
+#define CONFIG_SYS_FSL_JR0_ADDR \
+   (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
 #define CONFIG_SYS_FSL_FM1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_OFFSET)
 #define CONFIG_SYS_FSL_FM1_DTSEC1_ADDR \
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index b27a6b7..b29ce79 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -41,8 +41,12 @@ typedef unsigned long long u64;
 
 #define BITS_PER_LONG 32
 
+#ifdef CONFIG_PHYS_64BIT
+typedef unsigned long long dma_addr_t;
+#else
 /* DMA addresses are 32-bits wide */
 typedef u32 dma_addr_t;
+#endif
 
 #ifdef CONFIG_PHYS_64BIT
 typedef unsigned long long phys_addr_t;
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index b807795..7b79237 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -6,3 +6,4 @@
 #
 
 obj-$(CONFIG_EXYNOS_ACE_SHA)   += ace_sha.o
+obj-y += fsl/
diff --git