CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption. Disable the feature to workaround the issue.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
arch/powerpc/cpu/mpc85xx/cpu_init.c |4
arch/powerpc/include/asm/immap_85xx.h |3 ++-
include/configs/P4080DS.h |1 +
4 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 4c07d0c..3822cf0 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -62,6 +62,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003
puts(Work-around for Erratum DDR-A003 enabled\n);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
+ puts(Work-around for Erratum CPC-A002 enabled\n);
+#endif
return 0;
}
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 354b222..c822d87 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -142,6 +142,10 @@ static void enable_cpc(void)
u32 cpccfg0 = in_be32(cpc-cpccfg0);
size += CPC_CFG0_SZ_K(cpccfg0);
+#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
+ setbits_be32(cpc-cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
+#endif
+
out_be32(cpc-cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE);
/* Read back to sync write */
in_be32(cpc-cpccsr0);
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 0069d50..ed36290 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1,7 +1,7 @@
/*
* MPC85xx Internal Memory Map
*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* Copyright(c) 2002,2003 Motorola Inc.
* Xianghua Xiao (x.x...@motorola.com)
@@ -1602,6 +1602,7 @@ typedef struct cpc_corenet {
#define CPC_SRCR0_SRAMEN 0x0001
#defineCPC_ERRDIS_TMHITDIS 0x0080 /* multi-way hit
disable */
#define CPC_HDBCR0_CDQ_SPEC_DIS0x0800
+#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x0100
#endif /* CONFIG_SYS_FSL_CPC */
/* Global Utilities Block */
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index c398450..c269ddc 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -40,6 +40,7 @@
#define CONFIG_SYS_FSL_ERRATUM_ESDHC136
#define CONFIG_SYS_P4080_ERRATUM_CPU22
+#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
#define CONFIG_SYS_P4080_ERRATUM_SERDES8
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
--
1.7.2.3
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