Re: [U-Boot] [PATCH 1/3] pwm: sunxi: add support for PWM found on Allwinner A64 and H3

2017-09-18 Thread Vasily Khoruzhick 
Please discard this, I forgot to include maintainers in CC. Will resend.

On Sun, Sep 17, 2017 at 8:28 PM, Vasily Khoruzhick  wrote:
> This commit adds basic support for PWM found on Allwinner A64 and H3
>
> Signed-off-by: Vasily Khoruzhick 
> ---
>  arch/arm/include/asm/arch-sunxi/gpio.h |   1 +
>  arch/arm/include/asm/arch-sunxi/pwm.h  |  12 +++
>  arch/arm/mach-sunxi/board.c|  11 +++
>  drivers/pwm/Kconfig|   7 ++
>  drivers/pwm/Makefile   |   1 +
>  drivers/pwm/sunxi_pwm.c| 174 
> +
>  6 files changed, 206 insertions(+)
>  create mode 100644 drivers/pwm/sunxi_pwm.c
>
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
> b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 24f85206c8..7265d18099 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -173,6 +173,7 @@ enum sunxi_gpio_number {
>  #define SUN8I_GPD_SDC1 3
>  #define SUNXI_GPD_LCD0 2
>  #define SUNXI_GPD_LVDS03
> +#define SUNXI_GPD_PWM  2
>
>  #define SUN5I_GPE_SDC2 3
>  #define SUN8I_GPE_TWI2 3
> diff --git a/arch/arm/include/asm/arch-sunxi/pwm.h 
> b/arch/arm/include/asm/arch-sunxi/pwm.h
> index 5884b5dbe7..673e0eb7b5 100644
> --- a/arch/arm/include/asm/arch-sunxi/pwm.h
> +++ b/arch/arm/include/asm/arch-sunxi/pwm.h
> @@ -11,8 +11,15 @@
>  #define SUNXI_PWM_CH0_PERIOD   (SUNXI_PWM_BASE + 4)
>
>  #define SUNXI_PWM_CTRL_PRESCALE0(x)((x) & 0xf)
> +#define SUNXI_PWM_CTRL_PRESCALE0_MASK  (0xf)
>  #define SUNXI_PWM_CTRL_ENABLE0 (0x5 << 4)
>  #define SUNXI_PWM_CTRL_POLARITY0(x)((x) << 5)
> +#define SUNXI_PWM_CTRL_POLARITY0_MASK  (1 << 5)
> +#define SUNXI_PWM_CTRL_CLK_GATE(1 << 6)
> +
> +#define SUNXI_PWM_CH0_PERIOD_MAX   (0x)
> +#define SUNXI_PWM_CH0_PERIOD_PRD(x)((x & 0x) << 16)
> +#define SUNXI_PWM_CH0_PERIOD_DUTY(x)   ((x) & 0x)
>
>  #define SUNXI_PWM_PERIOD_80PCT 0x04af03c0
>
> @@ -31,4 +38,9 @@
>  #define SUNXI_PWM_MUX  SUN8I_GPH_PWM
>  #endif
>
> +struct sunxi_pwm {
> +   u32 ctrl;
> +   u32 ch0_period;
> +};
> +
>  #endif
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index 65b1ebd837..a85f973a46 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -141,6 +141,16 @@ static int gpio_init(void)
> return 0;
>  }
>
> +static int pwm_init(void)
> +{
> +#ifdef CONFIG_PWM_SUNXI
> +#ifdef CONFIG_MACH_SUN50I
> +   sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
> +#endif
> +#endif
> +   return 0;
> +}
> +
>  #if defined(CONFIG_SPL_BOARD_LOAD_IMAGE) && defined(CONFIG_SPL_BUILD)
>  static int spl_board_load_image(struct spl_image_info *spl_image,
> struct spl_boot_device *bootdev)
> @@ -204,6 +214,7 @@ void s_init(void)
> clock_init();
> timer_init();
> gpio_init();
> +   pwm_init();
>  #ifndef CONFIG_DM_I2C
> i2c_init_board();
>  #endif
> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
> index e827558052..67e3f355e7 100644
> --- a/drivers/pwm/Kconfig
> +++ b/drivers/pwm/Kconfig
> @@ -43,3 +43,10 @@ config PWM_TEGRA
>   four channels with a programmable period and duty cycle. Only a
>   32KHz clock is supported by the driver but the duty cycle is
>   configurable.
> +
> +config PWM_SUNXI
> +   bool "Enable support for the Allwinner Sunxi PWM"
> +   depends on DM_PWM
> +   help
> + This PWM is found on A64 and other Allwinner SoCs. It supports a
> + programmable period and duty cycle. A 32-bit counter is used.
> diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
> index 29d59916cb..1a8f8a58bc 100644
> --- a/drivers/pwm/Makefile
> +++ b/drivers/pwm/Makefile
> @@ -17,3 +17,4 @@ obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
>  obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
>  obj-$(CONFIG_PWM_SANDBOX)  += sandbox_pwm.o
>  obj-$(CONFIG_PWM_TEGRA)+= tegra_pwm.o
> +obj-$(CONFIG_PWM_SUNXI)+= sunxi_pwm.o
> diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
> new file mode 100644
> index 00..3e6d69fa1c
> --- /dev/null
> +++ b/drivers/pwm/sunxi_pwm.c
> @@ -0,0 +1,174 @@
> +/*
> + * Copyright (c) 2017 Vasily Khoruzhick 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct sunxi_pwm_priv {
> +   struct sunxi_pwm *regs;
> +   ulong freq;
> +   bool invert;
> +   uint32_t prescaler;
> +};
> +
> +static const uint32_t prescaler_table[] = {
> +   120,/*  */
> +   180,/* 0001 */
> +   240,/* 0010 */
> +   360,/* 0011 */
> +

[U-Boot] [PATCH 1/3] pwm: sunxi: add support for PWM found on Allwinner A64 and H3

2017-09-17 Thread Vasily Khoruzhick 
This commit adds basic support for PWM found on Allwinner A64 and H3

Signed-off-by: Vasily Khoruzhick 
---
 arch/arm/include/asm/arch-sunxi/gpio.h |   1 +
 arch/arm/include/asm/arch-sunxi/pwm.h  |  12 +++
 arch/arm/mach-sunxi/board.c|  11 +++
 drivers/pwm/Kconfig|   7 ++
 drivers/pwm/Makefile   |   1 +
 drivers/pwm/sunxi_pwm.c| 174 +
 6 files changed, 206 insertions(+)
 create mode 100644 drivers/pwm/sunxi_pwm.c

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 24f85206c8..7265d18099 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -173,6 +173,7 @@ enum sunxi_gpio_number {
 #define SUN8I_GPD_SDC1 3
 #define SUNXI_GPD_LCD0 2
 #define SUNXI_GPD_LVDS03
+#define SUNXI_GPD_PWM  2
 
 #define SUN5I_GPE_SDC2 3
 #define SUN8I_GPE_TWI2 3
diff --git a/arch/arm/include/asm/arch-sunxi/pwm.h 
b/arch/arm/include/asm/arch-sunxi/pwm.h
index 5884b5dbe7..673e0eb7b5 100644
--- a/arch/arm/include/asm/arch-sunxi/pwm.h
+++ b/arch/arm/include/asm/arch-sunxi/pwm.h
@@ -11,8 +11,15 @@
 #define SUNXI_PWM_CH0_PERIOD   (SUNXI_PWM_BASE + 4)
 
 #define SUNXI_PWM_CTRL_PRESCALE0(x)((x) & 0xf)
+#define SUNXI_PWM_CTRL_PRESCALE0_MASK  (0xf)
 #define SUNXI_PWM_CTRL_ENABLE0 (0x5 << 4)
 #define SUNXI_PWM_CTRL_POLARITY0(x)((x) << 5)
+#define SUNXI_PWM_CTRL_POLARITY0_MASK  (1 << 5)
+#define SUNXI_PWM_CTRL_CLK_GATE(1 << 6)
+
+#define SUNXI_PWM_CH0_PERIOD_MAX   (0x)
+#define SUNXI_PWM_CH0_PERIOD_PRD(x)((x & 0x) << 16)
+#define SUNXI_PWM_CH0_PERIOD_DUTY(x)   ((x) & 0x)
 
 #define SUNXI_PWM_PERIOD_80PCT 0x04af03c0
 
@@ -31,4 +38,9 @@
 #define SUNXI_PWM_MUX  SUN8I_GPH_PWM
 #endif
 
+struct sunxi_pwm {
+   u32 ctrl;
+   u32 ch0_period;
+};
+
 #endif
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 65b1ebd837..a85f973a46 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -141,6 +141,16 @@ static int gpio_init(void)
return 0;
 }
 
+static int pwm_init(void)
+{
+#ifdef CONFIG_PWM_SUNXI
+#ifdef CONFIG_MACH_SUN50I
+   sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
+#endif
+#endif
+   return 0;
+}
+
 #if defined(CONFIG_SPL_BOARD_LOAD_IMAGE) && defined(CONFIG_SPL_BUILD)
 static int spl_board_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
@@ -204,6 +214,7 @@ void s_init(void)
clock_init();
timer_init();
gpio_init();
+   pwm_init();
 #ifndef CONFIG_DM_I2C
i2c_init_board();
 #endif
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index e827558052..67e3f355e7 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -43,3 +43,10 @@ config PWM_TEGRA
  four channels with a programmable period and duty cycle. Only a
  32KHz clock is supported by the driver but the duty cycle is
  configurable.
+
+config PWM_SUNXI
+   bool "Enable support for the Allwinner Sunxi PWM"
+   depends on DM_PWM
+   help
+ This PWM is found on A64 and other Allwinner SoCs. It supports a
+ programmable period and duty cycle. A 32-bit counter is used.
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 29d59916cb..1a8f8a58bc 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
 obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
 obj-$(CONFIG_PWM_SANDBOX)  += sandbox_pwm.o
 obj-$(CONFIG_PWM_TEGRA)+= tegra_pwm.o
+obj-$(CONFIG_PWM_SUNXI)+= sunxi_pwm.o
diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
new file mode 100644
index 00..3e6d69fa1c
--- /dev/null
+++ b/drivers/pwm/sunxi_pwm.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2017 Vasily Khoruzhick 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sunxi_pwm_priv {
+   struct sunxi_pwm *regs;
+   ulong freq;
+   bool invert;
+   uint32_t prescaler;
+};
+
+static const uint32_t prescaler_table[] = {
+   120,/*  */
+   180,/* 0001 */
+   240,/* 0010 */
+   360,/* 0011 */
+   480,/* 0100 */
+   0,  /* 0101 */
+   0,  /* 0110 */
+   0,  /* 0111 */
+   12000,  /* 1000 */
+   24000,  /* 1001 */
+   36000,  /* 1010 */
+   48000,  /* 1011 */
+   72000,  /* 1100 */
+   0,  /* 1101 */
+   0,  /* 1110 */
+   1,  /*  */
+};
+
+static const uint64_t nsecs_per_sec = 10L;
+
+static int sunxi_pwm_set_invert(struct udevice *dev, uint