Re: [U-Boot] [PATCH 1/4] ARM: socfpga: Disable D cache in SPL

2019-03-07 Thread Chee, Tien Fong
On Wed, 2019-03-06 at 22:05 +0100, Marek Vasut wrote:
> The bootrom seems to leave the D-cache in messed up state, make sure
> the SPL disables it so it can not interfere with operation.
> 
> Signed-off-by: Marek Vasut 
> Cc: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Simon Goldschmidt 
> Cc: Tien Fong Chee 

Reviewed-by: Tien Fong Chee 

> ---
>  arch/arm/mach-socfpga/spl_a10.c | 2 ++
>  include/configs/socfpga_arria10_socdk.h | 2 --
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-
> socfpga/spl_a10.c
> index c97eacb424..c8e73d47c0 100644
> --- a/arch/arm/mach-socfpga/spl_a10.c
> +++ b/arch/arm/mach-socfpga/spl_a10.c
> @@ -77,6 +77,8 @@ void spl_board_init(void)
>  
>  void board_init_f(ulong dummy)
>  {
> + dcache_disable();
> +
>   socfpga_init_security_policies();
>   socfpga_sdram_remap_zero();
>  
> diff --git a/include/configs/socfpga_arria10_socdk.h
> b/include/configs/socfpga_arria10_socdk.h
> index 58e446b60a..0f116fbf2d 100644
> --- a/include/configs/socfpga_arria10_socdk.h
> +++ b/include/configs/socfpga_arria10_socdk.h
> @@ -15,8 +15,6 @@
>  /*
>   * U-Boot general configurations
>   */
> -/* Cache options */
> -#define CONFIG_SYS_DCACHE_OFF
>  
>  /* Memory configurations  */
>  #define PHYS_SDRAM_1_SIZE0x4000
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[U-Boot] [PATCH 1/4] ARM: socfpga: Disable D cache in SPL

2019-03-06 Thread Marek Vasut
The bootrom seems to leave the D-cache in messed up state, make sure
the SPL disables it so it can not interfere with operation.

Signed-off-by: Marek Vasut 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
Cc: Simon Goldschmidt 
Cc: Tien Fong Chee 
---
 arch/arm/mach-socfpga/spl_a10.c | 2 ++
 include/configs/socfpga_arria10_socdk.h | 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index c97eacb424..c8e73d47c0 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -77,6 +77,8 @@ void spl_board_init(void)
 
 void board_init_f(ulong dummy)
 {
+   dcache_disable();
+
socfpga_init_security_policies();
socfpga_sdram_remap_zero();
 
diff --git a/include/configs/socfpga_arria10_socdk.h 
b/include/configs/socfpga_arria10_socdk.h
index 58e446b60a..0f116fbf2d 100644
--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@@ -15,8 +15,6 @@
 /*
  * U-Boot general configurations
  */
-/* Cache options */
-#define CONFIG_SYS_DCACHE_OFF
 
 /* Memory configurations  */
 #define PHYS_SDRAM_1_SIZE  0x4000
-- 
2.20.1

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