Re: [U-Boot] [PATCH 1/4 v2] fsl/ddr: Fix compiling warning

[york sun]

On 11/20/2016 07:49 PM, Shengzhou Liu wrote:
> Fix following warning in case multiple erratum macro was not defined.
> warning: unused variable 'tmp'
> warning: unused variable 'ddr_freq'
>
> Signed-off-by: Shengzhou Liu 
> ---
> v2: fix compile issue on some platforms.
>
>  drivers/ddr/fsl/fsl_ddr_gen4.c | 57 
> ++
>  1 file changed, 25 insertions(+), 32 deletions(-)

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York


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[U-Boot] [PATCH 1/4 v2] fsl/ddr: Fix compiling warning

[Shengzhou Liu]

Fix following warning in case multiple erratum macro was not defined.
warning: unused variable 'tmp'
warning: unused variable 'ddr_freq'

Signed-off-by: Shengzhou Liu 
---
v2: fix compile issue on some platforms.

 drivers/ddr/fsl/fsl_ddr_gen4.c | 57 ++
 1 file changed, 25 insertions(+), 32 deletions(-)

diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 042af09..30f60e0 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -47,13 +47,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 {
unsigned int i, bus_width;
struct ccsr_ddr __iomem *ddr;
-   u32 temp_sdram_cfg;
+   u32 temp32;
u32 total_gb_size_per_controller;
int timeout;
-#if defined(CONFIG_SYS_FSL_ERRATUM_A008511) || \
-   defined(CONFIG_SYS_FSL_ERRATUM_A009801)
-   u32 temp32;
-#endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A008511
u32 mr6;
@@ -61,11 +57,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
u32 vref_seq2[3] = {0xc0, 0xf0, 0x70};  /* for range 2 */
u32 *vref_seq = vref_seq1;
 #endif
-#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) | \
-   defined(CONFIG_SYS_FSL_ERRATUM_A010165)
-   ulong ddr_freq;
-   u32 tmp;
-#endif
 #ifdef CONFIG_FSL_DDR_BIST
u32 mtcr, err_detect, err_sbe;
u32 cs0_bnds, cs1_bnds, cs2_bnds, cs3_bnds, cs0_config;
@@ -73,7 +64,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 #ifdef CONFIG_FSL_DDR_BIST
char buffer[CONFIG_SYS_CBSIZE];
 #endif
-
+#if defined(CONFIG_SYS_FSL_ERRATUM_A009942)
+   u32 ddr_freq;
+#endif
switch (ctrl_num) {
case 0:
ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
@@ -279,22 +272,22 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t 
*regs,
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009942
ddr_freq = get_ddr_freq(ctrl_num) / 100;
-   tmp = ddr_in32(>debug[28]);
+   temp32 = ddr_in32(>debug[28]);
if (ddr_freq <= 1333)
-   ddr_out32(>debug[28], tmp | 0x0080006a);
+   ddr_out32(>debug[28], temp32 | 0x0080006a);
else if (ddr_freq <= 1600)
-   ddr_out32(>debug[28], tmp | 0x0070006f);
+   ddr_out32(>debug[28], temp32 | 0x0070006f);
else if (ddr_freq <= 1867)
-   ddr_out32(>debug[28], tmp | 0x00700076);
+   ddr_out32(>debug[28], temp32 | 0x00700076);
else if (ddr_freq <= 2133)
-   ddr_out32(>debug[28], tmp | 0x0060007b);
+   ddr_out32(>debug[28], temp32 | 0x0060007b);
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010165
-   ddr_freq = get_ddr_freq(ctrl_num) / 100;
-   if ((ddr_freq > 1900) && (ddr_freq < 2300)) {
-   tmp = ddr_in32(>debug[28]);
-   ddr_out32(>debug[28], tmp | 0x000a);
+   temp32 = get_ddr_freq(ctrl_num) / 100;
+   if ((temp32 > 1900) && (temp32 < 2300)) {
+   temp32 = ddr_in32(>debug[28]);
+   ddr_out32(>debug[28], temp32 | 0x000a);
}
 #endif
/*
@@ -312,9 +305,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 
 step2:
/* Set, but do not enable the memory */
-   temp_sdram_cfg = regs->ddr_sdram_cfg;
-   temp_sdram_cfg &= ~(SDRAM_CFG_MEM_EN);
-   ddr_out32(>sdram_cfg, temp_sdram_cfg);
+   temp32 = regs->ddr_sdram_cfg;
+   temp32 &= ~(SDRAM_CFG_MEM_EN);
+   ddr_out32(>sdram_cfg, temp32);
 
/*
 * 500 painful micro-seconds must elapse between
@@ -329,18 +322,18 @@ step2:
 #ifdef CONFIG_DEEP_SLEEP
if (is_warm_boot()) {
/* enter self-refresh */
-   temp_sdram_cfg = ddr_in32(>sdram_cfg_2);
-   temp_sdram_cfg |= SDRAM_CFG2_FRC_SR;
-   ddr_out32(>sdram_cfg_2, temp_sdram_cfg);
+   temp32 = ddr_in32(>sdram_cfg_2);
+   temp32 |= SDRAM_CFG2_FRC_SR;
+   ddr_out32(>sdram_cfg_2, temp32);
/* do board specific memory setup */
board_mem_sleep_setup();
 
-   temp_sdram_cfg = (ddr_in32(>sdram_cfg) | SDRAM_CFG_BI);
+   temp32 = (ddr_in32(>sdram_cfg) | SDRAM_CFG_BI);
} else
 #endif
-   temp_sdram_cfg = ddr_in32(>sdram_cfg) & ~SDRAM_CFG_BI;
+   temp32 = ddr_in32(>sdram_cfg) & ~SDRAM_CFG_BI;
/* Let the controller go */
-   ddr_out32(>sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
+   ddr_out32(>sdram_cfg, temp32 | SDRAM_CFG_MEM_EN);
mb();
isb();
 
@@ -483,9 +476,9 @@ step2:
 #ifdef CONFIG_DEEP_SLEEP
if (is_warm_boot()) {
/* exit self-refresh */
-   temp_sdram_cfg = ddr_in32(>sdram_cfg_2);
-   temp_sdram_cfg &= ~SDRAM_CFG2_FRC_SR;
-   ddr_out32(>sdram_cfg_2, temp_sdram_cfg);
+   temp32 = ddr_in32(>sdram_cfg_2);
+   temp32 &=