Add initial support for AM654 based EVM running on A53. Enable
4GB of DDR available on the EVM so that kernel DTB file
can be updated accordingly.
Signed-off-by: Lokesh Vutla
[Andreas: Added 4GB ddr support]
Signed-off-by: Andreas Dannenberg
---
arch/arm/mach-k3/Kconfig| 1 +
board/ti/am65x/Kconfig | 30
board/ti/am65x/MAINTAINERS | 5
board/ti/am65x/Makefile | 8 ++
board/ti/am65x/evm.c| 56 +
include/configs/am65x_evm.h | 36
6 files changed, 136 insertions(+)
create mode 100644 board/ti/am65x/Kconfig
create mode 100644 board/ti/am65x/MAINTAINERS
create mode 100644 board/ti/am65x/Makefile
create mode 100644 board/ti/am65x/evm.c
create mode 100644 include/configs/am65x_evm.h
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 117e5b4e4a..df3ba32df6 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -47,4 +47,5 @@ config BOOT_PARAM_TABLE_INDEX
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
+source "board/ti/am65x/Kconfig"
endif
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
new file mode 100644
index 00..fb616e8fd5
--- /dev/null
+++ b/board/ti/am65x/Kconfig
@@ -0,0 +1,30 @@
+#
+# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+# Lokesh Vutla
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+choice
+ prompt "K3 AM65 based boards"
+ optional
+
+config TARGET_AM654_A53_EVM
+ bool "TI K3 based AM654 EVM running on A53"
+ select ARM64
+ select SOC_K3_AM6
+
+endchoice
+
+if TARGET_AM654_A53_EVM
+
+config SYS_BOARD
+ default "am65x"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am65x_evm"
+
+endif
diff --git a/board/ti/am65x/MAINTAINERS b/board/ti/am65x/MAINTAINERS
new file mode 100644
index 00..c5921b4a28
--- /dev/null
+++ b/board/ti/am65x/MAINTAINERS
@@ -0,0 +1,5 @@
+AM65x BOARD
+M: Lokesh Vutla
+S: Maintained
+F: board/ti/am65x/
+F: include/configs/am65x_evm.h
diff --git a/board/ti/am65x/Makefile b/board/ti/am65x/Makefile
new file mode 100644
index 00..94dddfcc4a
--- /dev/null
+++ b/board/ti/am65x/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+# Lokesh Vutla
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := evm.o
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
new file mode 100644
index 00..db2c90e948
--- /dev/null
+++ b/board/ti/am65x/evm.c
@@ -0,0 +1,56 @@
+/*
+ * Board specific initialization for AM654 EVM
+ *
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+#ifdef CONFIG_PHYS_64BIT
+ gd->ram_size = 0x1;
+#else
+ gd->ram_size = 0x8000;
+#endif
+
+ return 0;
+}
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+#ifdef CONFIG_PHYS_64BIT
+ /* Limit RAM used by U-Boot to the DDR low region */
+ if (gd->ram_top > 0x1)
+ return 0x1;
+#endif
+
+ return gd->ram_top;
+}
+
+int dram_init_banksize(void)
+{
+ /* Bank 0 declares the memory available in the DDR low region */
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = 0x8000;
+
+#ifdef CONFIG_PHYS_64BIT
+ /* Bank 1 declares the memory available in the DDR high region */
+ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].size = 0x8000;
+#endif
+
+ return 0;
+}
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
new file mode 100644
index 00..ee8a984cfc
--- /dev/null
+++ b/include/configs/am65x_evm.h
@@ -0,0 +1,36 @@
+/*
+ * Configuration header file for K3 AM654 EVM
+ *
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_AM654_EVM_H
+#define __CONFIG_AM654_EVM_H
+
+#include
+#include
+
+#define CONFIG_ENV_SIZE(128 << 10)
+
+/* DDR Configuration */
+#define CONFIG_NR_DRAM_BANKS 2
+#define CONFIG_SYS_SDRAM_BASE1 0x88000
+
+/* SPL Loader Configuration */
+#ifdef CONFIG_TARGET_AM654_A53_EVM
+#define CONFIG_SPL_TEXT_BASE 0x8008
+#endif
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SPL_MAX_SIZECONFIG_MAX_DOWNLODABLE_IMAGE_SIZE
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE +\
+ CONFIG_NON_SECURE_MSRAM_SIZE - 4)
+
+/* Now for the remaining common
