Re: [U-Boot] [PATCH 11/12] ARM: dts: dra7-evm: sync DT with latest Linux

[Lokesh Vutla]

On Tuesday 15 August 2017 02:58 AM, Tom Rini wrote:
> On Sat, Aug 12, 2017 at 11:59:32AM +0530, Lokesh Vutla wrote:
> 
>> Signed-off-by: Lokesh Vutla 
>> ---
>>  arch/arm/dts/dra7-evm.dts | 276 
>> --
>>  1 file changed, 23 insertions(+), 253 deletions(-)
> 
> Please include a commit message to say what rev we're syncing with, and
> we should probably cover dra7* while we're at it (and first move
> anything U-Boot centric to a -u-boot.dtsi so this goes cleaner in the
> future, if we're not there already).  Thanks!

Sure, Ill take care of this in v2.

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH 11/12] ARM: dts: dra7-evm: sync DT with latest Linux

[Tom Rini]

On Sat, Aug 12, 2017 at 11:59:32AM +0530, Lokesh Vutla wrote:

> Signed-off-by: Lokesh Vutla 
> ---
>  arch/arm/dts/dra7-evm.dts | 276 
> --
>  1 file changed, 23 insertions(+), 253 deletions(-)

Please include a commit message to say what rev we're syncing with, and
we should probably cover dra7* while we're at it (and first move
anything U-Boot centric to a -u-boot.dtsi so this goes cleaner in the
future, if we're not there already).  Thanks!

-- 
Tom


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[U-Boot] [PATCH 11/12] ARM: dts: dra7-evm: sync DT with latest Linux

[Lokesh Vutla]

Signed-off-by: Lokesh Vutla 
---
 arch/arm/dts/dra7-evm.dts | 276 --
 1 file changed, 23 insertions(+), 253 deletions(-)

diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 4d882ab338..511862c5f3 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -156,204 +156,6 @@
 };
 
 _pmx_core {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pin>;
-
-   vtt_pin: pinmux_vtt_pin {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x37b4, PIN_OUTPUT | MUX_MODE14) /* 
spi1_cs1.gpio7_11 */
-   >;
-   };
-
-   i2c1_pins: pinmux_i2c1_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* 
i2c1_sda */
-   DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* 
i2c1_scl */
-   >;
-   };
-
-   i2c2_pins: pinmux_i2c2_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE0) /* 
i2c2_sda */
-   DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE0) /* 
i2c2_scl */
-   >;
-   };
-
-   i2c3_pins: pinmux_i2c3_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE9) /* 
gpio6_14.i2c3_sda */
-   DRA7XX_CORE_IOPAD(0x368c, PIN_INPUT | MUX_MODE9) /* 
gpio6_15.i2c3_scl */
-   >;
-   };
-
-   mcspi1_pins: pinmux_mcspi1_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x37a4, PIN_INPUT | MUX_MODE0) /* 
spi1_sclk */
-   DRA7XX_CORE_IOPAD(0x37a8, PIN_INPUT | MUX_MODE0) /* 
spi1_d1 */
-   DRA7XX_CORE_IOPAD(0x37ac, PIN_INPUT | MUX_MODE0) /* 
spi1_d0 */
-   DRA7XX_CORE_IOPAD(0x37b0, PIN_INPUT_SLEW | MUX_MODE0) 
/* spi1_cs0 */
-   DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_SLEW | MUX_MODE6) 
/* spi1_cs2.hdmi1_hpd */
-   DRA7XX_CORE_IOPAD(0x37bc, PIN_INPUT_SLEW | MUX_MODE6) 
/* spi1_cs3.hdmi1_cec */
-   >;
-   };
-
-   mcspi2_pins: pinmux_mcspi2_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x37c0, PIN_INPUT | MUX_MODE0) /* 
spi2_sclk */
-   DRA7XX_CORE_IOPAD(0x37c4, PIN_INPUT_SLEW | MUX_MODE0) 
/* spi2_d1 */
-   DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_SLEW | MUX_MODE0) 
/* spi2_d1 */
-   DRA7XX_CORE_IOPAD(0x37cc, PIN_INPUT_SLEW | MUX_MODE0) 
/* spi2_cs0 */
-   >;
-   };
-
-   uart1_pins: pinmux_uart1_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x37e0, PIN_INPUT_SLEW | MUX_MODE0) 
/* uart1_rxd */
-   DRA7XX_CORE_IOPAD(0x37e4, PIN_INPUT_SLEW | MUX_MODE0) 
/* uart1_txd */
-   DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT | MUX_MODE3) /* 
uart1_ctsn */
-   DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT | MUX_MODE3) /* 
uart1_rtsn */
-   >;
-   };
-
-   uart2_pins: pinmux_uart2_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT | MUX_MODE0) /* 
uart2_rxd */
-   DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT | MUX_MODE0) /* 
uart2_txd */
-   DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT | MUX_MODE0) /* 
uart2_ctsn */
-   DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT | MUX_MODE0) /* 
uart2_rtsn */
-   >;
-   };
-
-   uart3_pins: pinmux_uart3_pins {
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) 
/* uart3_rxd */
-   DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) 
/* uart3_txd */
-   >;
-   };
-
-   usb1_pins: pinmux_usb1_pins {
-pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) 
/* usb1_drvvbus */
->;
-};
-
-   usb2_pins: pinmux_usb2_pins {
-pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) 
/* usb2_drvvbus */
->;
-};
-
-   nand_flash_x16: nand_flash_x16 {
-   /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
-* So NAND flash requires following switch settings:
-* SW5.1 (NAND_BOOTn) = ON (LOW)
-* SW5.9 (GPMC_WPN) = OFF (HIGH)
-*/
-   pinctrl-single,pins = <
-   DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT  | MUX_MODE0)   
/* gpmc_ad0 */
-   DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT  | MUX_MODE0)   
/* gpmc_ad1 */
-   DRA7XX_CORE_IOPAD(0x3408,