Re: [U-Boot] [PATCH 2/2] arm: i.MX6UL: add Armadeus Systems OPOS6UL SoM and OPOS6ULDev carrier board

2017-03-13 Thread Simon Glass 
On 7 March 2017 at 06:33, Sébastien Szymanski
 wrote:
> OPOS6UL is an i.MX6UL based SoM with 256MB RAM, 4GB eMMC and an ethernet
> phy. OPOS6ULDev is carrier board for the OPOS6UL.
>
> U-Boot SPL 2017.03-rc3-2-g5085c26 (Mar 07 2017 - 09:48:09)
> Trying to boot from MMC1
>
> U-Boot 2017.03-rc3-2-g5085c26 (Mar 07 2017 - 09:48:09 +0100)
>
> CPU:   Freescale i.MX6UL rev1.0 528 MHz (running at 396 MHz)
> CPU:   Industrial temperature grade (-40C to 105C) at 40C
> Reset cause: POR
> Model: Armadeus Systems OPOS6UL SoM on OPOS6ULDev board
> DRAM:  256 MiB
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1
> Video: 800x480x18
> In:serial
> Out:   serial
> Err:   serial
> Net:   FEC [PRIME]
> Hit any key to stop autoboot:  0
>
> Signed-off-by: Sébastien Szymanski 
> ---
>  arch/arm/cpu/armv7/mx6/Kconfig  |  15 ++
>  arch/arm/cpu/armv7/mx6/Makefile |   1 +
>  arch/arm/cpu/armv7/mx6/opos6ul.c| 302 +++
>  arch/arm/dts/Makefile   |   3 +-
>  arch/arm/dts/imx6ul-opos6ul.dtsi| 192 +++
>  arch/arm/dts/imx6ul-opos6uldev.dts  | 412 
> 
>  arch/arm/include/asm/arch-mx6/opos6ul.h |  16 ++
>  board/armadeus/opos6uldev/Kconfig   |  15 ++
>  board/armadeus/opos6uldev/MAINTAINERS   |   6 +
>  board/armadeus/opos6uldev/Makefile  |   6 +
>  board/armadeus/opos6uldev/board.c   | 125 ++
>  configs/opos6uldev_defconfig|  85 +++
>  include/configs/opos6uldev.h| 219 +
>  13 files changed, 1396 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/cpu/armv7/mx6/opos6ul.c
>  create mode 100644 arch/arm/dts/imx6ul-opos6ul.dtsi
>  create mode 100644 arch/arm/dts/imx6ul-opos6uldev.dts
>  create mode 100644 arch/arm/include/asm/arch-mx6/opos6ul.h
>  create mode 100644 board/armadeus/opos6uldev/Kconfig
>  create mode 100644 board/armadeus/opos6uldev/MAINTAINERS
>  create mode 100644 board/armadeus/opos6uldev/Makefile
>  create mode 100644 board/armadeus/opos6uldev/board.c
>  create mode 100644 configs/opos6uldev_defconfig
>  create mode 100644 include/configs/opos6uldev.h

Reviewed-by: Simon Glass 
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[U-Boot] [PATCH 2/2] arm: i.MX6UL: add Armadeus Systems OPOS6UL SoM and OPOS6ULDev carrier board

2017-03-07 Thread Sébastien Szymanski 
OPOS6UL is an i.MX6UL based SoM with 256MB RAM, 4GB eMMC and an ethernet
phy. OPOS6ULDev is carrier board for the OPOS6UL.

U-Boot SPL 2017.03-rc3-2-g5085c26 (Mar 07 2017 - 09:48:09)
Trying to boot from MMC1

U-Boot 2017.03-rc3-2-g5085c26 (Mar 07 2017 - 09:48:09 +0100)

CPU:   Freescale i.MX6UL rev1.0 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 40C
Reset cause: POR
Model: Armadeus Systems OPOS6UL SoM on OPOS6ULDev board
DRAM:  256 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Video: 800x480x18
In:serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0

Signed-off-by: Sébastien Szymanski 
---
 arch/arm/cpu/armv7/mx6/Kconfig  |  15 ++
 arch/arm/cpu/armv7/mx6/Makefile |   1 +
 arch/arm/cpu/armv7/mx6/opos6ul.c| 302 +++
 arch/arm/dts/Makefile   |   3 +-
 arch/arm/dts/imx6ul-opos6ul.dtsi| 192 +++
 arch/arm/dts/imx6ul-opos6uldev.dts  | 412 
 arch/arm/include/asm/arch-mx6/opos6ul.h |  16 ++
 board/armadeus/opos6uldev/Kconfig   |  15 ++
 board/armadeus/opos6uldev/MAINTAINERS   |   6 +
 board/armadeus/opos6uldev/Makefile  |   6 +
 board/armadeus/opos6uldev/board.c   | 125 ++
 configs/opos6uldev_defconfig|  85 +++
 include/configs/opos6uldev.h| 219 +
 13 files changed, 1396 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/mx6/opos6ul.c
 create mode 100644 arch/arm/dts/imx6ul-opos6ul.dtsi
 create mode 100644 arch/arm/dts/imx6ul-opos6uldev.dts
 create mode 100644 arch/arm/include/asm/arch-mx6/opos6ul.h
 create mode 100644 board/armadeus/opos6uldev/Kconfig
 create mode 100644 board/armadeus/opos6uldev/MAINTAINERS
 create mode 100644 board/armadeus/opos6uldev/Makefile
 create mode 100644 board/armadeus/opos6uldev/board.c
 create mode 100644 configs/opos6uldev_defconfig
 create mode 100644 include/configs/opos6uldev.h

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 19cc1f6..f31f612 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -42,6 +42,16 @@ config MX6UL_LITESOM
select DM_THERMAL
select SUPPORT_SPL
 
+config MX6UL_OPOS6UL
+   bool
+   select MX6UL
+   select BOARD_LATE_INIT
+   select DM
+   select DM_GPIO
+   select DM_MMC
+   select DM_THERMAL
+   select SUPPORT_SPL
+
 config MX6ULL
bool
select MX6UL
@@ -248,6 +258,10 @@ config TARGET_MX6ULL_14X14_EVK
 config TARGET_NITROGEN6X
bool "nitrogen6x"
 
+config TARGET_OPOS6ULDEV
+   bool "Armadeus OPOS6ULDev board"
+   select MX6UL_OPOS6UL
+
 config TARGET_OT1200
bool "Bachmann OT1200"
select SUPPORT_SPL
@@ -346,6 +360,7 @@ config SYS_SOC
 source "board/ge/bx50v3/Kconfig"
 source "board/advantech/dms-ba16/Kconfig"
 source "board/aristainetos/Kconfig"
+source "board/armadeus/opos6uldev/Kconfig"
 source "board/bachmann/ot1200/Kconfig"
 source "board/barco/platinum/Kconfig"
 source "board/barco/titanium/Kconfig"
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile
index 024f703..c183eb4 100644
--- a/arch/arm/cpu/armv7/mx6/Makefile
+++ b/arch/arm/cpu/armv7/mx6/Makefile
@@ -11,3 +11,4 @@ obj-y := soc.o clock.o
 obj-$(CONFIG_SPL_BUILD) += ddr.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_MX6UL_LITESOM)  += litesom.o
+obj-$(CONFIG_MX6UL_OPOS6UL)  += opos6ul.o
diff --git a/arch/arm/cpu/armv7/mx6/opos6ul.c b/arch/arm/cpu/armv7/mx6/opos6ul.c
new file mode 100644
index 000..ea2f0ec
--- /dev/null
+++ b/arch/arm/cpu/armv7/mx6/opos6ul.c
@@ -0,0 +1,302 @@
+/*
+ * Copyright (C) 2017 Armadeus Systems
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FEC_MXC
+#include 
+
+#define MDIO_PAD_CTRL ( \
+   PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+   PAD_CTL_DSE_40ohm \
+)
+
+#define ENET_PAD_CTRL_PU ( \
+   PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+   PAD_CTL_DSE_40ohm \
+)
+
+#define ENET_PAD_CTRL_PD ( \
+   PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
+   PAD_CTL_DSE_40ohm \
+)
+
+#define ENET_CLK_PAD_CTRL ( \
+   PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
+   PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST \
+)
+
+static iomux_v3_cfg_t const fec1_pads[] = {
+   MX6_PAD_GPIO1_IO06__ENET1_MDIO| MUX_PAD_CTRL(MDIO_PAD_CTRL),
+   MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(MDIO_PAD_CTRL),
+   MX6_PAD_ENET1_RX_ER__ENET1_RX_ER  | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
+   MX6_PAD_ENET1_RX_EN__ENET1_RX_EN  | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
+