From: Tang Yuantian yuantian.t...@freescale.com
Add deep sleep support in SPI/SD boot. The destination address
second stage uboot image is loaded to is changed because
currently this address will be used by kernel which means
we can't reserve it for resume.
Entry point to kernel is still placed in second stage uboot.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
- deep sleep for nand boot is not supported right now due to
the hardware limitation
- based on 'next' branch.
arch/powerpc/cpu/mpc85xx/fdt.c | 15 +++
board/freescale/t104xrdb/spl.c | 19 +++
include/configs/T104xRDB.h | 18 +-
3 files changed, 43 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 3665ec6..3222e26 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -134,6 +134,21 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
printf(Failed to reserve memory for spin table: %s\n,
fdt_strerror(off));
}
+#ifdef CONFIG_DEEP_SLEEP
+#ifdef CONFIG_SPL_MMC_BOOT
+ off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START,
+ CONFIG_SYS_MMC_U_BOOT_SIZE);
+ if (off 0)
+ printf(Failed to reserve memory for SD deep sleep: %s\n,
+ fdt_strerror(off));
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START,
+ CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE);
+ if (off 0)
+ printf(Failed to reserve memory for SPI deep sleep: %s\n,
+ fdt_strerror(off));
+#endif
+#endif
}
#endif
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index c628c95..3822a37 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -11,6 +11,7 @@
#include mmc.h
#include fsl_esdhc.h
#include spi_flash.h
+#include asm/mpc85xx_gpio.h
DECLARE_GLOBAL_DATA_PTR;
@@ -55,6 +56,11 @@ void board_init_f(ulong bootflag)
/* Update GD pointer */
gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
+#ifdef CONFIG_DEEP_SLEEP
+ /* disable the console if boot from deep sleep */
+ if (in_be32(gur-scrtsr[0]) (1 3))
+ gd-flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+#endif
/* compiler optimization barrier needed for GCC = 3.4 */
__asm__ __volatile__( : : : memory);
@@ -120,3 +126,16 @@ void board_init_r(gd_t *gd, ulong dest_addr)
nand_boot();
#endif
}
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+ void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
+
+ /* does not provide HW signals for power management */
+ clrbits_8(cpld_base + 0x17, 0x40);
+ /* Disable MCKE isolation */
+ gpio_set_value(2, 0);
+ udelay(1);
+}
+#endif
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index c96f03c..fe42935 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -33,7 +33,7 @@
#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_FSL_LAW /* Use common FSL init code */
-#define CONFIG_SYS_TEXT_BASE 0x00201000
+#define CONFIG_SYS_TEXT_BASE 0x30001000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
#define CONFIG_SPL_PAD_TO 0x4
#define CONFIG_SPL_MAX_SIZE0x28000
@@ -49,21 +49,21 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_SIZE(768 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST 0x0020
-#define CONFIG_SYS_NAND_U_BOOT_START 0x0020
+#define CONFIG_SYS_NAND_U_BOOT_DST 0x3000
+#define CONFIG_SYS_NAND_U_BOOT_START 0x3000
#define CONFIG_SYS_NAND_U_BOOT_OFFS(256 10)
#define CONFIG_SYS_LDSCRIPTarch/powerpc/cpu/mpc85xx/u-boot-nand.lds
#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
-#defineCONFIG_RESET_VECTOR_ADDRESS 0x200FFC
+#defineCONFIG_RESET_VECTOR_ADDRESS 0x3FFC
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_FLASH_MINIMAL
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 10)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST(0x0020)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x0020)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST(0x3000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x3000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 10)
#define CONFIG_SYS_LDSCRIPTarch/powerpc/cpu/mpc85xx/u-boot.lds
#ifndef CONFIG_SPL_BUILD
@@ -73,12 +73,12 @@
#endif
#ifdef CONFIG_SDCARD
-#defineCONFIG_RESET_VECTOR_ADDRESS 0x200FFC
+#defineCONFIG_RESET_VECTOR_ADDRESS 0x3FFC
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_MMC_MINIMAL
#define
