Re: [U-Boot] [PATCH 2/4 v2] fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum

2016-11-18 Thread york sun
On 11/17/2016 07:39 PM, Shengzhou Liu wrote:
> - add additional function erratum_a009942_check_cpo to check if the
>   board needs tuning CPO calibration for optimal setting.
> - move ERRATUM_A009942(with revision to check cpo_sample option) from
>   fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
> - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
> - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.
>
> Signed-off-by: Shengzhou Liu 
> ---
> v2: fix warning.

Shengzhou,

Your first patch causes compiling error. Please test one-by-one before 
sending an update.

York
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[U-Boot] [PATCH 2/4 v2] fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum

2016-11-17 Thread Shengzhou Liu
- add additional function erratum_a009942_check_cpo to check if the
  board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
  fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.

Signed-off-by: Shengzhou Liu 
---
v2: fix warning.

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   |   7 +-
 arch/powerpc/cpu/mpc85xx/cpu_init.c   |   8 +-
 arch/powerpc/include/asm/config_mpc85xx.h |   2 -
 board/freescale/ls1021aqds/ls1021aqds.c   |   6 +-
 drivers/ddr/fsl/ctrl_regs.c   | 136 +-
 drivers/ddr/fsl/fsl_ddr_gen4.c|  23 -
 drivers/ddr/fsl/mpc85xx_ddr_gen3.c|   3 -
 include/fsl_ddr.h |   2 +
 include/fsl_ddr_sdram.h   |   3 +-
 9 files changed, 155 insertions(+), 35 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index b7a2e0c..19de15e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -25,6 +25,9 @@
 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 #include 
 #endif
+#ifdef CONFIG_SYS_FSL_DDR
+#include 
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -400,7 +403,9 @@ int arch_early_init_r(void)
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
erratum_a009635();
 #endif
-
+#if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
+   erratum_a009942_check_cpo();
+#endif
 #ifdef CONFIG_MP
 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
/* Check the psci version to determine if the psci is supported */
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 53b3729..0e8be1d 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -45,7 +45,9 @@
 #include 
 #include 
 #endif
-
+#ifndef CONFIG_QEMU_E500
+#include 
+#endif
 #include "../../../../drivers/block/fsl_sata.h"
 #ifdef CONFIG_U_QE
 #include 
@@ -947,6 +949,10 @@ int cpu_init_r(void)
 
 #endif /* CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE */
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
+   erratum_a009942_check_cpo();
+#endif
+
 #ifdef CONFIG_FMAN_ENET
fman_enet_init();
 #endif
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index 6d845e8..1e62a9c 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -681,7 +681,6 @@
 #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_FSL_ERRATUM_A004468
-#define CONFIG_SYS_FSL_ERRATUM_A_004934
 #define CONFIG_SYS_FSL_ERRATUM_A005871
 #define CONFIG_SYS_FSL_ERRATUM_A006379
 #define CONFIG_SYS_FSL_ERRATUM_A007186
@@ -720,7 +719,6 @@
 #define CONFIG_SYS_FSL_TBCLK_DIV   16
 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
-#define CONFIG_SYS_FSL_ERRATUM_A_004934
 #define CONFIG_SYS_FSL_ERRATUM_A005871
 #define CONFIG_SYS_FSL_ERRATUM_A006379
 #define CONFIG_SYS_FSL_ERRATUM_A007186
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c 
b/board/freescale/ls1021aqds/ls1021aqds.c
index 4eb38a7..79078d2 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -22,7 +22,7 @@
 #include 
 #include 
 #include 
-
+#include 
 #include "../common/sleep.h"
 #include "../common/qixis.h"
 #include "ls1021aqds_qixis.h"
@@ -433,7 +433,9 @@ int board_init(void)
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
erratum_a010315();
 #endif
-
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
+   erratum_a009942_check_cpo();
+#endif
major = get_soc_major_rev();
if (major == SOC_MAJOR_VER_1_0) {
/* Set CCI-400 control override register to
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 24fd366..69b3aed 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -5,14 +5,14 @@
  */
 
 /*
- * Generic driver for Freescale DDR/DDR2/DDR3 memory controller.
+ * Generic driver for Freescale DDR/DDR2/DDR3/DDR4 memory controller.
  * Based on code from spd_sdram.c
  * Author: James Yang [at freescale.com]
  */
 
 #include 
 #include 
-
+#include 
 #include 
 #include 
 #include 
@@ -2306,6 +2306,38 @@ compute_fsl_memctl_config_regs(const unsigned int 
ctrl_num,
unsigned int ip_rev = 0;
unsigned int unq_mrs_en = 0;
int cs_en = 1;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
+   unsigned int ddr_freq;
+#endif
+#if (defined(CONFIG_SYS_FSL_ERRATUM_A008378) && \
+   defined(CONFIG_SYS_FSL_DDRC_GEN4)) || \
+   defined(CONFIG_SYS_FSL_ERRATUM_A009942)
+   struct ccsr_ddr __iomem *ddrc;
+
+   switch (ctrl_num) {
+   case 0:
+   ddrc =