From: Laurentiu Tudor
Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.
Signed-off-by: Laurentiu Tudor
---
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 7cd5333ff4..84bed8d423 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -25,6 +25,8 @@
#define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x0037)
#define SYS_FSL_QSPI_ADDR (CONFIG_SYS_IMMR + 0x010c)
#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x0114)
+#define FSL_ESDHC1_BASE_ADDR CONFIG_SYS_FSL_ESDHC_ADDR
+#define FSL_ESDHC2_BASE_ADDR (CONFIG_SYS_IMMR + 0x0115)
#ifndef CONFIG_NXP_LSCH3_2
#define CONFIG_SYS_IFC_ADDR(CONFIG_SYS_IMMR + 0x0124)
#endif
@@ -79,10 +81,23 @@
#define TZASC_REGION_ATTRIBUTES_0(x) ((TZASC1_BASE + (x * 0x1)) + 0x110)
#define TZASC_REGION_ID_ACCESS_0(x)((TZASC1_BASE + (x * 0x1)) + 0x114)
+/* EDMA */
+#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x012c)
+
/* SATA */
#define AHCI_BASE_ADDR1(CONFIG_SYS_IMMR +
0x0220)
#define AHCI_BASE_ADDR2(CONFIG_SYS_IMMR +
0x0221)
+/* QDMA */
+#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x0738)
+#define QMAN_CQSIDR_REG0x20a80
+
+/* DISPLAY */
+#define DISPLAY_BASE_ADDR (CONFIG_SYS_IMMR + 0x0e08)
+
+/* GPU */
+#define GPU_BASE_ADDR (CONFIG_SYS_IMMR + 0x0e0c)
+
/* SFP */
#define CONFIG_SYS_SFP_ADDR(CONFIG_SYS_IMMR + 0x00e80200)
--
2.17.1
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