Re: [U-Boot] [PATCH 2/5] board: TI K2G: FC SoC 1GHz and DDR3 1066 MT/s support

[Lokesh Vutla]

On Monday 18 December 2017 09:16 PM, Tom Rini wrote:
> On Mon, Dec 18, 2017 at 03:10:04PM +0530, Lokesh Vutla wrote:
> 
>> From: Rex Chang 
>>
>> Added support for K2G EVM with FlipChip SoC of which
>> ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
>> backward compatible with old revision EVM and EVM
>> with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.
>>
>> The new SoC supports 2 different speeds at 1GHz and 600MHz.
>> Modyfied the CPU Name to show which SoC is used in the EVM.
>> Modified the DDR3 configuration to reflect New SoC supports
>> 2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.
>>
>> Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
>> and set the u-boot env variable board_name accordingly.
>>
>> Modified findfdt script in u-boot environment variable to include new k2g 
>> board type.
>>
>> Signed-off-by: Rex Chang 
>> Signed-off-by: Lokesh Vutla 
>> ---
>>  arch/arm/mach-keystone/include/mach/hardware.h |  7 
>>  arch/arm/mach-keystone/init.c  | 17 +++-
>>  board/ti/ks2_evm/board.h   |  4 ++
>>  board/ti/ks2_evm/board_k2g.c   | 30 +++---
>>  board/ti/ks2_evm/ddr3_k2g.c| 57 
>> +-
>>  board/ti/ks2_evm/mux-k2g.h |  2 +-
>>  include/configs/k2g_evm.h  |  4 +-
>>  7 files changed, 109 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm/mach-keystone/include/mach/hardware.h 
>> b/arch/arm/mach-keystone/include/mach/hardware.h
>> index 6629406870..e1621b27a4 100644
>> --- a/arch/arm/mach-keystone/include/mach/hardware.h
>> +++ b/arch/arm/mach-keystone/include/mach/hardware.h
>> @@ -327,6 +327,9 @@ typedef volatile unsigned int   *dv_reg_p;
>>  #define CPU_66AK2Lx 0xb9a7
>>  #define CPU_66AK2Gx 0xbb06
>>  
>> +/* Variant definitions */
>> +#define CPU_66AK2G1x0x08
>> +
>>  /* DEVSPEED register */
>>  #define DEVSPEED_DEVSPEED_SHIFT 16
>>  #define DEVSPEED_DEVSPEED_MASK  (0xfff << 16)
>> @@ -390,6 +393,10 @@ static inline u8 cpu_revision(void)
>>  int cpu_to_bus(u32 *ptr, u32 length);
>>  void sdelay(unsigned long);
>>  
>> +#ifdef CONFIG_SOC_K2G
>> +extern int arm_speeds[];
>> +#endif
> 
> Lets not ifdef around externs.

okay.

> 
> [snip]
>> @@ -241,7 +253,8 @@ int print_cpuinfo(void)
>>  puts("1.1\n");
>>  else if (rev == 0)
>>  puts("1.0\n");
>> -
>> +else if (rev == 8)
>> +puts("1.0\n");
> 
> Both values are rev "1.0" ?

Yeah, basically both are rev 1.0 but with different speed grades. This
is the naming convention recommended from marketing team.

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH 2/5] board: TI K2G: FC SoC 1GHz and DDR3 1066 MT/s support

[Tom Rini]

On Mon, Dec 18, 2017 at 03:10:04PM +0530, Lokesh Vutla wrote:

> From: Rex Chang 
> 
> Added support for K2G EVM with FlipChip SoC of which
> ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
> backward compatible with old revision EVM and EVM
> with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.
> 
> The new SoC supports 2 different speeds at 1GHz and 600MHz.
> Modyfied the CPU Name to show which SoC is used in the EVM.
> Modified the DDR3 configuration to reflect New SoC supports
> 2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.
> 
> Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
> and set the u-boot env variable board_name accordingly.
> 
> Modified findfdt script in u-boot environment variable to include new k2g 
> board type.
> 
> Signed-off-by: Rex Chang 
> Signed-off-by: Lokesh Vutla 
> ---
>  arch/arm/mach-keystone/include/mach/hardware.h |  7 
>  arch/arm/mach-keystone/init.c  | 17 +++-
>  board/ti/ks2_evm/board.h   |  4 ++
>  board/ti/ks2_evm/board_k2g.c   | 30 +++---
>  board/ti/ks2_evm/ddr3_k2g.c| 57 
> +-
>  board/ti/ks2_evm/mux-k2g.h |  2 +-
>  include/configs/k2g_evm.h  |  4 +-
>  7 files changed, 109 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/mach-keystone/include/mach/hardware.h 
> b/arch/arm/mach-keystone/include/mach/hardware.h
> index 6629406870..e1621b27a4 100644
> --- a/arch/arm/mach-keystone/include/mach/hardware.h
> +++ b/arch/arm/mach-keystone/include/mach/hardware.h
> @@ -327,6 +327,9 @@ typedef volatile unsigned int   *dv_reg_p;
>  #define CPU_66AK2Lx  0xb9a7
>  #define CPU_66AK2Gx  0xbb06
>  
> +/* Variant definitions */
> +#define CPU_66AK2G1x 0x08
> +
>  /* DEVSPEED register */
>  #define DEVSPEED_DEVSPEED_SHIFT  16
>  #define DEVSPEED_DEVSPEED_MASK   (0xfff << 16)
> @@ -390,6 +393,10 @@ static inline u8 cpu_revision(void)
>  int cpu_to_bus(u32 *ptr, u32 length);
>  void sdelay(unsigned long);
>  
> +#ifdef CONFIG_SOC_K2G
> +extern int arm_speeds[];
> +#endif

Lets not ifdef around externs.

[snip]
> @@ -241,7 +253,8 @@ int print_cpuinfo(void)
>   puts("1.1\n");
>   else if (rev == 0)
>   puts("1.0\n");
> -
> + else if (rev == 8)
> + puts("1.0\n");

Both values are rev "1.0" ?

Thanks!

-- 
Tom


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[U-Boot] [PATCH 2/5] board: TI K2G: FC SoC 1GHz and DDR3 1066 MT/s support

[Lokesh Vutla]

From: Rex Chang 

Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.

The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.

Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.

Modified findfdt script in u-boot environment variable to include new k2g board 
type.

Signed-off-by: Rex Chang 
Signed-off-by: Lokesh Vutla 
---
 arch/arm/mach-keystone/include/mach/hardware.h |  7 
 arch/arm/mach-keystone/init.c  | 17 +++-
 board/ti/ks2_evm/board.h   |  4 ++
 board/ti/ks2_evm/board_k2g.c   | 30 +++---
 board/ti/ks2_evm/ddr3_k2g.c| 57 +-
 board/ti/ks2_evm/mux-k2g.h |  2 +-
 include/configs/k2g_evm.h  |  4 +-
 7 files changed, 109 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-keystone/include/mach/hardware.h 
b/arch/arm/mach-keystone/include/mach/hardware.h
index 6629406870..e1621b27a4 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -327,6 +327,9 @@ typedef volatile unsigned int   *dv_reg_p;
 #define CPU_66AK2Lx0xb9a7
 #define CPU_66AK2Gx0xbb06
 
+/* Variant definitions */
+#define CPU_66AK2G1x   0x08
+
 /* DEVSPEED register */
 #define DEVSPEED_DEVSPEED_SHIFT16
 #define DEVSPEED_DEVSPEED_MASK (0xfff << 16)
@@ -390,6 +393,10 @@ static inline u8 cpu_revision(void)
 int cpu_to_bus(u32 *ptr, u32 length);
 void sdelay(unsigned long);
 
+#ifdef CONFIG_SOC_K2G
+extern int arm_speeds[];
+#endif
+
 #endif
 
 #endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 6e5a1e1af1..520765be83 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -229,7 +229,19 @@ int print_cpuinfo(void)
puts("66AK2Ex SR");
break;
case CPU_66AK2Gx:
-   puts("66AK2Gx SR");
+   puts("66AK2Gx");
+#ifdef CONFIG_SOC_K2G
+   {
+   int speed = get_max_arm_speed(arm_speeds);
+   if (speed == SPD1000)
+   puts("-100 ");
+   else if (speed == SPD600)
+   puts("-60 ");
+   else
+   puts("-xx ");
+   }
+#endif
+   puts("SR");
break;
default:
puts("Unknown\n");
@@ -241,7 +253,8 @@ int print_cpuinfo(void)
puts("1.1\n");
else if (rev == 0)
puts("1.0\n");
-
+   else if (rev == 8)
+   puts("1.0\n");
return 0;
 }
 #endif
diff --git a/board/ti/ks2_evm/board.h b/board/ti/ks2_evm/board.h
index b3ad1881fa..48d60a1c74 100644
--- a/board/ti/ks2_evm/board.h
+++ b/board/ti/ks2_evm/board.h
@@ -20,6 +20,10 @@ static inline int board_is_k2g_gp(void)
 {
return board_ti_is("66AK2GGP");
 }
+static inline int board_is_k2g_g1(void)
+{
+   return board_ti_is("66AK2GG1");
+}
 static inline int board_is_k2g_ice(void)
 {
return board_ti_is("66AK2GIC");
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 01328f1955..fab3764742 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -55,7 +55,7 @@ unsigned int get_external_clk(u32 clk)
return clk_freq;
 }
 
-static int arm_speeds[DEVSPEED_NUMSPDS] = {
+int arm_speeds[DEVSPEED_NUMSPDS] = {
SPD400,
SPD600,
SPD800,
@@ -159,13 +159,20 @@ static struct pll_init_data nss_pll_config[MAX_SYSCLK] = {
[SYSCLK_26MHz] = {NSS_PLL, 1000, 13, 2},
 };
 
-static struct pll_init_data ddr3_pll_config[MAX_SYSCLK] = {
+static struct pll_init_data ddr3_pll_config_800[MAX_SYSCLK] = {
[SYSCLK_19MHz] = {DDR3A_PLL, 167, 1, 16},
[SYSCLK_24MHz] = {DDR3A_PLL, 133, 1, 16},
[SYSCLK_25MHz] = {DDR3A_PLL, 128, 1, 16},
[SYSCLK_26MHz] = {DDR3A_PLL, 123, 1, 16},
 };
 
+static struct pll_init_data ddr3_pll_config_1066[MAX_SYSCLK] = {
+   [SYSCLK_19MHz] = {DDR3A_PLL, 194, 1, 14},
+   [SYSCLK_24MHz] = {DDR3A_PLL, 156, 1, 14},
+   [SYSCLK_25MHz] = {DDR3A_PLL, 149, 1, 14},
+   [SYSCLK_26MHz] = {DDR3A_PLL, 144, 1, 14},
+};
+
 struct pll_init_data *get_pll_init_data(int pll)
 {
int speed;
@@ -188,7 +195,15 @@ struct pll_init_data *get_pll_init_data(int pll)
data = _pll_config[sysclk_index];
break;
case DDR3_PLL:
-