Re: [U-Boot] [PATCH 3/4] arm: ls102xa: Fixed a register definition error

2014-11-25 Thread York Sun 
On 10/09/2014 01:11 AM, yuantian.t...@freescale.com wrote:
 From: Tang Yuantian yuantian.t...@freescale.com
 
 There are 8 SCFG_SPARECR registers in SCFG memory block, not one.
 
 Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
 ---
  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 

Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks.

York


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[U-Boot] [PATCH 3/4] arm: ls102xa: Fixed a register definition error

2014-10-09 Thread Yuantian.Tang 
From: Tang Yuantian yuantian.t...@freescale.com

There are 8 SCFG_SPARECR registers in SCFG memory block, not one.

Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 7995fe2..b5db720 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -182,7 +182,7 @@ struct ccsr_scfg {
u32 etsecmcr;
u32 sdhciovserlcr;
u32 resv14[61];
-   u32 sparecr;
+   u32 sparecr[8];
 };
 
 /* Clocking */
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH 3/4] arm: ls102xa: Fixed a register definition error

2014-09-28 Thread Yuantian.Tang 
From: Tang Yuantian yuantian.t...@freescale.com

There are 8 SCFG_SPARECR registers in SCFG memory block, not one.

Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 7995fe2..b5db720 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -182,7 +182,7 @@ struct ccsr_scfg {
u32 etsecmcr;
u32 sdhciovserlcr;
u32 resv14[61];
-   u32 sparecr;
+   u32 sparecr[8];
 };
 
 /* Clocking */
-- 
2.1.0.27.g96db324

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