[U-Boot] [PATCH 3/5] ls1046ardb: cpld: add API for selecting core volt

[Zhiqiang Hou]

From: Hou Zhiqiang <zhiqiang....@nxp.com>

Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
---
 board/freescale/ls1046ardb/cpld.c | 9 +++++++++
 board/freescale/ls1046ardb/cpld.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/board/freescale/ls1046ardb/cpld.c 
b/board/freescale/ls1046ardb/cpld.c
index 81a646e..c0500f4 100644
--- a/board/freescale/ls1046ardb/cpld.c
+++ b/board/freescale/ls1046ardb/cpld.c
@@ -82,6 +82,15 @@ void cpld_set_sd(void)
 
        CPLD_WRITE(system_rst, 1);
 }
+
+void cpld_select_core_volt(bool en_0v9)
+{
+       u8 reg17 = en_0v9;
+
+       CPLD_WRITE(vdd_en, 1);
+       CPLD_WRITE(vdd_sel, reg17);
+}
+
 #ifdef DEBUG
 static void cpld_dump_regs(void)
 {
diff --git a/board/freescale/ls1046ardb/cpld.h 
b/board/freescale/ls1046ardb/cpld.h
index 458da7e..f6a1a61 100644
--- a/board/freescale/ls1046ardb/cpld.h
+++ b/board/freescale/ls1046ardb/cpld.h
@@ -35,6 +35,7 @@ struct cpld_data {
 u8 cpld_read(unsigned int reg);
 void cpld_write(unsigned int reg, u8 value);
 void cpld_rev_bit(unsigned char *value);
+void cpld_select_core_volt(bool en_0v9);
 
 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
 #define CPLD_WRITE(reg, value)  \
-- 
2.1.0.27.g96db324

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