This driver can control up to 32 clocks.
Signed-off-by: Álvaro Fernández Rojas
---
arch/mips/dts/brcm,bcm6328.dtsi | 7 +++
include/dt-bindings/clock/bcm6328-clock.h | 25 +
2 files changed, 32 insertions(+)
create mode 100644 include/dt-bindings/clock/bcm6328-clock.h
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi
index a5b43ae..6b5c5dd 100644
--- a/arch/mips/dts/brcm,bcm6328.dtsi
+++ b/arch/mips/dts/brcm,bcm6328.dtsi
@@ -4,6 +4,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
+#include
#include
#include "skeleton.dtsi"
@@ -43,6 +44,12 @@
clock-frequency = <5000>;
u-boot,dm-pre-reloc;
};
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x1004 0x4>;
+ #clock-cells = <1>;
+ };
};
ubus {
diff --git a/include/dt-bindings/clock/bcm6328-clock.h
b/include/dt-bindings/clock/bcm6328-clock.h
new file mode 100644
index 000..5d0fc11
--- /dev/null
+++ b/include/dt-bindings/clock/bcm6328-clock.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6328_H
+#define __DT_BINDINGS_CLOCK_BCM6328_H
+
+#define BCM6328_CLK_PHYMIPS0
+#define BCM6328_CLK_ADSL_QPROC 1
+#define BCM6328_CLK_ADSL_AFE 2
+#define BCM6328_CLK_ADSL 3
+#define BCM6328_CLK_MIPS 4
+#define BCM6328_CLK_SAR5
+#define BCM6328_CLK_PCM6
+#define BCM6328_CLK_USBD 7
+#define BCM6328_CLK_USBH 8
+#define BCM6328_CLK_HSSPI 9
+#define BCM6328_CLK_PCIE 10
+#define BCM6328_CLK_ROBOSW 11
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6328_H */
--
2.1.4
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot