Re: [U-Boot] [PATCH 3/9] mmc: Add Marvell Xenon SDHCI controller driver

2017-01-19 Thread Stefan Roese 

Hi Masahiro,

On 20.01.2017 00:16, Masahiro Yamada wrote:

2017-01-19 16:39 GMT+09:00 Stefan Roese :

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 9ed8da39ef..87cc9439f3 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -287,6 +287,17 @@ config MMC_SDHCI_SPEAR

  If unsure, say N.

+config MMC_XENON_SDHCI
+   bool "SDHCI support for the Xenon SDHCI controller"
+   depends on MMC_SDHCI && DM_MMC && OF_CONTROL
+   help
+ Support for Xenon SDHCI host controller on Marvell Armada 3700
+ 7k/8k ARM SoCs platforms
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
 config MMC_SDHCI_TEGRA
bool "SDHCI platform support for the Tegra SD/MMC Controller"
depends on TEGRA



Can you rename the CONFIG symbol to MMC_SDHCI_XENON, please?


Sure.


The renaming is underway, but I want to make this consistent
in the MMC subsystem in the end.


Thanks for working on this. I'll queue this change in v2 and will send
it in a few days.

Thanks,
Stefan
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Re: [U-Boot] [PATCH 3/9] mmc: Add Marvell Xenon SDHCI controller driver

2017-01-19 Thread Masahiro Yamada 
Hi Stefan,


2017-01-19 16:39 GMT+09:00 Stefan Roese :
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 9ed8da39ef..87cc9439f3 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -287,6 +287,17 @@ config MMC_SDHCI_SPEAR
>
>   If unsure, say N.
>
> +config MMC_XENON_SDHCI
> +   bool "SDHCI support for the Xenon SDHCI controller"
> +   depends on MMC_SDHCI && DM_MMC && OF_CONTROL
> +   help
> + Support for Xenon SDHCI host controller on Marvell Armada 3700
> + 7k/8k ARM SoCs platforms
> +
> + If you have a controller with this interface, say Y here.
> +
> + If unsure, say N.
> +
>  config MMC_SDHCI_TEGRA
> bool "SDHCI platform support for the Tegra SD/MMC Controller"
> depends on TEGRA


Can you rename the CONFIG symbol to MMC_SDHCI_XENON, please?

The renaming is underway, but I want to make this consistent
in the MMC subsystem in the end.




-- 
Best Regards
Masahiro Yamada
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[U-Boot] [PATCH 3/9] mmc: Add Marvell Xenon SDHCI controller driver

2017-01-18 Thread Stefan Roese 
This driver implementes platform specific code for the Xenon SDHCI
controller which is integrated in the Marvell MVEBU Armada 37xx and
Armada 7k / 8K SoCs.

History:
This driver is ported from the Marvell U-Boot version 2015.01 which is
written by Victor Gu  with minor changes ported from
the Linux driver which is written by Ziji Hu .

Signed-off-by: Stefan Roese 
Cc: Jaehoon Chung 
---
 drivers/mmc/Kconfig   |  11 +
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/xenon_sdhci.c | 589 ++
 3 files changed, 601 insertions(+)
 create mode 100644 drivers/mmc/xenon_sdhci.c

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 9ed8da39ef..87cc9439f3 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -287,6 +287,17 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_XENON_SDHCI
+   bool "SDHCI support for the Xenon SDHCI controller"
+   depends on MMC_SDHCI && DM_MMC && OF_CONTROL
+   help
+ Support for Xenon SDHCI host controller on Marvell Armada 3700
+ 7k/8k ARM SoCs platforms
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
 config MMC_SDHCI_TEGRA
bool "SDHCI platform support for the Tegra SD/MMC Controller"
depends on TEGRA
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 4dca09c955..8a74318f17 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -68,6 +68,7 @@ obj-$(CONFIG_MMC_SDHCI_MV)+= mv_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_S5P)+= s5p_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_SPEAR)  += spear_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_TEGRA)  += tegra_mmc.o
+obj-$(CONFIG_MMC_XENON_SDHCI)  += xenon_sdhci.o
 
 obj-$(CONFIG_MMC_SUNXI)+= sunxi_mmc.o
 obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
new file mode 100644
index 00..f36b482288
--- /dev/null
+++ b/drivers/mmc/xenon_sdhci.c
@@ -0,0 +1,589 @@
+/*
+ * Driver for Marvell SOC Platform Group Xenon SDHC as a platform device
+ *
+ * Copyright (C) 2016 Marvell, All Rights Reserved.
+ *
+ * Author: Victor Gu 
+ * Date:   2016-8-24
+ *
+ * Included parts of the Linux driver version which was written by:
+ * Hu Ziji 
+ *
+ * Ported to from Marvell 2015.01 to mainline U-Boot 2017.01:
+ * Stefan Roese 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register Offset of SD Host Controller SOCP self-defined register */
+#define SDHC_SYS_CFG_INFO  0x0104
+#define SLOT_TYPE_SDIO_SHIFT   24
+#define SLOT_TYPE_EMMC_MASK0xFF
+#define SLOT_TYPE_EMMC_SHIFT   16
+#define SLOT_TYPE_SD_SDIO_MMC_MASK 0xFF
+#define SLOT_TYPE_SD_SDIO_MMC_SHIFT8
+#define NR_SUPPORTED_SLOT_MASK 0x7
+
+#define SDHC_SYS_OP_CTRL   0x0108
+#define AUTO_CLKGATE_DISABLE_MASK  BIT(20)
+#define SDCLK_IDLEOFF_ENABLE_SHIFT 8
+#define SLOT_ENABLE_SHIFT  0
+
+#define SDHC_SYS_EXT_OP_CTRL   0x010C
+#define MASK_CMD_CONFLICT_ERRORBIT(8)
+
+#define SDHC_SLOT_OP_STATUS_CTRL   0x0128
+#define DELAY_90_DEGREE_MASK_EMMC5 BIT(7)
+#define DELAY_90_DEGREE_SHIFT_EMMC57
+#define EMMC_5_0_PHY_FIXED_DELAY_MASK  0x7F
+#define EMMC_PHY_FIXED_DELAY_MASK  0xFF
+#define EMMC_PHY_FIXED_DELAY_WINDOW_MIN
(EMMC_PHY_FIXED_DELAY_MASK >> 3)
+#define SDH_PHY_FIXED_DELAY_MASK   0x1FF
+#define SDH_PHY_FIXED_DELAY_WINDOW_MIN (SDH_PHY_FIXED_DELAY_MASK >> 4)
+
+#define TUN_CONSECUTIVE_TIMES_SHIFT16
+#define TUN_CONSECUTIVE_TIMES_MASK 0x7
+#define TUN_CONSECUTIVE_TIMES  0x4
+#define TUNING_STEP_SHIFT  12
+#define TUNING_STEP_MASK   0xF
+#define TUNING_STEP_DIVIDERBIT(6)
+
+#define FORCE_SEL_INVERSE_CLK_SHIFT11
+
+#define SDHC_SLOT_FIFO_CTRL0x012c
+
+#define SDHC_SLOT_EMMC_CTRL0x0130
+#define ENABLE_DATA_STROBE BIT(24)
+#define SET_EMMC_RSTN  BIT(16)
+#define DISABLE_RD_DATA_CRCBIT(14)
+#define DISABLE_CRC_STAT_TOKEN BIT(13)
+#define EMMC_VCCQ_MASK 0x3
+#define EMMC_VCCQ_1_8V 0x1
+#define EMMC_VCCQ_3_3V 0x3
+
+#define SDHC_SLOT_RETUNING_REQ_CTRL0x0144
+/* retuning compatible */
+#define RETUNING_COMPATIBLE0x1
+
+#define