Re: [U-Boot] [PATCH 4/4 v2] mtd: mxs_nand: Add support for i.MX6

2013-04-30 Thread Scott Wood

On 04/16/2013 02:14:12 AM, Stefan Roese wrote:

Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
v2:
- Changed tab to space after #ifdef

Scott, is it okay for you if Stefano pulls this patchset via his
ARM/imx repository? As it touches mainly ARM related bits and the
MTD driver change is quite small (I have added your Acked-by to this
patch version)?


Yes, it's fine.  I'd have responded sooner if I were on CC. :-)

-Scott
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[U-Boot] [PATCH 4/4 v2] mtd: mxs_nand: Add support for i.MX6

2013-04-16 Thread Stefan Roese
Signed-off-by: Stefan Roese s...@denx.de
Acked-by: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
v2:
- Changed tab to space after #ifdef

Scott, is it okay for you if Stefano pulls this patchset via his
ARM/imx repository? As it touches mainly ARM related bits and the
MTD driver change is quite small (I have added your Acked-by to this
patch version)?

Thanks,
Stefan

 arch/arm/cpu/armv7/mx6/soc.c   |  7 +++
 arch/arm/include/asm/imx-common/regs-bch.h | 10 ++
 drivers/mtd/nand/mxs_nand.c| 11 +--
 3 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 2ea8ca3..69b8487 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -30,6 +30,7 @@
 #include asm/arch/clock.h
 #include asm/arch/sys_proto.h
 #include asm/imx-common/boot_mode.h
+#include asm/imx-common/dma.h
 #include stdbool.h
 
 struct scu_regs {
@@ -151,6 +152,12 @@ int arch_cpu_init(void)
set_vddsoc(1200);   /* Set VDDSOC to 1.2V */
 
imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
+
+#ifdef CONFIG_APBH_DMA
+   /* Start APBH DMA */
+   mxs_dma_init();
+#endif
+
return 0;
 }
 
diff --git a/arch/arm/include/asm/imx-common/regs-bch.h 
b/arch/arm/include/asm/imx-common/regs-bch.h
index 3a73de4..dbe7ac8 100644
--- a/arch/arm/include/asm/imx-common/regs-bch.h
+++ b/arch/arm/include/asm/imx-common/regs-bch.h
@@ -136,8 +136,13 @@ struct mxs_bch_regs {
 #defineBCH_FLASHLAYOUT0_NBLOCKS_OFFSET 24
 #defineBCH_FLASHLAYOUT0_META_SIZE_MASK (0xff  16)
 #defineBCH_FLASHLAYOUT0_META_SIZE_OFFSET   16
+#if defined(CONFIG_MX6)
+#defineBCH_FLASHLAYOUT0_ECC0_MASK  (0x1f  11)
+#defineBCH_FLASHLAYOUT0_ECC0_OFFSET11
+#else
 #defineBCH_FLASHLAYOUT0_ECC0_MASK  (0xf  12)
 #defineBCH_FLASHLAYOUT0_ECC0_OFFSET12
+#endif
 #defineBCH_FLASHLAYOUT0_ECC0_NONE  (0x0  12)
 #defineBCH_FLASHLAYOUT0_ECC0_ECC2  (0x1  12)
 #defineBCH_FLASHLAYOUT0_ECC0_ECC4  (0x2  12)
@@ -161,8 +166,13 @@ struct mxs_bch_regs {
 
 #defineBCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0x  16)
 #defineBCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET   16
+#if defined(CONFIG_MX6)
+#defineBCH_FLASHLAYOUT1_ECCN_MASK  (0x1f  11)
+#defineBCH_FLASHLAYOUT1_ECCN_OFFSET11
+#else
 #defineBCH_FLASHLAYOUT1_ECCN_MASK  (0xf  12)
 #defineBCH_FLASHLAYOUT1_ECCN_OFFSET12
+#endif
 #defineBCH_FLASHLAYOUT1_ECCN_NONE  (0x0  12)
 #defineBCH_FLASHLAYOUT1_ECCN_ECC2  (0x1  12)
 #defineBCH_FLASHLAYOUT1_ECCN_ECC4  (0x2  12)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index c21fd69..398e4dd 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -42,6 +42,11 @@
 #defineMXS_NAND_DMA_DESCRIPTOR_COUNT   4
 
 #defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE  512
+#if defined(CONFIG_MX6)
+#defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT2
+#else
+#defineMXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT0
+#endif
 #defineMXS_NAND_METADATA_SIZE  10
 
 #defineMXS_NAND_COMMAND_BUFFER_SIZE32
@@ -982,14 +987,16 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
tmp |= MXS_NAND_METADATA_SIZE  BCH_FLASHLAYOUT0_META_SIZE_OFFSET;
tmp |= (mxs_nand_get_ecc_strength(mtd-writesize, mtd-oobsize)  1)
 BCH_FLASHLAYOUT0_ECC0_OFFSET;
-   tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+   tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE
+MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
writel(tmp, bch_regs-hw_bch_flash0layout0);
 
tmp = (mtd-writesize + mtd-oobsize)
 BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET;
tmp |= (mxs_nand_get_ecc_strength(mtd-writesize, mtd-oobsize)  1)
 BCH_FLASHLAYOUT1_ECCN_OFFSET;
-   tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+   tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE
+MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
writel(tmp, bch_regs-hw_bch_flash0layout1);
 
/* Set *all* chip selects to use layout 0 */
-- 
1.8.2.1

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