The RK3399 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3399 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
simply ignore the set_rate() operation and return 0 to signal success.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Tested-by: David Wu <david...@theobroma-systems.com>
---
drivers/clk/rockchip/clk_rk3399.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/rockchip/clk_rk3399.c
index e791936..e431ec8 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -883,6 +883,24 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong
rate)
switch (clk->id) {
case 0 ... 63:
return 0;
+
+ case ACLK_PERIHP:
+ case HCLK_PERIHP:
+ case PCLK_PERIHP:
+ return 0;
+
+ case ACLK_PERILP0:
+ case HCLK_PERILP0:
+ case PCLK_PERILP0:
+ return 0;
+
+ case ACLK_CCI:
+ return 0;
+
+ case HCLK_PERILP1:
+ case PCLK_PERILP1:
+ return 0;
+
case HCLK_SDMMC:
case SCLK_SDMMC:
case SCLK_EMMC:
--
2.1.4
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