Re: [U-Boot] [PATCH 6/6] armv8: ls1028a: erratum A050382 workaround

2019-10-17 Thread Priyanka Jain


>-Original Message-
>From: u-boot-boun...@linux.nxdi.nxp.com boun...@linux.nxdi.nxp.com> On Behalf Of Laurentiu Tudor
>Sent: Thursday, October 17, 2019 2:52 PM
>To: u-boot@lists.denx.de; Prabhakar X 
>Subject: [u-boot] [PATCH 6/6] armv8: ls1028a: erratum A050382 workaround
"Add erratum"
>
>From: Laurentiu Tudor 
>
>Description:
Whose description?
Please reword to something like "erratum A050382 states that "
>  The eDMA ICID programmed in the eDMA_AMQR register in DCFG is not
>  correctly forwarded to the SMMU.
>Workaround:
>  Program eDMA ICID in the eDMA_AMQR register in DCFG to 0x28.
>
>Signed-off-by: Laurentiu Tudor 
>---
> arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  3 +++
> .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 15 +++
> 2 files changed, 18 insertions(+)
>
>diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>index 24c606a232..046dcf539e 100644
>--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
>@@ -45,6 +45,7 @@ config ARCH_LS1028A
>   select SYS_FSL_ERRATUM_A008514 if !TFABOOT
>   select SYS_FSL_ERRATUM_A009663 if !TFABOOT
>   select SYS_FSL_ERRATUM_A009942 if !TFABOOT
>+  select SYS_FSL_ERRATUM_A050382
>   imply PANIC_HANG
>
> config ARCH_LS1043A
>@@ -584,6 +585,8 @@ config SYS_FSL_ERRATUM_A009660  config
>SYS_FSL_ERRATUM_A009929
>   bool
>
>+config SYS_FSL_ERRATUM_A050382
>+  bool
>
> config SYS_FSL_HAS_RGMII
>   bool
>diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
>b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
>index 0b36416ad3..4c9e1e72f0 100644
>--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
>+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
>@@ -105,7 +105,22 @@
> #define FSL_SEC_JR4_STREAM_ID 68
>
> #define FSL_SDMMC2_STREAM_ID  69
>+
>+/*
>+ * Erratum A050382 workaround
>+ *
>+ * Description:
>+ *   The eDMA ICID programmed in the eDMA_AMQR register in DCFG is not
>+ *   correctly forwarded to the SMMU.
>+ * Workaround:
>+ *   Program eDMA ICID in the eDMA_AMQR register in DCFG to 0x28.
Mention (decimal value:40) for better code readability
>+ */
>+#ifdef CONFIG_SYS_FSL_ERRATUM_A050382
>+#define FSL_EDMA_STREAM_ID40
>+#else
> #define FSL_EDMA_STREAM_ID70
>+#endif
>+
> #define FSL_GPU_STREAM_ID 71
> #define FSL_DISPLAY_STREAM_ID 72
> #define FSL_SATA3_STREAM_ID   73
>--
>2.17.1
>
--priyankajain
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[U-Boot] [PATCH 6/6] armv8: ls1028a: erratum A050382 workaround

2019-10-17 Thread Laurentiu Tudor
From: Laurentiu Tudor 

Description:
  The eDMA ICID programmed in the eDMA_AMQR register in DCFG is not
  correctly forwarded to the SMMU.
Workaround:
  Program eDMA ICID in the eDMA_AMQR register in DCFG to 0x28.

Signed-off-by: Laurentiu Tudor 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  3 +++
 .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 15 +++
 2 files changed, 18 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 24c606a232..046dcf539e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -45,6 +45,7 @@ config ARCH_LS1028A
select SYS_FSL_ERRATUM_A008514 if !TFABOOT
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_FSL_ERRATUM_A009942 if !TFABOOT
+   select SYS_FSL_ERRATUM_A050382
imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -584,6 +585,8 @@ config SYS_FSL_ERRATUM_A009660
 config SYS_FSL_ERRATUM_A009929
bool
 
+config SYS_FSL_ERRATUM_A050382
+   bool
 
 config SYS_FSL_HAS_RGMII
bool
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
index 0b36416ad3..4c9e1e72f0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
@@ -105,7 +105,22 @@
 #define FSL_SEC_JR4_STREAM_ID  68
 
 #define FSL_SDMMC2_STREAM_ID   69
+
+/*
+ * Erratum A050382 workaround
+ *
+ * Description:
+ *   The eDMA ICID programmed in the eDMA_AMQR register in DCFG is not
+ *   correctly forwarded to the SMMU.
+ * Workaround:
+ *   Program eDMA ICID in the eDMA_AMQR register in DCFG to 0x28.
+ */
+#ifdef CONFIG_SYS_FSL_ERRATUM_A050382
+#define FSL_EDMA_STREAM_ID 40
+#else
 #define FSL_EDMA_STREAM_ID 70
+#endif
+
 #define FSL_GPU_STREAM_ID  71
 #define FSL_DISPLAY_STREAM_ID  72
 #define FSL_SATA3_STREAM_ID73
-- 
2.17.1

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